From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 38/85] target/hppa: Decode d for logical instructions
Date: Mon, 6 Nov 2023 19:03:20 -0800 [thread overview]
Message-ID: <20231107030407.8979-39-richard.henderson@linaro.org> (raw)
In-Reply-To: <20231107030407.8979-1-richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/hppa/insns.decode | 10 ++++++----
target/hppa/translate.c | 15 +++++++--------
2 files changed, 13 insertions(+), 12 deletions(-)
diff --git a/target/hppa/insns.decode b/target/hppa/insns.decode
index aebe03ccfd..26ca9f1063 100644
--- a/target/hppa/insns.decode
+++ b/target/hppa/insns.decode
@@ -61,6 +61,7 @@
&rr_cf t r cf
&rrr_cf t r1 r2 cf
+&rrr_cf_d t r1 r2 cf d
&rrr_cf_sh t r1 r2 cf sh
&rri_cf t r i cf
@@ -73,6 +74,7 @@
@rr_cf ...... r:5 ..... cf:4 ....... t:5 &rr_cf
@rrr_cf ...... r2:5 r1:5 cf:4 ....... t:5 &rrr_cf
+@rrr_cf_d ...... r2:5 r1:5 cf:4 ...... d:1 t:5 &rrr_cf_d
@rrr_cf_sh ...... r2:5 r1:5 cf:4 .... sh:2 . t:5 &rrr_cf_sh
@rrr_cf_sh0 ...... r2:5 r1:5 cf:4 ....... t:5 &rrr_cf_sh sh=0
@rri_cf ...... r:5 t:5 cf:4 . ........... &rri_cf i=%lowsign_11
@@ -150,10 +152,10 @@ lci 000001 ----- ----- -- 01001100 0 t:5
# Arith/Log
####
-andcm 000010 ..... ..... .... 000000 - ..... @rrr_cf
-and 000010 ..... ..... .... 001000 - ..... @rrr_cf
-or 000010 ..... ..... .... 001001 - ..... @rrr_cf
-xor 000010 ..... ..... .... 001010 0 ..... @rrr_cf
+andcm 000010 ..... ..... .... 000000 . ..... @rrr_cf_d
+and 000010 ..... ..... .... 001000 . ..... @rrr_cf_d
+or 000010 ..... ..... .... 001001 . ..... @rrr_cf_d
+xor 000010 ..... ..... .... 001010 . ..... @rrr_cf_d
uxor 000010 ..... ..... .... 001110 0 ..... @rrr_cf
ds 000010 ..... ..... .... 010001 0 ..... @rrr_cf
cmpclr 000010 ..... ..... .... 100010 0 ..... @rrr_cf
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 187d47f4c3..227d59b263 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -1405,11 +1405,10 @@ static void do_cmpclr(DisasContext *ctx, unsigned rt, TCGv_reg in1,
}
static void do_log(DisasContext *ctx, unsigned rt, TCGv_reg in1,
- TCGv_reg in2, unsigned cf,
+ TCGv_reg in2, unsigned cf, bool d,
void (*fn)(TCGv_reg, TCGv_reg, TCGv_reg))
{
TCGv_reg dest = dest_gpr(ctx, rt);
- bool d = false;
/* Perform the operation, and writeback. */
fn(dest, in1, in2);
@@ -1422,7 +1421,7 @@ static void do_log(DisasContext *ctx, unsigned rt, TCGv_reg in1,
}
}
-static bool do_log_reg(DisasContext *ctx, arg_rrr_cf *a,
+static bool do_log_reg(DisasContext *ctx, arg_rrr_cf_d *a,
void (*fn)(TCGv_reg, TCGv_reg, TCGv_reg))
{
TCGv_reg tcg_r1, tcg_r2;
@@ -1432,7 +1431,7 @@ static bool do_log_reg(DisasContext *ctx, arg_rrr_cf *a,
}
tcg_r1 = load_gpr(ctx, a->r1);
tcg_r2 = load_gpr(ctx, a->r2);
- do_log(ctx, a->t, tcg_r1, tcg_r2, a->cf, fn);
+ do_log(ctx, a->t, tcg_r1, tcg_r2, a->cf, a->d, fn);
return nullify_end(ctx);
}
@@ -2693,17 +2692,17 @@ static bool trans_sub_b_tsv(DisasContext *ctx, arg_rrr_cf *a)
return do_sub_reg(ctx, a, true, true, false);
}
-static bool trans_andcm(DisasContext *ctx, arg_rrr_cf *a)
+static bool trans_andcm(DisasContext *ctx, arg_rrr_cf_d *a)
{
return do_log_reg(ctx, a, tcg_gen_andc_reg);
}
-static bool trans_and(DisasContext *ctx, arg_rrr_cf *a)
+static bool trans_and(DisasContext *ctx, arg_rrr_cf_d *a)
{
return do_log_reg(ctx, a, tcg_gen_and_reg);
}
-static bool trans_or(DisasContext *ctx, arg_rrr_cf *a)
+static bool trans_or(DisasContext *ctx, arg_rrr_cf_d *a)
{
if (a->cf == 0) {
unsigned r2 = a->r2;
@@ -2755,7 +2754,7 @@ static bool trans_or(DisasContext *ctx, arg_rrr_cf *a)
return do_log_reg(ctx, a, tcg_gen_or_reg);
}
-static bool trans_xor(DisasContext *ctx, arg_rrr_cf *a)
+static bool trans_xor(DisasContext *ctx, arg_rrr_cf_d *a)
{
return do_log_reg(ctx, a, tcg_gen_xor_reg);
}
--
2.34.1
next prev parent reply other threads:[~2023-11-07 3:06 UTC|newest]
Thread overview: 89+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-07 3:02 [PULL 00/85] target/hppa patch queue Richard Henderson
2023-11-07 3:02 ` [PULL 01/85] target/hppa: Include PSW_P in tb flags and mmu index Richard Henderson
2023-11-07 3:02 ` [PULL 02/85] target/hppa: Rename hppa_tlb_entry to HPPATLBEntry Richard Henderson
2023-11-07 3:02 ` [PULL 03/85] target/hppa: Use IntervalTreeNode in HPPATLBEntry Richard Henderson
2023-11-07 3:02 ` [PULL 04/85] target/hppa: Always report one page to tlb_set_page Richard Henderson
2023-11-07 3:02 ` [PULL 05/85] target/hppa: Split out hppa_flush_tlb_range Richard Henderson
2023-11-07 3:02 ` [PULL 06/85] target/hppa: Populate an interval tree with valid tlb entries Richard Henderson
2023-11-07 3:02 ` [PULL 07/85] target/hppa: Remove get_temp Richard Henderson
2023-11-07 3:02 ` [PULL 08/85] target/hppa: Remove get_temp_tl Richard Henderson
2023-11-07 3:02 ` [PULL 09/85] target/hppa: Remove load_const Richard Henderson
2023-11-07 3:02 ` [PULL 10/85] target/hppa: Fix hppa64 case in machine.c Richard Henderson
2023-11-07 3:02 ` [PULL 11/85] target/hppa: Fix load in do_load_32 Richard Henderson
2023-11-07 3:02 ` [PULL 12/85] target/hppa: Truncate rotate count in trans_shrpw_sar Richard Henderson
2023-11-07 3:02 ` [PULL 13/85] target/hppa: Fix trans_ds for hppa64 Richard Henderson
2023-11-07 3:02 ` [PULL 14/85] target/hppa: Fix do_add, do_sub " Richard Henderson
2023-11-07 3:02 ` [PULL 15/85] target/hppa: Fix bb_sar " Richard Henderson
2023-11-07 3:02 ` [PULL 16/85] target/hppa: Fix extrw and depw with sar " Richard Henderson
2023-11-07 3:02 ` [PULL 17/85] target/hppa: Introduce TYPE_HPPA64_CPU Richard Henderson
2023-11-07 3:03 ` [PULL 18/85] target/hppa: Make HPPA_BTLB_ENTRIES variable Richard Henderson
2023-11-07 3:03 ` [PULL 19/85] target/hppa: Implement cpu_list Richard Henderson
2023-11-07 3:03 ` [PULL 20/85] target/hppa: Implement hppa_cpu_class_by_name Richard Henderson
2023-11-07 3:03 ` [PULL 21/85] target/hppa: Update cpu_hppa_get/put_psw for hppa64 Richard Henderson
2023-11-07 3:03 ` [PULL 22/85] target/hppa: Handle absolute addresses for pa2.0 Richard Henderson
2023-11-07 3:03 ` [PULL 23/85] target/hppa: Adjust hppa_cpu_dump_state for hppa64 Richard Henderson
2023-11-07 3:03 ` [PULL 24/85] target/hppa: Fix hppa64 addressing Richard Henderson
2023-11-07 3:03 ` [PULL 25/85] target/hppa: Pass DisasContext to copy_iaoq_entry Richard Henderson
2023-11-07 3:03 ` [PULL 26/85] target/hppa: Always use copy_iaoq_entry to set cpu_iaoq_[fb] Richard Henderson
2023-11-07 3:03 ` [PULL 27/85] target/hppa: Use copy_iaoq_entry for link in do_ibranch Richard Henderson
2023-11-07 3:03 ` [PULL 28/85] target/hppa: Mask inputs in copy_iaoq_entry Richard Henderson
2023-11-07 3:03 ` [PULL 29/85] target/hppa: sar register allows only 5 bits on 32-bit CPU Richard Henderson
2023-11-07 3:03 ` [PULL 30/85] target/hppa: Pass d to do_cond Richard Henderson
2023-11-07 3:03 ` [PULL 31/85] target/hppa: Pass d to do_sub_cond Richard Henderson
2023-11-07 3:03 ` [PULL 32/85] target/hppa: Pass d to do_log_cond Richard Henderson
2023-11-07 3:03 ` [PULL 33/85] target/hppa: Pass d to do_sed_cond Richard Henderson
2023-11-07 3:03 ` [PULL 34/85] target/hppa: Pass d to do_unit_cond Richard Henderson
2023-11-07 3:03 ` [PULL 35/85] linux-user/hppa: Fixes for TARGET_ABI32 Richard Henderson
2023-11-07 3:03 ` [PULL 36/85] target/hppa: Drop attempted gdbstub support for hppa64 Richard Henderson
2023-11-07 3:03 ` [PULL 37/85] target/hppa: Remove TARGET_HPPA64 Richard Henderson
2023-11-07 3:03 ` Richard Henderson [this message]
2023-11-07 3:03 ` [PULL 39/85] target/hppa: Decode d for unit instructions Richard Henderson
2023-11-07 3:03 ` [PULL 40/85] target/hppa: Decode d for cmpclr instructions Richard Henderson
2023-11-07 3:03 ` [PULL 41/85] target/hppa: Decode d for add instructions Richard Henderson
2023-11-07 3:03 ` [PULL 42/85] target/hppa: Decode d for sub instructions Richard Henderson
2023-11-07 3:03 ` [PULL 43/85] target/hppa: Decode d for bb instructions Richard Henderson
2023-11-07 3:03 ` [PULL 44/85] target/hppa: Decode d for cmpb instructions Richard Henderson
2023-11-07 3:03 ` [PULL 45/85] target/hppa: Decode CMPIB double-word Richard Henderson
2023-11-07 3:03 ` [PULL 46/85] target/hppa: Decode ADDB double-word Richard Henderson
2023-11-07 3:03 ` [PULL 47/85] target/hppa: Implement LDD, LDCD, LDDA, STD, STDA Richard Henderson
2023-11-07 3:03 ` [PULL 48/85] target/hppa: Implement DEPD, DEPDI Richard Henderson
2023-11-07 3:03 ` [PULL 49/85] target/hppa: Implement EXTRD Richard Henderson
2023-11-07 3:03 ` [PULL 50/85] target/hppa: Implement SHRPD Richard Henderson
2023-11-07 3:03 ` [PULL 51/85] target/hppa: Implement CLRBTS, POPBTS, PUSHBTS, PUSHNOM Richard Henderson
2023-11-07 3:03 ` [PULL 52/85] target/hppa: Implement STDBY Richard Henderson
2023-11-07 3:03 ` [PULL 53/85] target/hppa: Implement IDTLBT, IITLBT Richard Henderson
2023-11-09 15:13 ` Peter Maydell
2023-11-07 3:03 ` [PULL 54/85] hw/hppa: Use uint32_t instead of target_ureg Richard Henderson
2023-11-07 3:03 ` [PULL 55/85] target/hppa: Remove TARGET_REGISTER_BITS Richard Henderson
2023-11-07 3:03 ` [PULL 56/85] target/hppa: Remove most of the TARGET_REGISTER_BITS redirections Richard Henderson
2023-11-07 3:03 ` [PULL 57/85] target/hppa: Remove remaining " Richard Henderson
2023-11-07 3:03 ` [PULL 58/85] target/hppa: Adjust vmstate_env for pa2.0 tlb Richard Henderson
2023-11-07 3:03 ` [PULL 59/85] target/hppa: Use tcg_temp_new_i64 not tcg_temp_new Richard Henderson
2023-11-07 3:03 ` [PULL 60/85] target/hppa: Replace tcg_gen_*_tl with tcg_gen_*_i64 Richard Henderson
2023-11-07 3:03 ` [PULL 61/85] target/hppa: Implement HADD Richard Henderson
2023-11-07 3:03 ` [PULL 62/85] target/hppa: Implement HSUB Richard Henderson
2023-11-07 3:03 ` [PULL 63/85] target/hppa: Implement HAVG Richard Henderson
2023-11-07 3:03 ` [PULL 64/85] target/hppa: Implement HSHL, HSHR Richard Henderson
2023-11-07 3:03 ` [PULL 65/85] target/hppa: Implement HSHLADD, HSHRADD Richard Henderson
2023-11-07 3:03 ` [PULL 66/85] target/hppa: Implement MIXH, MIXW Richard Henderson
2023-11-07 3:03 ` [PULL 67/85] target/hppa: Implement PERMH Richard Henderson
2023-11-07 3:03 ` [PULL 68/85] target/hppa: Fix interruption based on default PSW Richard Henderson
2023-11-07 3:03 ` [PULL 69/85] target/hppa: Precompute zero into DisasContext Richard Henderson
2023-11-07 3:03 ` [PULL 70/85] target/hppa: Return zero for r0 from load_gpr Richard Henderson
2023-11-07 3:03 ` [PULL 71/85] include/hw/elf: Remove truncating signed casts Richard Henderson
2023-11-07 3:03 ` [PULL 72/85] hw/hppa: Translate phys addresses for the cpu Richard Henderson
2023-11-07 3:03 ` [PULL 73/85] linux-user/hppa: Drop EXCP_DUMP from handled exceptions Richard Henderson
2023-11-07 3:03 ` [PULL 74/85] target/hppa: Implement pa2.0 data prefetch instructions Richard Henderson
2023-11-07 3:03 ` [PULL 75/85] target/hppa: Add pa2.0 cpu local tlb flushes Richard Henderson
2023-11-09 15:12 ` Peter Maydell
2023-11-07 3:03 ` [PULL 76/85] target/hppa: Avoid async_safe_run_on_cpu on uniprocessor system Richard Henderson
2023-11-07 3:03 ` [PULL 77/85] target/hppa: Clear upper bits in mtctl for pa1.x Richard Henderson
2023-11-07 3:04 ` [PULL 78/85] target/hppa: Add unwind_breg to CPUHPPAState Richard Henderson
2023-11-07 3:04 ` [PULL 79/85] target/hppa: Create raise_exception_with_ior Richard Henderson
2023-11-07 3:04 ` [PULL 80/85] target/hppa: Update IIAOQ, IIASQ for pa2.0 Richard Henderson
2023-11-07 3:04 ` [PULL 81/85] target/hppa: Improve interrupt logging Richard Henderson
2023-11-07 3:04 ` [PULL 82/85] hw/pci-host/astro: Map Astro chip into 64-bit I/O memory region Richard Henderson
2023-11-07 3:04 ` [PULL 83/85] hw/pci-host/astro: Trigger CPU irq on CPU HPA in high memory Richard Henderson
2023-11-07 3:04 ` [PULL 84/85] hw/hppa: Turn on 64-bit CPU for C3700 machine Richard Henderson
2023-11-07 3:04 ` [PULL 85/85] hw/hppa: Allow C3700 with 64-bit and B160L with 32-bit CPU only Richard Henderson
2023-11-07 9:36 ` [PULL 00/85] target/hppa patch queue Stefan Hajnoczi
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