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From: Xin Li <xin3.li@intel.com>
To: qemu-devel@nongnu.org
Cc: kvm@vger.kernel.org, richard.henderson@linaro.org,
	pbonzini@redhat.com, eduardo@habkost.net, seanjc@google.com,
	chao.gao@intel.com, hpa@zytor.com, xiaoyao.li@intel.com,
	weijiang.yang@intel.com
Subject: [PATCH v3 5/6] target/i386: enumerate VMX nested-exception support
Date: Wed,  8 Nov 2023 23:20:11 -0800	[thread overview]
Message-ID: <20231109072012.8078-6-xin3.li@intel.com> (raw)
In-Reply-To: <20231109072012.8078-1-xin3.li@intel.com>

Allow VMX nested-exception support to be exposed in KVM guests, thus
nested KVM guests can enumerate it.

Tested-by: Shan Kang <shan.kang@intel.com>
Signed-off-by: Xin Li <xin3.li@intel.com>
---
 scripts/kvm/vmxcap | 1 +
 target/i386/cpu.c  | 1 +
 target/i386/cpu.h  | 1 +
 3 files changed, 3 insertions(+)

diff --git a/scripts/kvm/vmxcap b/scripts/kvm/vmxcap
index 44898d73c2..508be19c75 100755
--- a/scripts/kvm/vmxcap
+++ b/scripts/kvm/vmxcap
@@ -117,6 +117,7 @@ controls = [
             54: 'INS/OUTS instruction information',
             55: 'IA32_VMX_TRUE_*_CTLS support',
             56: 'Skip checks on event error code',
+            58: 'VMX nested exception support',
             },
         msr = MSR_IA32_VMX_BASIC,
         ),
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index dcf914a7ec..f7556621a5 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -1343,6 +1343,7 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
             [54] = "vmx-ins-outs",
             [55] = "vmx-true-ctls",
             [56] = "vmx-any-errcode",
+            [58] = "vmx-nested-exception",
         },
         .msr = {
             .index = MSR_IA32_VMX_BASIC,
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index a4d3702621..cc3b4fefb8 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1054,6 +1054,7 @@ uint64_t x86_cpu_get_supported_feature_word(FeatureWord w,
 #define MSR_VMX_BASIC_INS_OUTS                       (1ULL << 54)
 #define MSR_VMX_BASIC_TRUE_CTLS                      (1ULL << 55)
 #define MSR_VMX_BASIC_ANY_ERRCODE                    (1ULL << 56)
+#define MSR_VMX_BASIC_NESTED_EXCEPTION               (1ULL << 58)
 
 #define MSR_VMX_MISC_PREEMPTION_TIMER_SHIFT_MASK     0x1Full
 #define MSR_VMX_MISC_STORE_LMA                       (1ULL << 5)
-- 
2.42.0



  parent reply	other threads:[~2023-11-09  7:51 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-09  7:20 [PATCH v3 0/6] target/i386: add support for FRED Xin Li
2023-11-09  7:20 ` [PATCH v3 1/6] target/i386: add support for FRED in CPUID enumeration Xin Li
2023-12-14  8:15   ` Wu, Dan1
2023-12-21  8:27     ` Li, Xin3
2023-12-22  3:03       ` [PATCH v3A " Xin Li
2023-12-22  7:34         ` Zhao Liu
2023-12-22  8:15           ` Zhao Liu
2023-12-22  8:24             ` Li, Xin3
2023-12-22  8:47               ` Liu, Zhao1
2023-11-09  7:20 ` [PATCH v3 2/6] target/i386: mark CR4.FRED not reserved Xin Li
2023-12-22  9:26   ` Zhao Liu
2023-11-09  7:20 ` [PATCH v3 3/6] target/i386: add the secondary VM exit controls MSR Xin Li
2023-11-09  7:20 ` [PATCH v3 4/6] target/i386: add support for VMX FRED controls Xin Li
2024-06-06  9:00   ` Paolo Bonzini
2024-06-07 14:13     ` Li, Xin3
2023-11-09  7:20 ` Xin Li [this message]
2023-11-09  7:20 ` [PATCH v3 6/6] target/i386: Add get/set/migrate support for FRED MSRs Xin Li

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