[PATCH v2 2/8] ppc/pnv: Wire up pca9552 GPIO pins for PCIe hotplug power control

[Glenn Miles <milesg@linux.vnet.ibm.com>]

For power10, a pca9552 device is used for PCIe slot hotplug power
control by the Power Hypervisor code.  The code expects that some
time after it enables power to a PCIe slot by asserting one of the
pca9552 GPIO pins 0-4, it should see a "power good" signal asserted
on one of pca9552 GPIO pins 5-9.

To simulate this behavior, we simply connect the GPIO outputs for
pins 0-4 to the GPIO inputs for pins 5-9.

Each PCIe slot is assigned 3 GPIO pins on the pca9552 device, for
control of up to 5 PCIe slots.  The per-slot signal names are:

   SLOTx_EN.......PHYP uses this as an output to enable
                  slot power.  We connect this to the
                  SLOTx_PG pin to simulate a PGOOD signal.
   SLOTx_PG.......PHYP uses this as in input to detect
                  PGOOD for the slot.  For our purposes
                  we just connect this to the SLOTx_EN
                  output.
   SLOTx_Control..PHYP uses this as an output to prevent
                  a race condition in the real hotplug
                  circuitry, but we can ignore this output
                  for simulation.

Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com>
---
 hw/ppc/pnv.c | 19 ++++++++++++++++++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 7afaf1008f..0b24d7d8ed 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -1882,7 +1882,24 @@ static void pnv_chip_power10_realize(DeviceState *dev, Error **errp)
      * Add a PCA9552 I2C device for PCIe hotplug control
      * to engine 2, bus 1, address 0x63
      */
-    i2c_slave_create_simple(chip10->i2c[2].busses[1], "pca9552", 0x63);
+    I2CSlave* hotplug = i2c_slave_create_simple(chip10->i2c[2].busses[1],
+                                                "pca9552", 0x63);
+
+    /*
+     * Connect PCA9552 GPIO pins 0-4 (SLOTx_EN) outputs to GPIO pins 5-9
+     * (SLOTx_PG) inputs in order to fake the pgood state of PCIe slots after
+     * hypervisor code sets a SLOTx_EN pin high.
+     */
+    qdev_connect_gpio_out(DEVICE(hotplug), 0,
+                          qdev_get_gpio_in(DEVICE(hotplug), 5));
+    qdev_connect_gpio_out(DEVICE(hotplug), 1,
+                          qdev_get_gpio_in(DEVICE(hotplug), 6));
+    qdev_connect_gpio_out(DEVICE(hotplug), 2,
+                          qdev_get_gpio_in(DEVICE(hotplug), 7));
+    qdev_connect_gpio_out(DEVICE(hotplug), 3,
+                          qdev_get_gpio_in(DEVICE(hotplug), 8));
+    qdev_connect_gpio_out(DEVICE(hotplug), 4,
+                          qdev_get_gpio_in(DEVICE(hotplug), 9));
 
 }
 
-- 
2.31.1