From: Joelle van Dyne <j@getutm.app>
To: qemu-devel@nongnu.org
Cc: Joelle van Dyne <j@getutm.app>,
"Michael S. Tsirkin" <mst@redhat.com>,
Igor Mammedov <imammedo@redhat.com>,
Ani Sinha <anisinha@redhat.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Richard Henderson <richard.henderson@linaro.org>,
Eduardo Habkost <eduardo@habkost.net>,
Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
Stefan Berger <stefanb@linux.vnet.ibm.com>
Subject: [PATCH v5 05/14] tpm_crb: move ACPI table building to device interface
Date: Mon, 13 Nov 2023 18:09:15 -0800 [thread overview]
Message-ID: <20231114020927.62315-6-j@getutm.app> (raw)
In-Reply-To: <20231114020927.62315-1-j@getutm.app>
This logic is similar to TPM TIS ISA device. Since TPM CRB can only
support TPM 2.0 backends, we check for this in realize.
Signed-off-by: Joelle van Dyne <j@getutm.app>
---
hw/tpm/tpm_crb.h | 2 ++
hw/i386/acpi-build.c | 16 +---------------
hw/tpm/tpm_crb.c | 16 ++++++++++++++++
hw/tpm/tpm_crb_common.c | 19 +++++++++++++++++++
4 files changed, 38 insertions(+), 15 deletions(-)
diff --git a/hw/tpm/tpm_crb.h b/hw/tpm/tpm_crb.h
index 36863e1664..e6a86e3fd1 100644
--- a/hw/tpm/tpm_crb.h
+++ b/hw/tpm/tpm_crb.h
@@ -73,5 +73,7 @@ void tpm_crb_init_memory(Object *obj, TPMCRBState *s, Error **errp);
void tpm_crb_mem_save(TPMCRBState *s, uint32_t *saved_regs, void *saved_cmdmem);
void tpm_crb_mem_load(TPMCRBState *s, const uint32_t *saved_regs,
const void *saved_cmdmem);
+void tpm_crb_build_aml(TPMIf *ti, Aml *scope, uint32_t baseaddr, uint32_t size,
+ bool build_ppi);
#endif /* TPM_TPM_CRB_H */
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 80db183b78..7491cee2af 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1792,21 +1792,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
#ifdef CONFIG_TPM
if (TPM_IS_CRB(tpm)) {
- dev = aml_device("TPM");
- aml_append(dev, aml_name_decl("_HID", aml_string("MSFT0101")));
- aml_append(dev, aml_name_decl("_STR",
- aml_string("TPM 2.0 Device")));
- crs = aml_resource_template();
- aml_append(crs, aml_memory32_fixed(TPM_CRB_ADDR_BASE,
- TPM_CRB_ADDR_SIZE, AML_READ_WRITE));
- aml_append(dev, aml_name_decl("_CRS", crs));
-
- aml_append(dev, aml_name_decl("_STA", aml_int(0xf)));
- aml_append(dev, aml_name_decl("_UID", aml_int(1)));
-
- tpm_build_ppi_acpi(tpm, dev);
-
- aml_append(sb_scope, dev);
+ call_dev_aml_func(DEVICE(tpm), scope);
}
#endif
diff --git a/hw/tpm/tpm_crb.c b/hw/tpm/tpm_crb.c
index 99c64dd72a..8d57295b15 100644
--- a/hw/tpm/tpm_crb.c
+++ b/hw/tpm/tpm_crb.c
@@ -19,6 +19,8 @@
#include "qemu/module.h"
#include "qapi/error.h"
#include "exec/address-spaces.h"
+#include "hw/acpi/acpi_aml_interface.h"
+#include "hw/acpi/tpm.h"
#include "hw/qdev-properties.h"
#include "hw/pci/pci_ids.h"
#include "hw/acpi/tpm.h"
@@ -121,6 +123,11 @@ static void tpm_crb_none_realize(DeviceState *dev, Error **errp)
return;
}
+ if (tpm_crb_none_get_version(TPM_IF(s)) != TPM_VERSION_2_0) {
+ error_setg(errp, "TPM CRB only supports TPM 2.0 backends");
+ return;
+ }
+
tpm_crb_init_memory(OBJECT(s), &s->state, errp);
/* only used for migration */
@@ -142,10 +149,17 @@ static void tpm_crb_none_realize(DeviceState *dev, Error **errp)
}
}
+static void build_tpm_crb_none_aml(AcpiDevAmlIf *adev, Aml *scope)
+{
+ tpm_crb_build_aml(TPM_IF(adev), scope, TPM_CRB_ADDR_BASE, TPM_CRB_ADDR_SIZE,
+ true);
+}
+
static void tpm_crb_none_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
TPMIfClass *tc = TPM_IF_CLASS(klass);
+ AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass);
dc->realize = tpm_crb_none_realize;
device_class_set_props(dc, tpm_crb_none_properties);
@@ -154,6 +168,7 @@ static void tpm_crb_none_class_init(ObjectClass *klass, void *data)
tc->model = TPM_MODEL_TPM_CRB;
tc->get_version = tpm_crb_none_get_version;
tc->request_completed = tpm_crb_none_request_completed;
+ adevc->build_dev_aml = build_tpm_crb_none_aml;
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
}
@@ -166,6 +181,7 @@ static const TypeInfo tpm_crb_none_info = {
.class_init = tpm_crb_none_class_init,
.interfaces = (InterfaceInfo[]) {
{ TYPE_TPM_IF },
+ { TYPE_ACPI_DEV_AML_IF },
{ }
}
};
diff --git a/hw/tpm/tpm_crb_common.c b/hw/tpm/tpm_crb_common.c
index f96a8cf299..09ca55eece 100644
--- a/hw/tpm/tpm_crb_common.c
+++ b/hw/tpm/tpm_crb_common.c
@@ -241,3 +241,22 @@ void tpm_crb_mem_load(TPMCRBState *s, const uint32_t *saved_regs,
memcpy(regs, saved_regs, A_CRB_DATA_BUFFER);
memcpy(®s[R_CRB_DATA_BUFFER], saved_cmdmem, CRB_CTRL_CMD_SIZE);
}
+
+void tpm_crb_build_aml(TPMIf *ti, Aml *scope, uint32_t baseaddr, uint32_t size,
+ bool build_ppi)
+{
+ Aml *dev, *crs;
+
+ dev = aml_device("TPM");
+ aml_append(dev, aml_name_decl("_HID", aml_string("MSFT0101")));
+ aml_append(dev, aml_name_decl("_STR", aml_string("TPM 2.0 Device")));
+ aml_append(dev, aml_name_decl("_UID", aml_int(1)));
+ aml_append(dev, aml_name_decl("_STA", aml_int(0xF)));
+ crs = aml_resource_template();
+ aml_append(crs, aml_memory32_fixed(baseaddr, size, AML_READ_WRITE));
+ aml_append(dev, aml_name_decl("_CRS", crs));
+ if (build_ppi) {
+ tpm_build_ppi_acpi(ti, dev);
+ }
+ aml_append(scope, dev);
+}
--
2.41.0
next prev parent reply other threads:[~2023-11-14 2:10 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-14 2:09 [PATCH v5 00/14] tpm: introduce TPM CRB SysBus device Joelle van Dyne
2023-11-14 2:09 ` [PATCH v5 01/14] tpm_crb: refactor common code Joelle van Dyne
2023-11-14 2:09 ` [PATCH v5 02/14] tpm_crb: CTRL_RSP_ADDR is 64-bits wide Joelle van Dyne
2023-11-14 2:09 ` [PATCH v5 03/14] tpm_ppi: refactor memory space initialization Joelle van Dyne
2023-11-14 2:09 ` [PATCH v5 04/14] tpm_crb: use a single read-as-mem/write-as-mmio mapping Joelle van Dyne
2023-11-14 15:46 ` Stefan Berger
2023-11-14 2:09 ` Joelle van Dyne [this message]
2023-11-14 16:37 ` [PATCH v5 05/14] tpm_crb: move ACPI table building to device interface Stefan Berger
2023-11-14 16:44 ` Stefan Berger
2023-11-14 19:29 ` Joelle van Dyne
2023-11-14 2:09 ` [PATCH v5 06/14] tpm-sysbus: add plug handler for TPM on SysBus Joelle van Dyne
2023-11-14 2:09 ` [PATCH v5 07/14] hw/arm/virt: connect TPM to platform bus Joelle van Dyne
2023-11-14 2:09 ` [PATCH v5 08/14] hw/loongarch/virt: " Joelle van Dyne
2023-11-14 2:09 ` [PATCH v5 09/14] tpm_tis_sysbus: move DSDT AML generation to device Joelle van Dyne
2023-11-14 2:09 ` [PATCH v5 10/14] tests: acpi: prepare for TPM CRB tests Joelle van Dyne
2023-11-14 2:09 ` [PATCH v5 11/14] tpm_crb_sysbus: introduce TPM CRB SysBus device Joelle van Dyne
2023-11-14 2:09 ` [PATCH v5 12/14] tests: acpi: implement TPM CRB tests for ARM virt Joelle van Dyne
2023-11-14 9:36 ` Marc-André Lureau
2023-11-14 13:04 ` Stefan Berger
2023-11-14 18:03 ` Stefan Berger
2023-11-14 21:05 ` Stefan Berger
2023-11-15 0:12 ` Stefan Berger
2023-11-24 0:56 ` Joelle van Dyne
2023-11-24 16:17 ` Stefan Berger
2023-11-24 16:21 ` Joelle van Dyne
2023-11-24 16:26 ` Stefan Berger
2023-11-25 2:39 ` Joelle van Dyne
2023-11-27 14:12 ` Stefan Berger
2023-11-14 2:09 ` [PATCH v5 13/14] tests: acpi: updated expected blobs for TPM CRB Joelle van Dyne
2023-11-14 2:09 ` [PATCH v5 14/14] tests: add TPM-CRB sysbus tests for aarch64 Joelle van Dyne
2023-11-14 9:38 ` [PATCH v5 00/14] tpm: introduce TPM CRB SysBus device Marc-André Lureau
2023-11-14 19:25 ` Joelle van Dyne
2023-11-20 8:29 ` Marc-André Lureau
2023-11-20 15:01 ` Stefan Berger
2024-04-30 11:54 ` Peter Maydell
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