From: Gavin Shan <gshan@redhat.com>
To: qemu-arm@nongnu.org
Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org,
qemu-ppc@nongnu.org, imp@bsdimp.com, kevans@freebsd.org,
richard.henderson@linaro.org, pbonzini@redhat.com,
peter.maydell@linaro.org, imammedo@redhat.com, philmd@linaro.org,
b.galvani@gmail.com, strahinja.p.jankovic@gmail.com,
sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com,
nieklinnenbank@gmail.com, rad@semihalf.com,
quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org,
eduardo@habkost.net, marcel.apfelbaum@gmail.com,
wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com,
palmer@dabbelt.com, alistair.francis@wdc.com,
bin.meng@windriver.com, liwei1518@gmail.com,
dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com,
mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com,
gaosong@loongson.cn, aurelien@aurel32.net,
jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com,
chenhuacai@kernel.org, shorne@gmail.com, npiggin@gmail.com,
clg@kaod.org, ysato@users.sourceforge.jp,
kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com,
shan.gavin@gmail.com
Subject: [PATCH v5 08/31] target/arm: Use generic cpu_list()
Date: Wed, 15 Nov 2023 09:56:05 +1000 [thread overview]
Message-ID: <20231114235628.534334-9-gshan@redhat.com> (raw)
In-Reply-To: <20231114235628.534334-1-gshan@redhat.com>
No changes of the output from the following command before and
after it's applied.
[gshan@gshan q]$ ./build/qemu-system-aarch64 -cpu ?
Available CPUs:
a64fx
arm1026
arm1136
arm1136-r2
arm1176
arm11mpcore
arm926
arm946
cortex-a15
cortex-a35
cortex-a53
cortex-a55
cortex-a57
cortex-a7
cortex-a710
cortex-a72
cortex-a76
cortex-a8
cortex-a9
cortex-m0
cortex-m3
cortex-m33
cortex-m4
cortex-m55
cortex-m7
cortex-r5
cortex-r52
cortex-r5f
max
neoverse-n1
neoverse-n2
neoverse-v1
pxa250
pxa255
pxa260
pxa261
pxa262
pxa270-a0
pxa270-a1
pxa270
pxa270-b0
pxa270-b1
pxa270-c0
pxa270-c5
sa1100
sa1110
ti925t
Signed-off-by: Gavin Shan <gshan@redhat.com>
---
target/arm/cpu.h | 3 ---
target/arm/helper.c | 46 ---------------------------------------------
2 files changed, 49 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index a0282e0d28..8c3ca2e231 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -2737,7 +2737,6 @@ static inline bool access_secure_reg(CPUARMState *env)
(arm_is_secure(_env) && !arm_el_is_aa64((_env), 3)), \
(_val))
-void arm_cpu_list(void);
uint32_t arm_phys_excp_target_el(CPUState *cs, uint32_t excp_idx,
uint32_t cur_el, bool secure);
@@ -2840,8 +2839,6 @@ bool write_cpustate_to_list(ARMCPU *cpu, bool kvm_sync);
#define TYPE_ARM_HOST_CPU "host-" TYPE_ARM_CPU
-#define cpu_list arm_cpu_list
-
/* ARM has the following "translation regimes" (as the ARM ARM calls them):
*
* If EL3 is 64-bit:
diff --git a/target/arm/helper.c b/target/arm/helper.c
index ff1970981e..c9a8baefc6 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -9421,52 +9421,6 @@ void register_cp_regs_for_features(ARMCPU *cpu)
#endif
}
-/* Sort alphabetically by type name, except for "any". */
-static gint arm_cpu_list_compare(gconstpointer a, gconstpointer b)
-{
- ObjectClass *class_a = (ObjectClass *)a;
- ObjectClass *class_b = (ObjectClass *)b;
- const char *name_a, *name_b;
-
- name_a = object_class_get_name(class_a);
- name_b = object_class_get_name(class_b);
- if (strcmp(name_a, "any-" TYPE_ARM_CPU) == 0) {
- return 1;
- } else if (strcmp(name_b, "any-" TYPE_ARM_CPU) == 0) {
- return -1;
- } else {
- return strcmp(name_a, name_b);
- }
-}
-
-static void arm_cpu_list_entry(gpointer data, gpointer user_data)
-{
- ObjectClass *oc = data;
- CPUClass *cc = CPU_CLASS(oc);
- const char *typename;
- char *name;
-
- typename = object_class_get_name(oc);
- name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_ARM_CPU));
- if (cc->deprecation_note) {
- qemu_printf(" %s (deprecated)\n", name);
- } else {
- qemu_printf(" %s\n", name);
- }
- g_free(name);
-}
-
-void arm_cpu_list(void)
-{
- GSList *list;
-
- list = object_class_get_list(TYPE_ARM_CPU, false);
- list = g_slist_sort(list, arm_cpu_list_compare);
- qemu_printf("Available CPUs:\n");
- g_slist_foreach(list, arm_cpu_list_entry, NULL);
- g_slist_free(list);
-}
-
/*
* Private utility function for define_one_arm_cp_reg_with_opaque():
* add a single reginfo struct to the hash table.
--
2.41.0
next prev parent reply other threads:[~2023-11-14 23:59 UTC|newest]
Thread overview: 102+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
2023-11-14 23:55 ` [PATCH v5 01/31] target/alpha: Remove 'ev67' CPU class Gavin Shan
2023-11-15 0:22 ` Richard Henderson
2023-11-16 6:58 ` Philippe Mathieu-Daudé
2024-01-04 17:58 ` Philippe Mathieu-Daudé
2024-01-04 18:03 ` Philippe Mathieu-Daudé
2024-01-04 18:12 ` Philippe Mathieu-Daudé
2023-11-14 23:55 ` [PATCH v5 02/31] target/hppa: Remove object_class_is_abstract() Gavin Shan
2023-11-15 0:26 ` Richard Henderson
2023-11-15 11:18 ` BALATON Zoltan
2023-11-15 11:24 ` Gavin Shan
2023-11-15 11:27 ` BALATON Zoltan
2023-11-16 7:09 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 03/31] cpu: Call object_class_dynamic_cast() once in cpu_class_by_name() Gavin Shan
2023-11-15 0:30 ` Richard Henderson
2023-11-16 16:08 ` Philippe Mathieu-Daudé
2023-11-16 23:13 ` Gavin Shan
2023-11-14 23:56 ` [PATCH v5 04/31] target: Remove 'oc == NULL' check Gavin Shan
2023-11-15 0:34 ` Richard Henderson
2023-11-14 23:56 ` [PATCH v5 05/31] cpu: Add helper cpu_model_from_type() Gavin Shan
2023-11-15 0:35 ` Richard Henderson
2023-11-16 7:45 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 06/31] cpu: Add generic cpu_list() Gavin Shan
2023-11-15 0:37 ` Richard Henderson
2023-11-16 7:39 ` Philippe Mathieu-Daudé
2023-11-16 7:51 ` Philippe Mathieu-Daudé
2023-11-16 10:19 ` Philippe Mathieu-Daudé
2023-11-16 10:25 ` Philippe Mathieu-Daudé
2023-11-16 10:37 ` Gavin Shan
2023-11-16 10:34 ` Gavin Shan
2023-11-16 13:22 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 07/31] target/alpha: Use " Gavin Shan
2023-11-15 0:38 ` Richard Henderson
2023-11-16 7:47 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` Gavin Shan [this message]
2023-11-15 0:41 ` [PATCH v5 08/31] target/arm: " Richard Henderson
2023-11-16 7:51 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 09/31] target/avr: " Gavin Shan
2023-11-15 0:42 ` Richard Henderson
2023-11-16 7:51 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 10/31] target/cris: " Gavin Shan
2023-11-15 0:44 ` Richard Henderson
2023-11-16 7:52 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 11/31] target/hexagon: " Gavin Shan
2023-11-15 0:46 ` Richard Henderson
2023-11-16 7:52 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 12/31] target/hppa: " Gavin Shan
2023-11-15 0:57 ` Richard Henderson
2023-11-16 7:52 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 13/31] target/loongarch: " Gavin Shan
2023-11-15 0:59 ` Richard Henderson
2023-11-16 10:27 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 14/31] target/m68k: " Gavin Shan
2023-11-15 1:01 ` Richard Henderson
2023-11-16 10:27 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 15/31] target/mips: " Gavin Shan
2023-11-15 1:02 ` Richard Henderson
2023-11-16 7:53 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 16/31] target/openrisc: " Gavin Shan
2023-11-15 1:04 ` Richard Henderson
2023-11-16 10:28 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 17/31] target/riscv: " Gavin Shan
2023-11-15 1:05 ` Richard Henderson
2023-11-16 10:28 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 18/31] target/rx: " Gavin Shan
2023-11-15 1:07 ` Richard Henderson
2023-11-16 7:54 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 19/31] target/sh4: " Gavin Shan
2023-11-15 1:08 ` Richard Henderson
2023-11-16 7:55 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 20/31] target/tricore: " Gavin Shan
2023-11-15 1:09 ` Richard Henderson
2023-11-16 7:55 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 21/31] target/xtensa: " Gavin Shan
2023-11-15 1:12 ` Richard Henderson
2023-11-16 13:29 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 22/31] target: Use generic cpu_model_from_type() Gavin Shan
2023-11-15 1:17 ` Richard Henderson
2023-11-16 13:32 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 23/31] machine: Constify MachineClass::valid_cpu_types[i] Gavin Shan
2023-11-15 1:17 ` Richard Henderson
2023-11-16 9:52 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 24/31] machine: Use error handling when CPU type is checked Gavin Shan
2023-11-15 1:21 ` Richard Henderson
2023-11-15 1:26 ` Richard Henderson
2023-11-14 23:56 ` [PATCH v5 25/31] machine: Introduce helper is_cpu_type_supported() Gavin Shan
2023-11-16 9:33 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 26/31] machine: Print CPU model name instead of CPU type name Gavin Shan
2023-11-15 1:32 ` Richard Henderson
2023-11-14 23:56 ` [PATCH v5 27/31] hw/arm/virt: Hide host CPU model for tcg Gavin Shan
2023-11-14 23:56 ` [PATCH v5 28/31] hw/arm/virt: Check CPU type in machine_run_board_init() Gavin Shan
2023-11-14 23:56 ` [PATCH v5 29/31] hw/arm/sbsa-ref: " Gavin Shan
2023-11-14 23:56 ` [PATCH v5 30/31] hw/arm: " Gavin Shan
2023-11-16 8:35 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 31/31] hw/riscv/shakti_c: " Gavin Shan
2023-11-16 10:01 ` [PATCH v5 00/31] Unified CPU type check Philippe Mathieu-Daudé
2023-11-16 10:12 ` Gavin Shan
2023-11-16 13:35 ` Philippe Mathieu-Daudé
2023-11-16 16:20 ` Philippe Mathieu-Daudé
2023-11-16 23:26 ` Gavin Shan
2023-11-17 7:34 ` Philippe Mathieu-Daudé
2023-11-18 6:40 ` Gavin Shan
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20231114235628.534334-9-gshan@redhat.com \
--to=gshan@redhat.com \
--cc=aleksandar.rikalo@syrmia.com \
--cc=alistair.francis@wdc.com \
--cc=aurelien@aurel32.net \
--cc=b.galvani@gmail.com \
--cc=bcain@quicinc.com \
--cc=bin.meng@windriver.com \
--cc=chenhuacai@kernel.org \
--cc=clg@kaod.org \
--cc=dbarboza@ventanamicro.com \
--cc=edgar.iglesias@gmail.com \
--cc=eduardo@habkost.net \
--cc=gaosong@loongson.cn \
--cc=imammedo@redhat.com \
--cc=imp@bsdimp.com \
--cc=jcmvbkbc@gmail.com \
--cc=jiaxun.yang@flygoat.com \
--cc=kbastian@mail.uni-paderborn.de \
--cc=kevans@freebsd.org \
--cc=kfting@nuvoton.com \
--cc=laurent@vivier.eu \
--cc=liwei1518@gmail.com \
--cc=marcel.apfelbaum@gmail.com \
--cc=marcin.juszkiewicz@linaro.org \
--cc=mrolnik@gmail.com \
--cc=nieklinnenbank@gmail.com \
--cc=npiggin@gmail.com \
--cc=palmer@dabbelt.com \
--cc=pbonzini@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=philmd@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
--cc=qemu-riscv@nongnu.org \
--cc=quic_llindhol@quicinc.com \
--cc=rad@semihalf.com \
--cc=richard.henderson@linaro.org \
--cc=shan.gavin@gmail.com \
--cc=shorne@gmail.com \
--cc=strahinja.p.jankovic@gmail.com \
--cc=sundeep.lkml@gmail.com \
--cc=vijai@behindbytes.com \
--cc=wangyanan55@huawei.com \
--cc=wuhaotsh@google.com \
--cc=ysato@users.sourceforge.jp \
--cc=zhiwei_liu@linux.alibaba.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).