From: Xiaoyao Li <xiaoyao.li@intel.com>
To: "Paolo Bonzini" <pbonzini@redhat.com>,
"David Hildenbrand" <david@redhat.com>,
"Igor Mammedov" <imammedo@redhat.com>,
"Michael S . Tsirkin" <mst@redhat.com>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Peter Xu" <peterx@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Cornelia Huck" <cohuck@redhat.com>,
"Daniel P . Berrangé" <berrange@redhat.com>,
"Eric Blake" <eblake@redhat.com>,
"Markus Armbruster" <armbru@redhat.com>,
"Marcelo Tosatti" <mtosatti@redhat.com>
Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, xiaoyao.li@intel.com,
Michael Roth <michael.roth@amd.com>,
Sean Christopherson <seanjc@google.com>,
Claudio Fontana <cfontana@suse.de>,
Gerd Hoffmann <kraxel@redhat.com>,
Isaku Yamahata <isaku.yamahata@gmail.com>,
Chenyi Qiang <chenyi.qiang@intel.com>
Subject: [PATCH v3 24/70] i386/kvm: Move architectural CPUID leaf generation to separate helper
Date: Wed, 15 Nov 2023 02:14:33 -0500 [thread overview]
Message-ID: <20231115071519.2864957-25-xiaoyao.li@intel.com> (raw)
In-Reply-To: <20231115071519.2864957-1-xiaoyao.li@intel.com>
From: Sean Christopherson <sean.j.christopherson@intel.com>
Move the architectural (for lack of a better term) CPUID leaf generation
to a separate helper so that the generation code can be reused by TDX,
which needs to generate a canonical VM-scoped configuration.
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
---
target/i386/kvm/kvm.c | 454 +++++++++++++++++++------------------
target/i386/kvm/kvm_i386.h | 3 +
2 files changed, 235 insertions(+), 222 deletions(-)
diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
index f2627dd61d2b..dafe4d262977 100644
--- a/target/i386/kvm/kvm.c
+++ b/target/i386/kvm/kvm.c
@@ -1733,6 +1733,236 @@ static void kvm_init_nested_state(CPUX86State *env)
}
}
+uint32_t kvm_x86_arch_cpuid(CPUX86State *env, struct kvm_cpuid_entry2 *entries,
+ uint32_t cpuid_i)
+{
+ uint32_t limit, i, j;
+ uint32_t unused;
+ struct kvm_cpuid_entry2 *c;
+
+ cpu_x86_cpuid(env, 0, 0, &limit, &unused, &unused, &unused);
+
+ for (i = 0; i <= limit; i++) {
+ if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
+ fprintf(stderr, "unsupported level value: 0x%x\n", limit);
+ abort();
+ }
+ c = &entries[cpuid_i++];
+
+ switch (i) {
+ case 2: {
+ /* Keep reading function 2 till all the input is received */
+ int times;
+
+ c->function = i;
+ c->flags = KVM_CPUID_FLAG_STATEFUL_FUNC |
+ KVM_CPUID_FLAG_STATE_READ_NEXT;
+ cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
+ times = c->eax & 0xff;
+
+ for (j = 1; j < times; ++j) {
+ if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
+ fprintf(stderr, "cpuid_data is full, no space for "
+ "cpuid(eax:2):eax & 0xf = 0x%x\n", times);
+ abort();
+ }
+ c = &entries[cpuid_i++];
+ c->function = i;
+ c->flags = KVM_CPUID_FLAG_STATEFUL_FUNC;
+ cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
+ }
+ break;
+ }
+ case 0x1f:
+ if (env->nr_dies < 2) {
+ cpuid_i--;
+ break;
+ }
+ /* fallthrough */
+ case 4:
+ case 0xb:
+ case 0xd:
+ for (j = 0; ; j++) {
+ if (i == 0xd && j == 64) {
+ break;
+ }
+
+ c->function = i;
+ c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
+ c->index = j;
+ cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->edx);
+
+ if (i == 4 && c->eax == 0) {
+ break;
+ }
+ if (i == 0xb && !(c->ecx & 0xff00)) {
+ break;
+ }
+ if (i == 0x1f && !(c->ecx & 0xff00)) {
+ break;
+ }
+ if (i == 0xd && c->eax == 0) {
+ continue;
+ }
+ if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
+ fprintf(stderr, "cpuid_data is full, no space for "
+ "cpuid(eax:0x%x,ecx:0x%x)\n", i, j);
+ abort();
+ }
+ c = &entries[cpuid_i++];
+ }
+ break;
+ case 0x7:
+ case 0x12:
+ for (j = 0; ; j++) {
+ c->function = i;
+ c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
+ c->index = j;
+ cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->edx);
+
+ if (j > 1 && (c->eax & 0xf) != 1) {
+ break;
+ }
+
+ if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
+ fprintf(stderr, "cpuid_data is full, no space for "
+ "cpuid(eax:0x12,ecx:0x%x)\n", j);
+ abort();
+ }
+ c = &entries[cpuid_i++];
+ }
+ break;
+ case 0x14:
+ case 0x1d:
+ case 0x1e: {
+ uint32_t times;
+
+ c->function = i;
+ c->index = 0;
+ c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
+ cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
+ times = c->eax;
+
+ for (j = 1; j <= times; ++j) {
+ if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
+ fprintf(stderr, "cpuid_data is full, no space for "
+ "cpuid(eax:0x%x,ecx:0x%x)\n", i, j);
+ abort();
+ }
+ c = &entries[cpuid_i++];
+ c->function = i;
+ c->index = j;
+ c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
+ cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->edx);
+ }
+ break;
+ }
+ default:
+ c->function = i;
+ c->flags = 0;
+ cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
+ if (!c->eax && !c->ebx && !c->ecx && !c->edx) {
+ /*
+ * KVM already returns all zeroes if a CPUID entry is missing,
+ * so we can omit it and avoid hitting KVM's 80-entry limit.
+ */
+ cpuid_i--;
+ }
+ break;
+ }
+ }
+
+ if (limit >= 0x0a) {
+ uint32_t eax, edx;
+
+ cpu_x86_cpuid(env, 0x0a, 0, &eax, &unused, &unused, &edx);
+
+ has_architectural_pmu_version = eax & 0xff;
+ if (has_architectural_pmu_version > 0) {
+ num_architectural_pmu_gp_counters = (eax & 0xff00) >> 8;
+
+ /* Shouldn't be more than 32, since that's the number of bits
+ * available in EBX to tell us _which_ counters are available.
+ * Play it safe.
+ */
+ if (num_architectural_pmu_gp_counters > MAX_GP_COUNTERS) {
+ num_architectural_pmu_gp_counters = MAX_GP_COUNTERS;
+ }
+
+ if (has_architectural_pmu_version > 1) {
+ num_architectural_pmu_fixed_counters = edx & 0x1f;
+
+ if (num_architectural_pmu_fixed_counters > MAX_FIXED_COUNTERS) {
+ num_architectural_pmu_fixed_counters = MAX_FIXED_COUNTERS;
+ }
+ }
+ }
+ }
+
+ cpu_x86_cpuid(env, 0x80000000, 0, &limit, &unused, &unused, &unused);
+
+ for (i = 0x80000000; i <= limit; i++) {
+ if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
+ fprintf(stderr, "unsupported xlevel value: 0x%x\n", limit);
+ abort();
+ }
+ c = &entries[cpuid_i++];
+
+ switch (i) {
+ case 0x8000001d:
+ /* Query for all AMD cache information leaves */
+ for (j = 0; ; j++) {
+ c->function = i;
+ c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
+ c->index = j;
+ cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->edx);
+
+ if (c->eax == 0) {
+ break;
+ }
+ if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
+ fprintf(stderr, "cpuid_data is full, no space for "
+ "cpuid(eax:0x%x,ecx:0x%x)\n", i, j);
+ abort();
+ }
+ c = &entries[cpuid_i++];
+ }
+ break;
+ default:
+ c->function = i;
+ c->flags = 0;
+ cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
+ if (!c->eax && !c->ebx && !c->ecx && !c->edx) {
+ /*
+ * KVM already returns all zeroes if a CPUID entry is missing,
+ * so we can omit it and avoid hitting KVM's 80-entry limit.
+ */
+ cpuid_i--;
+ }
+ break;
+ }
+ }
+
+ /* Call Centaur's CPUID instructions they are supported. */
+ if (env->cpuid_xlevel2 > 0) {
+ cpu_x86_cpuid(env, 0xC0000000, 0, &limit, &unused, &unused, &unused);
+
+ for (i = 0xC0000000; i <= limit; i++) {
+ if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
+ fprintf(stderr, "unsupported xlevel2 value: 0x%x\n", limit);
+ abort();
+ }
+ c = &entries[cpuid_i++];
+
+ c->function = i;
+ c->flags = 0;
+ cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
+ }
+ }
+
+ return cpuid_i;
+}
+
int kvm_arch_init_vcpu(CPUState *cs)
{
struct {
@@ -1749,8 +1979,7 @@ int kvm_arch_init_vcpu(CPUState *cs)
X86CPU *cpu = X86_CPU(cs);
CPUX86State *env = &cpu->env;
- uint32_t limit, i, j, cpuid_i;
- uint32_t unused;
+ uint32_t cpuid_i;
struct kvm_cpuid_entry2 *c;
uint32_t signature[3];
int kvm_base = KVM_CPUID_SIGNATURE;
@@ -1903,8 +2132,6 @@ int kvm_arch_init_vcpu(CPUState *cs)
c->edx = env->features[FEAT_KVM_HINTS];
}
- cpu_x86_cpuid(env, 0, 0, &limit, &unused, &unused, &unused);
-
if (cpu->kvm_pv_enforce_cpuid) {
r = kvm_vcpu_enable_cap(cs, KVM_CAP_ENFORCE_PV_FEATURE_CPUID, 0, 1);
if (r < 0) {
@@ -1915,224 +2142,7 @@ int kvm_arch_init_vcpu(CPUState *cs)
}
}
- for (i = 0; i <= limit; i++) {
- if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
- fprintf(stderr, "unsupported level value: 0x%x\n", limit);
- abort();
- }
- c = &cpuid_data.entries[cpuid_i++];
-
- switch (i) {
- case 2: {
- /* Keep reading function 2 till all the input is received */
- int times;
-
- c->function = i;
- c->flags = KVM_CPUID_FLAG_STATEFUL_FUNC |
- KVM_CPUID_FLAG_STATE_READ_NEXT;
- cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
- times = c->eax & 0xff;
-
- for (j = 1; j < times; ++j) {
- if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
- fprintf(stderr, "cpuid_data is full, no space for "
- "cpuid(eax:2):eax & 0xf = 0x%x\n", times);
- abort();
- }
- c = &cpuid_data.entries[cpuid_i++];
- c->function = i;
- c->flags = KVM_CPUID_FLAG_STATEFUL_FUNC;
- cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
- }
- break;
- }
- case 0x1f:
- if (env->nr_dies < 2) {
- cpuid_i--;
- break;
- }
- /* fallthrough */
- case 4:
- case 0xb:
- case 0xd:
- for (j = 0; ; j++) {
- if (i == 0xd && j == 64) {
- break;
- }
-
- c->function = i;
- c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
- c->index = j;
- cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->edx);
-
- if (i == 4 && c->eax == 0) {
- break;
- }
- if (i == 0xb && !(c->ecx & 0xff00)) {
- break;
- }
- if (i == 0x1f && !(c->ecx & 0xff00)) {
- break;
- }
- if (i == 0xd && c->eax == 0) {
- continue;
- }
- if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
- fprintf(stderr, "cpuid_data is full, no space for "
- "cpuid(eax:0x%x,ecx:0x%x)\n", i, j);
- abort();
- }
- c = &cpuid_data.entries[cpuid_i++];
- }
- break;
- case 0x7:
- case 0x12:
- for (j = 0; ; j++) {
- c->function = i;
- c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
- c->index = j;
- cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->edx);
-
- if (j > 1 && (c->eax & 0xf) != 1) {
- break;
- }
-
- if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
- fprintf(stderr, "cpuid_data is full, no space for "
- "cpuid(eax:0x12,ecx:0x%x)\n", j);
- abort();
- }
- c = &cpuid_data.entries[cpuid_i++];
- }
- break;
- case 0x14:
- case 0x1d:
- case 0x1e: {
- uint32_t times;
-
- c->function = i;
- c->index = 0;
- c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
- cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
- times = c->eax;
-
- for (j = 1; j <= times; ++j) {
- if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
- fprintf(stderr, "cpuid_data is full, no space for "
- "cpuid(eax:0x%x,ecx:0x%x)\n", i, j);
- abort();
- }
- c = &cpuid_data.entries[cpuid_i++];
- c->function = i;
- c->index = j;
- c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
- cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->edx);
- }
- break;
- }
- default:
- c->function = i;
- c->flags = 0;
- cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
- if (!c->eax && !c->ebx && !c->ecx && !c->edx) {
- /*
- * KVM already returns all zeroes if a CPUID entry is missing,
- * so we can omit it and avoid hitting KVM's 80-entry limit.
- */
- cpuid_i--;
- }
- break;
- }
- }
-
- if (limit >= 0x0a) {
- uint32_t eax, edx;
-
- cpu_x86_cpuid(env, 0x0a, 0, &eax, &unused, &unused, &edx);
-
- has_architectural_pmu_version = eax & 0xff;
- if (has_architectural_pmu_version > 0) {
- num_architectural_pmu_gp_counters = (eax & 0xff00) >> 8;
-
- /* Shouldn't be more than 32, since that's the number of bits
- * available in EBX to tell us _which_ counters are available.
- * Play it safe.
- */
- if (num_architectural_pmu_gp_counters > MAX_GP_COUNTERS) {
- num_architectural_pmu_gp_counters = MAX_GP_COUNTERS;
- }
-
- if (has_architectural_pmu_version > 1) {
- num_architectural_pmu_fixed_counters = edx & 0x1f;
-
- if (num_architectural_pmu_fixed_counters > MAX_FIXED_COUNTERS) {
- num_architectural_pmu_fixed_counters = MAX_FIXED_COUNTERS;
- }
- }
- }
- }
-
- cpu_x86_cpuid(env, 0x80000000, 0, &limit, &unused, &unused, &unused);
-
- for (i = 0x80000000; i <= limit; i++) {
- if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
- fprintf(stderr, "unsupported xlevel value: 0x%x\n", limit);
- abort();
- }
- c = &cpuid_data.entries[cpuid_i++];
-
- switch (i) {
- case 0x8000001d:
- /* Query for all AMD cache information leaves */
- for (j = 0; ; j++) {
- c->function = i;
- c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
- c->index = j;
- cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->edx);
-
- if (c->eax == 0) {
- break;
- }
- if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
- fprintf(stderr, "cpuid_data is full, no space for "
- "cpuid(eax:0x%x,ecx:0x%x)\n", i, j);
- abort();
- }
- c = &cpuid_data.entries[cpuid_i++];
- }
- break;
- default:
- c->function = i;
- c->flags = 0;
- cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
- if (!c->eax && !c->ebx && !c->ecx && !c->edx) {
- /*
- * KVM already returns all zeroes if a CPUID entry is missing,
- * so we can omit it and avoid hitting KVM's 80-entry limit.
- */
- cpuid_i--;
- }
- break;
- }
- }
-
- /* Call Centaur's CPUID instructions they are supported. */
- if (env->cpuid_xlevel2 > 0) {
- cpu_x86_cpuid(env, 0xC0000000, 0, &limit, &unused, &unused, &unused);
-
- for (i = 0xC0000000; i <= limit; i++) {
- if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
- fprintf(stderr, "unsupported xlevel2 value: 0x%x\n", limit);
- abort();
- }
- c = &cpuid_data.entries[cpuid_i++];
-
- c->function = i;
- c->flags = 0;
- cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
- }
- }
-
+ cpuid_i = kvm_x86_arch_cpuid(env, cpuid_data.entries, cpuid_i);
cpuid_data.cpuid.nent = cpuid_i;
if (((env->cpuid_version >> 8)&0xF) >= 6
diff --git a/target/i386/kvm/kvm_i386.h b/target/i386/kvm/kvm_i386.h
index c3ef46a97a7b..cbf52c1c6d17 100644
--- a/target/i386/kvm/kvm_i386.h
+++ b/target/i386/kvm/kvm_i386.h
@@ -24,6 +24,9 @@
#define kvm_ioapic_in_kernel() \
(kvm_irqchip_in_kernel() && !kvm_irqchip_is_split())
+uint32_t kvm_x86_arch_cpuid(CPUX86State *env, struct kvm_cpuid_entry2 *entries,
+ uint32_t cpuid_i);
+
#else
#define kvm_pit_in_kernel() 0
--
2.34.1
next prev parent reply other threads:[~2023-11-15 7:18 UTC|newest]
Thread overview: 161+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-15 7:14 [PATCH v3 00/70] QEMU Guest memfd + QEMU TDX support Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 01/70] *** HACK *** linux-headers: Update headers to pull in gmem APIs Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 02/70] RAMBlock: Add support of KVM private guest memfd Xiaoyao Li
2023-11-15 10:20 ` Daniel P. Berrangé
2023-11-16 3:34 ` Xiaoyao Li
2023-11-15 17:54 ` David Hildenbrand
2023-11-16 2:45 ` Xiaoyao Li
2023-11-20 9:19 ` David Hildenbrand
2023-11-30 7:35 ` Xiaoyao Li
2023-11-17 20:35 ` Isaku Yamahata
2023-11-30 8:31 ` Xiaoyao Li
2023-11-20 9:24 ` David Hildenbrand
2023-11-30 7:37 ` Xiaoyao Li
2023-11-30 11:01 ` David Hildenbrand
2023-11-15 7:14 ` [PATCH v3 03/70] RAMBlock/guest_memfd: Enable KVM_GUEST_MEMFD_ALLOW_HUGEPAGE Xiaoyao Li
2023-11-15 18:10 ` David Hildenbrand
2023-11-16 2:47 ` Xiaoyao Li
2023-11-20 9:26 ` David Hildenbrand
2023-11-30 7:32 ` Xiaoyao Li
2023-11-30 10:59 ` David Hildenbrand
2023-11-30 16:01 ` Sean Christopherson
2023-11-30 16:54 ` David Hildenbrand
2023-11-30 17:46 ` Peter Xu
2023-11-30 17:57 ` David Hildenbrand
2023-11-30 18:09 ` David Hildenbrand
2023-11-30 17:51 ` Daniel P. Berrangé
2023-11-30 18:22 ` David Hildenbrand
2023-12-01 11:22 ` Claudio Fontana
2023-11-30 8:00 ` Xiaoyao Li
2023-12-01 11:00 ` David Hildenbrand
2023-11-15 7:14 ` [PATCH v3 04/70] HostMem: Add mechanism to opt in kvm guest memfd via MachineState Xiaoyao Li
2023-11-15 18:14 ` David Hildenbrand
2023-11-16 2:53 ` Xiaoyao Li
2023-11-20 9:30 ` David Hildenbrand
2023-11-30 7:38 ` Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 05/70] kvm: Enable KVM_SET_USER_MEMORY_REGION2 for memslot Xiaoyao Li
2023-11-17 20:50 ` Isaku Yamahata
2023-12-04 6:48 ` Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 06/70] kvm: Introduce support for memory_attributes Xiaoyao Li
2023-11-15 10:38 ` Daniel P. Berrangé
2023-11-16 3:40 ` Xiaoyao Li
2023-12-12 13:56 ` Wang, Wei W
2023-12-21 6:11 ` Xiaoyao Li
2023-12-21 10:36 ` Wang, Wei W
2023-12-21 11:53 ` Xiaoyao Li
2023-12-21 13:47 ` Wang, Wei W
2024-01-09 5:47 ` Xiaoyao Li
2024-01-09 14:53 ` Wang, Wei W
2024-01-09 16:32 ` Xiaoyao Li
2024-01-10 1:53 ` Wang, Wei W
2023-11-15 7:14 ` [PATCH v3 07/70] physmem: Relax the alignment check of host_startaddr in ram_block_discard_range() Xiaoyao Li
2023-11-15 18:20 ` David Hildenbrand
2023-11-16 2:56 ` Xiaoyao Li
2023-11-20 9:56 ` David Hildenbrand
2023-12-04 7:35 ` Xiaoyao Li
2023-12-04 7:53 ` Xiaoyao Li
2023-12-04 9:52 ` David Hildenbrand
2023-11-15 7:14 ` [PATCH v3 08/70] physmem: replace function name with __func__ " Xiaoyao Li
2023-11-15 18:21 ` David Hildenbrand
2023-12-04 7:40 ` Xiaoyao Li
2023-12-04 9:49 ` David Hildenbrand
2023-11-15 7:14 ` [PATCH v3 09/70] physmem: Introduce ram_block_convert_range() for page conversion Xiaoyao Li
2023-11-17 21:03 ` Isaku Yamahata
2023-12-08 7:59 ` Xiaoyao Li
2023-12-08 11:52 ` David Hildenbrand
2023-12-21 6:18 ` Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 10/70] kvm: handle KVM_EXIT_MEMORY_FAULT Xiaoyao Li
2023-11-15 10:42 ` Daniel P. Berrangé
2023-11-16 5:16 ` Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 11/70] trace/kvm: Add trace for page convertion between shared and private Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 12/70] *** HACK *** linux-headers: Update headers to pull in TDX API changes Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 13/70] i386: Introduce tdx-guest object Xiaoyao Li
2023-12-01 10:52 ` Markus Armbruster
2023-12-04 7:59 ` Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 14/70] target/i386: Implement mc->kvm_type() to get VM type Xiaoyao Li
2023-11-15 10:49 ` Daniel P. Berrangé
2023-11-16 6:22 ` Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 15/70] target/i386: Parse TDX vm type Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 16/70] target/i386: Introduce kvm_confidential_guest_init() Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 17/70] i386/tdx: Implement tdx_kvm_init() to initialize TDX VM context Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 18/70] i386/tdx: Get tdx_capabilities via KVM_TDX_CAPABILITIES Xiaoyao Li
2023-11-15 10:54 ` Daniel P. Berrangé
2023-12-07 7:18 ` Xiaoyao Li
2023-11-17 21:18 ` Isaku Yamahata
2023-12-07 7:16 ` Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 19/70] i386/tdx: Introduce is_tdx_vm() helper and cache tdx_guest object Xiaoyao Li
2023-11-17 21:20 ` Isaku Yamahata
2023-11-15 7:14 ` [PATCH v3 20/70] i386/tdx: Adjust the supported CPUID based on TDX restrictions Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 21/70] i386/tdx: Update tdx_cpuid_lookup[].tdx_fixed0/1 by tdx_caps.cpuid_config[] Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 22/70] i386/tdx: Integrate tdx_caps->xfam_fixed0/1 into tdx_cpuid_lookup Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 23/70] i386/tdx: Integrate tdx_caps->attrs_fixed0/1 to tdx_cpuid_lookup Xiaoyao Li
2023-11-15 7:14 ` Xiaoyao Li [this message]
2023-11-15 7:14 ` [PATCH v3 25/70] kvm: Introduce kvm_arch_pre_create_vcpu() Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 26/70] i386/tdx: Initialize TDX before creating TD vcpus Xiaoyao Li
2023-11-15 11:01 ` Daniel P. Berrangé
2023-12-04 8:28 ` Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 27/70] i386/tdx: Add property sept-ve-disable for tdx-guest object Xiaoyao Li
2023-12-01 10:53 ` Markus Armbruster
2023-11-15 7:14 ` [PATCH v3 28/70] i386/tdx: Make sept_ve_disable set by default Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 29/70] i386/tdx: Wire CPU features up with attributes of TD guest Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 30/70] i386/tdx: Validate TD attributes Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 31/70] i386/tdx: Allows mrconfigid/mrowner/mrownerconfig for TDX_INIT_VM Xiaoyao Li
2023-11-15 17:32 ` Daniel P. Berrangé
2023-12-01 11:00 ` Markus Armbruster
2023-12-14 3:07 ` Xiaoyao Li
2023-12-18 13:46 ` Markus Armbruster
2023-12-19 8:27 ` Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 32/70] i386/tdx: Implement user specified tsc frequency Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 33/70] i386/tdx: Set kvm_readonly_mem_enabled to false for TDX VM Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 34/70] kvm/memory: Introduce the infrastructure to set the default shared/private value Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 35/70] i386/tdx: Make memory type private by default Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 36/70] kvm/tdx: Don't complain when converting vMMIO region to shared Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 37/70] kvm/tdx: Ignore memory conversion to shared of unassigned region Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 38/70] i386/tdvf: Introduce function to parse TDVF metadata Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 39/70] i386/tdx: Parse TDVF metadata for TDX VM Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 40/70] i386/tdx: Skip BIOS shadowing setup Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 41/70] i386/tdx: Don't initialize pc.rom for TDX VMs Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 42/70] i386/tdx: Track mem_ptr for each firmware entry of TDVF Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 43/70] i386/tdx: Track RAM entries for TDX VM Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 44/70] headers: Add definitions from UEFI spec for volumes, resources, etc Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 45/70] i386/tdx: Setup the TD HOB list Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 46/70] i386/tdx: Add TDVF memory via KVM_TDX_INIT_MEM_REGION Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 47/70] memory: Introduce memory_region_init_ram_guest_memfd() Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 48/70] i386/tdx: register TDVF as private memory Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 49/70] i386/tdx: Call KVM_TDX_INIT_VCPU to initialize TDX vcpu Xiaoyao Li
2023-11-15 7:14 ` [PATCH v3 50/70] i386/tdx: Finalize TDX VM Xiaoyao Li
2023-11-15 7:15 ` [PATCH v3 51/70] i386/tdx: handle TDG.VP.VMCALL<SetupEventNotifyInterrupt> Xiaoyao Li
2023-11-15 7:15 ` [PATCH v3 52/70] i386/tdx: handle TDG.VP.VMCALL<GetQuote> Xiaoyao Li
2023-11-15 17:51 ` Daniel P. Berrangé
2023-11-15 17:58 ` Daniel P. Berrangé
2023-12-29 2:30 ` Xiaoyao Li
2024-01-08 14:44 ` Daniel P. Berrangé
2024-01-09 5:38 ` Xiaoyao Li
2023-12-01 11:02 ` Markus Armbruster
2023-12-07 7:38 ` Xiaoyao Li
2023-12-07 9:20 ` Markus Armbruster
2023-12-21 11:05 ` Daniel P. Berrangé
2023-12-22 3:14 ` Xiaoyao Li
2023-12-22 13:14 ` Daniel P. Berrangé
2023-12-25 12:34 ` Xiaoyao Li
2023-11-15 7:15 ` [PATCH v3 53/70] i386/tdx: setup a timer for the qio channel Xiaoyao Li
2023-11-15 18:02 ` Daniel P. Berrangé
2023-11-15 7:15 ` [PATCH v3 54/70] i386/tdx: handle TDG.VP.VMCALL<MapGPA> hypercall Xiaoyao Li
2023-11-15 7:15 ` [PATCH v3 55/70] i386/tdx: Limit the range size for MapGPA Xiaoyao Li
2023-11-15 7:15 ` [PATCH v3 56/70] i386/tdx: Handle TDG.VP.VMCALL<REPORT_FATAL_ERROR> Xiaoyao Li
2023-11-15 7:15 ` [PATCH v3 57/70] i386/tdx: Wire TDX_REPORT_FATAL_ERROR with GuestPanic facility Xiaoyao Li
2023-12-01 11:11 ` Markus Armbruster
2023-12-07 8:11 ` Xiaoyao Li
2023-11-15 7:15 ` [PATCH v3 58/70] pci-host/q35: Move PAM initialization above SMRAM initialization Xiaoyao Li
2023-11-15 7:15 ` [PATCH v3 59/70] q35: Introduce smm_ranges property for q35-pci-host Xiaoyao Li
2023-11-15 7:15 ` [PATCH v3 60/70] i386/tdx: Disable SMM for TDX VMs Xiaoyao Li
2023-11-15 7:15 ` [PATCH v3 61/70] i386/tdx: Disable PIC " Xiaoyao Li
2023-11-15 7:15 ` [PATCH v3 62/70] i386/tdx: Don't allow system reset " Xiaoyao Li
2023-11-15 7:15 ` [PATCH v3 63/70] i386/tdx: LMCE is not supported for TDX Xiaoyao Li
2023-11-15 7:15 ` [PATCH v3 64/70] hw/i386: add eoi_intercept_unsupported member to X86MachineState Xiaoyao Li
2023-11-15 7:15 ` [PATCH v3 65/70] hw/i386: add option to forcibly report edge trigger in acpi tables Xiaoyao Li
2023-11-15 7:15 ` [PATCH v3 66/70] i386/tdx: Don't synchronize guest tsc for TDs Xiaoyao Li
2023-11-15 7:15 ` [PATCH v3 67/70] i386/tdx: Only configure MSR_IA32_UCODE_REV in kvm_init_msrs() " Xiaoyao Li
2023-11-15 7:15 ` [PATCH v3 68/70] i386/tdx: Skip kvm_put_apicbase() " Xiaoyao Li
2023-11-15 7:15 ` [PATCH v3 69/70] i386/tdx: Don't get/put guest state for TDX VMs Xiaoyao Li
2023-11-15 7:15 ` [PATCH v3 70/70] docs: Add TDX documentation Xiaoyao Li
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