From: Thomas Huth <thuth@redhat.com>
To: "Alex Bennée" <alex.bennee@linaro.org>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
qemu-devel@nongnu.org
Cc: Wainer dos Santos Moschetta <wainersm@redhat.com>,
Beraldo Leal <bleal@redhat.com>, Cleber Rosa <crosa@redhat.com>,
Ani Sinha <anisinha@redhat.com>
Subject: [PATCH] tests/avocado/mem-addr-space-check: Replace assertEquals() for Python 3.12
Date: Thu, 16 Nov 2023 07:19:56 +0100 [thread overview]
Message-ID: <20231116061956.14676-1-thuth@redhat.com> (raw)
assertEquals() has been removed in Python 3.12 and should be replaced by
assertEqual(). See: https://docs.python.org/3.12/whatsnew/3.12.html#id3
Signed-off-by: Thomas Huth <thuth@redhat.com>
---
Note: The test has just been merged, that's why I missed this file in
my earlier patch that replaces the assertEquals()
tests/avocado/mem-addr-space-check.py | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/tests/avocado/mem-addr-space-check.py b/tests/avocado/mem-addr-space-check.py
index be949222a4..363c3f12a6 100644
--- a/tests/avocado/mem-addr-space-check.py
+++ b/tests/avocado/mem-addr-space-check.py
@@ -49,7 +49,7 @@ def test_phybits_low_pse36(self):
self.vm.set_qmp_monitor(enabled=False)
self.vm.launch()
self.vm.wait()
- self.assertEquals(self.vm.exitcode(), 1, "QEMU exit code should be 1")
+ self.assertEqual(self.vm.exitcode(), 1, "QEMU exit code should be 1")
self.assertRegex(self.vm.get_log(), r'phys-bits too low')
def test_phybits_low_pae(self):
@@ -69,7 +69,7 @@ def test_phybits_low_pae(self):
self.vm.set_qmp_monitor(enabled=False)
self.vm.launch()
self.vm.wait()
- self.assertEquals(self.vm.exitcode(), 1, "QEMU exit code should be 1")
+ self.assertEqual(self.vm.exitcode(), 1, "QEMU exit code should be 1")
self.assertRegex(self.vm.get_log(), r'phys-bits too low')
def test_phybits_ok_pentium_pse36(self):
@@ -149,7 +149,7 @@ def test_phybits_low_nonpse36(self):
self.vm.set_qmp_monitor(enabled=False)
self.vm.launch()
self.vm.wait()
- self.assertEquals(self.vm.exitcode(), 1, "QEMU exit code should be 1")
+ self.assertEqual(self.vm.exitcode(), 1, "QEMU exit code should be 1")
self.assertRegex(self.vm.get_log(), r'phys-bits too low')
# now lets test some 64-bit CPU cases.
@@ -179,7 +179,7 @@ def test_phybits_low_tcg_q35_70_amd(self):
self.vm.set_qmp_monitor(enabled=False)
self.vm.launch()
self.vm.wait()
- self.assertEquals(self.vm.exitcode(), 1, "QEMU exit code should be 1")
+ self.assertEqual(self.vm.exitcode(), 1, "QEMU exit code should be 1")
self.assertRegex(self.vm.get_log(), r'phys-bits too low')
def test_phybits_low_tcg_q35_71_amd(self):
@@ -202,7 +202,7 @@ def test_phybits_low_tcg_q35_71_amd(self):
self.vm.set_qmp_monitor(enabled=False)
self.vm.launch()
self.vm.wait()
- self.assertEquals(self.vm.exitcode(), 1, "QEMU exit code should be 1")
+ self.assertEqual(self.vm.exitcode(), 1, "QEMU exit code should be 1")
self.assertRegex(self.vm.get_log(), r'phys-bits too low')
def test_phybits_ok_tcg_q35_70_amd(self):
@@ -288,7 +288,7 @@ def test_phybits_low_tcg_q35_71_amd_41bits(self):
self.vm.set_qmp_monitor(enabled=False)
self.vm.launch()
self.vm.wait()
- self.assertEquals(self.vm.exitcode(), 1, "QEMU exit code should be 1")
+ self.assertEqual(self.vm.exitcode(), 1, "QEMU exit code should be 1")
self.assertRegex(self.vm.get_log(), r'phys-bits too low')
def test_phybits_ok_tcg_q35_71_amd_41bits(self):
@@ -332,7 +332,7 @@ def test_phybits_low_tcg_q35_intel_cxl(self):
self.vm.set_qmp_monitor(enabled=False)
self.vm.launch()
self.vm.wait()
- self.assertEquals(self.vm.exitcode(), 1, "QEMU exit code should be 1")
+ self.assertEqual(self.vm.exitcode(), 1, "QEMU exit code should be 1")
self.assertRegex(self.vm.get_log(), r'phys-bits too low')
def test_phybits_ok_tcg_q35_intel_cxl(self):
--
2.41.0
next reply other threads:[~2023-11-16 6:20 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-16 6:19 Thomas Huth [this message]
2023-11-16 6:59 ` [PATCH] tests/avocado/mem-addr-space-check: Replace assertEquals() for Python 3.12 Philippe Mathieu-Daudé
2023-11-16 7:26 ` Ani Sinha
2023-11-16 8:39 ` Ani Sinha
2024-01-24 13:13 ` Philippe Mathieu-Daudé
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