From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Subbaraya Sundeep" <sundeep.lkml@gmail.com>,
"Arnaud Minier" <arnaud.minier@telecom-paris.fr>,
"Igor Mammedov" <imammedo@redhat.com>,
"Laurent Vivier" <laurent@vivier.eu>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Tyrone Ting" <kfting@nuvoton.com>,
"Hao Wu" <wuhaotsh@google.com>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Felipe Balbi" <balbi@kernel.org>,
qemu-arm@nongnu.org, "Inès Varhol" <ines.varhol@telecom-paris.fr>,
"Alistair Francis" <alistair@alistair23.me>,
"Yanan Wang" <wangyanan55@huawei.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Eduardo Habkost" <eduardo@habkost.net>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Helge Deller" <deller@gmx.de>,
"Subbaraya Sundeep" <sbhatta@marvell.com>,
"Alexandre Iooss" <erdnaxe@crans.org>,
"Gavin Shan" <gshan@redhat.com>
Subject: [PATCH-for-8.2? v2 4/4] hw/arm/stm32f100: Report error when incorrect CPU is used
Date: Fri, 17 Nov 2023 08:17:04 +0100 [thread overview]
Message-ID: <20231117071704.35040-5-philmd@linaro.org> (raw)
In-Reply-To: <20231117071704.35040-1-philmd@linaro.org>
The 'stm32vldiscovery' machine ignores the CPU type requested by
the command line. This might confuse users, since the following
will create a machine with a Cortex-M3 CPU:
$ qemu-system-aarch64 -M stm32vldiscovery -cpu neoverse-n1
Set the MachineClass::valid_cpu_types field (introduced in commit
c9cf636d48 "machine: Add a valid_cpu_types property").
Remove the now unused MachineClass::default_cpu_type field.
We now get:
$ qemu-system-aarch64 -M stm32vldiscovery -cpu neoverse-n1
qemu-system-aarch64: Invalid CPU type: neoverse-n1-arm-cpu
The valid types are: cortex-m3-arm-cpu
Since the SoC family can only use Cortex-M3 CPUs, hard-code the
CPU type name at the SoC level, removing the QOM property
entirely.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/arm/stm32f100_soc.h | 4 ----
hw/arm/stm32f100_soc.c | 9 ++-------
hw/arm/stm32vldiscovery.c | 7 ++++++-
3 files changed, 8 insertions(+), 12 deletions(-)
diff --git a/include/hw/arm/stm32f100_soc.h b/include/hw/arm/stm32f100_soc.h
index 40cd415b28..a74d7b369c 100644
--- a/include/hw/arm/stm32f100_soc.h
+++ b/include/hw/arm/stm32f100_soc.h
@@ -43,12 +43,8 @@ OBJECT_DECLARE_SIMPLE_TYPE(STM32F100State, STM32F100_SOC)
#define SRAM_SIZE (8 * 1024)
struct STM32F100State {
- /*< private >*/
SysBusDevice parent_obj;
- /*< public >*/
- char *cpu_type;
-
ARMv7MState armv7m;
STM32F2XXUsartState usart[STM_NUM_USARTS];
diff --git a/hw/arm/stm32f100_soc.c b/hw/arm/stm32f100_soc.c
index f7b344ba9f..b90d440d7a 100644
--- a/hw/arm/stm32f100_soc.c
+++ b/hw/arm/stm32f100_soc.c
@@ -115,7 +115,7 @@ static void stm32f100_soc_realize(DeviceState *dev_soc, Error **errp)
/* Init ARMv7m */
armv7m = DEVICE(&s->armv7m);
qdev_prop_set_uint32(armv7m, "num-irq", 61);
- qdev_prop_set_string(armv7m, "cpu-type", s->cpu_type);
+ qdev_prop_set_string(armv7m, "cpu-type", ARM_CPU_TYPE_NAME("cortex-m3"));
qdev_prop_set_bit(armv7m, "enable-bitband", true);
qdev_connect_clock_in(armv7m, "cpuclk", s->sysclk);
qdev_connect_clock_in(armv7m, "refclk", s->refclk);
@@ -180,17 +180,12 @@ static void stm32f100_soc_realize(DeviceState *dev_soc, Error **errp)
create_unimplemented_device("CRC", 0x40023000, 0x400);
}
-static Property stm32f100_soc_properties[] = {
- DEFINE_PROP_STRING("cpu-type", STM32F100State, cpu_type),
- DEFINE_PROP_END_OF_LIST(),
-};
-
static void stm32f100_soc_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = stm32f100_soc_realize;
- device_class_set_props(dc, stm32f100_soc_properties);
+ /* No vmstate or reset required: device has no internal state */
}
static const TypeInfo stm32f100_soc_info = {
diff --git a/hw/arm/stm32vldiscovery.c b/hw/arm/stm32vldiscovery.c
index 67675e952f..190db6118b 100644
--- a/hw/arm/stm32vldiscovery.c
+++ b/hw/arm/stm32vldiscovery.c
@@ -47,7 +47,6 @@ static void stm32vldiscovery_init(MachineState *machine)
clock_set_hz(sysclk, SYSCLK_FRQ);
dev = qdev_new(TYPE_STM32F100_SOC);
- qdev_prop_set_string(dev, "cpu-type", ARM_CPU_TYPE_NAME("cortex-m3"));
qdev_connect_clock_in(dev, "sysclk", sysclk);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
@@ -58,8 +57,14 @@ static void stm32vldiscovery_init(MachineState *machine)
static void stm32vldiscovery_machine_init(MachineClass *mc)
{
+ static const char * const valid_cpu_types[] = {
+ ARM_CPU_TYPE_NAME("cortex-m3"),
+ NULL
+ };
+
mc->desc = "ST STM32VLDISCOVERY (Cortex-M3)";
mc->init = stm32vldiscovery_init;
+ mc->valid_cpu_types = valid_cpu_types;
}
DEFINE_MACHINE("stm32vldiscovery", stm32vldiscovery_machine_init)
--
2.41.0
next prev parent reply other threads:[~2023-11-17 7:18 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-17 7:17 [PATCH-for-8.2? v2 0/4] hw/arm/stm32xxx: Report error when incorrect CPU is used Philippe Mathieu-Daudé
2023-11-17 7:17 ` [PATCH-for-8.2? v2 1/4] hw/core/machine: Constify MachineClass::valid_cpu_types[] Philippe Mathieu-Daudé
2023-11-17 7:17 ` [PATCH-for-8.2? v2 2/4] hw/arm/stm32f405: Report error when incorrect CPU is used Philippe Mathieu-Daudé
2023-11-20 7:16 ` Gavin Shan
2023-11-24 13:13 ` Igor Mammedov
2023-11-24 13:21 ` Philippe Mathieu-Daudé
2023-12-06 0:12 ` Alistair Francis
2023-11-17 7:17 ` [PATCH-for-8.2? v2 3/4] hw/arm/stm32f205: " Philippe Mathieu-Daudé
2023-11-20 7:16 ` Gavin Shan
2023-11-17 7:17 ` Philippe Mathieu-Daudé [this message]
2023-11-20 7:17 ` [PATCH-for-8.2? v2 4/4] hw/arm/stm32f100: " Gavin Shan
2023-11-20 15:31 ` [PATCH-for-8.2? v2 0/4] hw/arm/stm32xxx: " Peter Maydell
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