[PATCH 0/2] HPPA64-PATCHES-for-8.2

[PATCH 0/2] HPPA64-PATCHES-for-8.2

[deller]

From: Helge Deller <deller@gmx.de>

Two HPPA64 patches which I'd like to get included for 8.2.

The SHRPD patch fixes a real translation bug which then allows to boot
the 64-bit Linux kernels of the Debian-11 and Debian-12 installation CDs.

The second patch adds the instruction byte sequence to the
assembly log. This is not an actual bug fix, but it's important since
it helps a lot when trying to fix qemu translation bugs on hppa.

Helge

Helge Deller (2):
  target/hppa: Fix 64-bit SHRPD instruction
  disas/hppa: Show hexcode of instruction along with disassembly

 disas/hppa.c            | 3 +++
 target/hppa/translate.c | 4 ++--
 2 files changed, 5 insertions(+), 2 deletions(-)

-- 
2.41.0

[PATCH 1/2] target/hppa: Fix 64-bit SHRPD instruction

[deller]

From: Helge Deller <deller@gmx.de>

When shifting the two joined 64-bit registers right, shift the lower
64-bit register to the left and the higher 64-bit register to the right
before merging them with OR.

Signed-off-by: Helge Deller <deller@gmx.de>
---
 target/hppa/translate.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 4a4830c3e3..3ef39b1bd7 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -3438,9 +3438,9 @@ static bool trans_shrp_sar(DisasContext *ctx, arg_shrp_sar *a)
             TCGv_i64 n = tcg_temp_new_i64();
 
             tcg_gen_xori_i64(n, cpu_sar, 63);
-            tcg_gen_shl_i64(t, src2, n);
+            tcg_gen_shl_i64(t, src1, n);
             tcg_gen_shli_i64(t, t, 1);
-            tcg_gen_shr_i64(dest, src1, cpu_sar);
+            tcg_gen_shr_i64(dest, src2, cpu_sar);
             tcg_gen_or_i64(dest, dest, t);
         } else {
             TCGv_i64 t = tcg_temp_new_i64();
-- 
2.41.0

[PATCH 2/2] disas/hppa: Show hexcode of instruction along with disassembly

[deller]

From: Helge Deller <deller@gmx.de>

On hppa many instructions can be expressed by different bytecodes.
To be able to debug qemu translation bugs it's therefore necessary to see the
currently executed byte codes without the need to lookup the sequence without
the full executable.
With this patch the instruction byte code is shown beside the disassembly.

Signed-off-by: Helge Deller <deller@gmx.de>
---
 disas/hppa.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/disas/hppa.c b/disas/hppa.c
index dcf9a47f34..38fc05acc4 100644
--- a/disas/hppa.c
+++ b/disas/hppa.c
@@ -1979,6 +1979,9 @@ print_insn_hppa (bfd_vma memaddr, disassemble_info *info)
 	  if (opcode->arch == pa20w)
 	    continue;
 #endif
+	  (*info->fprintf_func) (info->stream, " %02x %02x %02x %02x   ",
+                (insn >> 24) & 0xff, (insn >> 16) & 0xff,
+                (insn >>  8) & 0xff, insn & 0xff);
 	  (*info->fprintf_func) (info->stream, "%s", opcode->name);
 
 	  if (!strchr ("cfCY?-+nHNZFIuv{", opcode->args[0]))
-- 
2.41.0