* [PATCH-for-9.0 0/3] target/arm/tcg: Few non-TCG cleanups
@ 2023-11-30 14:25 Philippe Mathieu-Daudé
2023-11-30 14:25 ` [PATCH-for-9.0 1/3] target/arm: Restrict TCG specific helpers Philippe Mathieu-Daudé
` (4 more replies)
0 siblings, 5 replies; 6+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-30 14:25 UTC (permalink / raw)
To: qemu-devel; +Cc: qemu-arm, Peter Maydell, Philippe Mathieu-Daudé
Few non-TCG cleanups extracted from a bigger rework.
Philippe Mathieu-Daudé (3):
target/arm: Restrict TCG specific helpers
target/arm: Restrict DC CVAP & DC CVADP instructions to TCG accel
target/arm/tcg: Including missing 'exec/exec-all.h' header
target/arm/helper.c | 60 +++-------------------------------
target/arm/tcg/op_helper.c | 55 +++++++++++++++++++++++++++++++
target/arm/tcg/translate-a64.c | 1 +
3 files changed, 61 insertions(+), 55 deletions(-)
--
2.41.0
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH-for-9.0 1/3] target/arm: Restrict TCG specific helpers 2023-11-30 14:25 [PATCH-for-9.0 0/3] target/arm/tcg: Few non-TCG cleanups Philippe Mathieu-Daudé @ 2023-11-30 14:25 ` Philippe Mathieu-Daudé 2023-11-30 14:25 ` [PATCH-for-9.0 2/3] target/arm: Restrict DC CVAP & DC CVADP instructions to TCG accel Philippe Mathieu-Daudé ` (3 subsequent siblings) 4 siblings, 0 replies; 6+ messages in thread From: Philippe Mathieu-Daudé @ 2023-11-30 14:25 UTC (permalink / raw) To: qemu-devel; +Cc: qemu-arm, Peter Maydell, Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- target/arm/helper.c | 55 -------------------------------------- target/arm/tcg/op_helper.c | 55 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 55 insertions(+), 55 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 2746d3fdac..4844cf1d78 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -10135,61 +10135,6 @@ void cpsr_write(CPUARMState *env, uint32_t val, uint32_t mask, } } -/* Sign/zero extend */ -uint32_t HELPER(sxtb16)(uint32_t x) -{ - uint32_t res; - res = (uint16_t)(int8_t)x; - res |= (uint32_t)(int8_t)(x >> 16) << 16; - return res; -} - -static void handle_possible_div0_trap(CPUARMState *env, uintptr_t ra) -{ - /* - * Take a division-by-zero exception if necessary; otherwise return - * to get the usual non-trapping division behaviour (result of 0) - */ - if (arm_feature(env, ARM_FEATURE_M) - && (env->v7m.ccr[env->v7m.secure] & R_V7M_CCR_DIV_0_TRP_MASK)) { - raise_exception_ra(env, EXCP_DIVBYZERO, 0, 1, ra); - } -} - -uint32_t HELPER(uxtb16)(uint32_t x) -{ - uint32_t res; - res = (uint16_t)(uint8_t)x; - res |= (uint32_t)(uint8_t)(x >> 16) << 16; - return res; -} - -int32_t HELPER(sdiv)(CPUARMState *env, int32_t num, int32_t den) -{ - if (den == 0) { - handle_possible_div0_trap(env, GETPC()); - return 0; - } - if (num == INT_MIN && den == -1) { - return INT_MIN; - } - return num / den; -} - -uint32_t HELPER(udiv)(CPUARMState *env, uint32_t num, uint32_t den) -{ - if (den == 0) { - handle_possible_div0_trap(env, GETPC()); - return 0; - } - return num / den; -} - -uint32_t HELPER(rbit)(uint32_t x) -{ - return revbit32(x); -} - #ifdef CONFIG_USER_ONLY static void switch_mode(CPUARMState *env, int mode) diff --git a/target/arm/tcg/op_helper.c b/target/arm/tcg/op_helper.c index ea08936a85..9de0fa2d1f 100644 --- a/target/arm/tcg/op_helper.c +++ b/target/arm/tcg/op_helper.c @@ -121,6 +121,61 @@ void HELPER(v8m_stackcheck)(CPUARMState *env, uint32_t newvalue) } } +/* Sign/zero extend */ +uint32_t HELPER(sxtb16)(uint32_t x) +{ + uint32_t res; + res = (uint16_t)(int8_t)x; + res |= (uint32_t)(int8_t)(x >> 16) << 16; + return res; +} + +static void handle_possible_div0_trap(CPUARMState *env, uintptr_t ra) +{ + /* + * Take a division-by-zero exception if necessary; otherwise return + * to get the usual non-trapping division behaviour (result of 0) + */ + if (arm_feature(env, ARM_FEATURE_M) + && (env->v7m.ccr[env->v7m.secure] & R_V7M_CCR_DIV_0_TRP_MASK)) { + raise_exception_ra(env, EXCP_DIVBYZERO, 0, 1, ra); + } +} + +uint32_t HELPER(uxtb16)(uint32_t x) +{ + uint32_t res; + res = (uint16_t)(uint8_t)x; + res |= (uint32_t)(uint8_t)(x >> 16) << 16; + return res; +} + +int32_t HELPER(sdiv)(CPUARMState *env, int32_t num, int32_t den) +{ + if (den == 0) { + handle_possible_div0_trap(env, GETPC()); + return 0; + } + if (num == INT_MIN && den == -1) { + return INT_MIN; + } + return num / den; +} + +uint32_t HELPER(udiv)(CPUARMState *env, uint32_t num, uint32_t den) +{ + if (den == 0) { + handle_possible_div0_trap(env, GETPC()); + return 0; + } + return num / den; +} + +uint32_t HELPER(rbit)(uint32_t x) +{ + return revbit32(x); +} + uint32_t HELPER(add_setq)(CPUARMState *env, uint32_t a, uint32_t b) { uint32_t res = a + b; -- 2.41.0 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH-for-9.0 2/3] target/arm: Restrict DC CVAP & DC CVADP instructions to TCG accel 2023-11-30 14:25 [PATCH-for-9.0 0/3] target/arm/tcg: Few non-TCG cleanups Philippe Mathieu-Daudé 2023-11-30 14:25 ` [PATCH-for-9.0 1/3] target/arm: Restrict TCG specific helpers Philippe Mathieu-Daudé @ 2023-11-30 14:25 ` Philippe Mathieu-Daudé 2023-11-30 14:25 ` [PATCH-for-9.0 3/3] target/arm/tcg: Including missing 'exec/exec-all.h' header Philippe Mathieu-Daudé ` (2 subsequent siblings) 4 siblings, 0 replies; 6+ messages in thread From: Philippe Mathieu-Daudé @ 2023-11-30 14:25 UTC (permalink / raw) To: qemu-devel; +Cc: qemu-arm, Peter Maydell, Philippe Mathieu-Daudé Hardware accelerators handle that in *hardware*. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- target/arm/helper.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/target/arm/helper.c b/target/arm/helper.c index 4844cf1d78..20e13215bb 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -7645,6 +7645,7 @@ static const ARMCPRegInfo rndr_reginfo[] = { static void dccvap_writefn(CPUARMState *env, const ARMCPRegInfo *opaque, uint64_t value) { +#ifdef CONFIG_TCG ARMCPU *cpu = env_archcpu(env); /* CTR_EL0 System register -> DminLine, bits [19:16] */ uint64_t dline_size = 4 << ((cpu->ctr >> 16) & 0xF); @@ -7669,6 +7670,10 @@ static void dccvap_writefn(CPUARMState *env, const ARMCPRegInfo *opaque, } #endif /*CONFIG_USER_ONLY*/ } +#else + /* Handled by hardware accelerator. */ + g_assert_not_reached(); +#endif /* CONFIG_TCG */ } static const ARMCPRegInfo dcpop_reg[] = { -- 2.41.0 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH-for-9.0 3/3] target/arm/tcg: Including missing 'exec/exec-all.h' header 2023-11-30 14:25 [PATCH-for-9.0 0/3] target/arm/tcg: Few non-TCG cleanups Philippe Mathieu-Daudé 2023-11-30 14:25 ` [PATCH-for-9.0 1/3] target/arm: Restrict TCG specific helpers Philippe Mathieu-Daudé 2023-11-30 14:25 ` [PATCH-for-9.0 2/3] target/arm: Restrict DC CVAP & DC CVADP instructions to TCG accel Philippe Mathieu-Daudé @ 2023-11-30 14:25 ` Philippe Mathieu-Daudé 2023-11-30 15:25 ` [PATCH-for-9.0 0/3] target/arm/tcg: Few non-TCG cleanups Richard Henderson 2023-12-11 15:47 ` Peter Maydell 4 siblings, 0 replies; 6+ messages in thread From: Philippe Mathieu-Daudé @ 2023-11-30 14:25 UTC (permalink / raw) To: qemu-devel; +Cc: qemu-arm, Peter Maydell, Philippe Mathieu-Daudé translate_insn() ends up calling probe_access_full(), itself declared in "exec/exec-all.h": TranslatorOps::translate_insn -> aarch64_tr_translate_insn() -> is_guarded_page() -> probe_access_full() Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- target/arm/tcg/translate-a64.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index a2e49c39f9..f3b5b9124d 100644 --- a/target/arm/tcg/translate-a64.c +++ b/target/arm/tcg/translate-a64.c @@ -18,6 +18,7 @@ */ #include "qemu/osdep.h" +#include "exec/exec-all.h" #include "translate.h" #include "translate-a64.h" #include "qemu/log.h" -- 2.41.0 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH-for-9.0 0/3] target/arm/tcg: Few non-TCG cleanups 2023-11-30 14:25 [PATCH-for-9.0 0/3] target/arm/tcg: Few non-TCG cleanups Philippe Mathieu-Daudé ` (2 preceding siblings ...) 2023-11-30 14:25 ` [PATCH-for-9.0 3/3] target/arm/tcg: Including missing 'exec/exec-all.h' header Philippe Mathieu-Daudé @ 2023-11-30 15:25 ` Richard Henderson 2023-12-11 15:47 ` Peter Maydell 4 siblings, 0 replies; 6+ messages in thread From: Richard Henderson @ 2023-11-30 15:25 UTC (permalink / raw) To: Philippe Mathieu-Daudé, qemu-devel; +Cc: qemu-arm, Peter Maydell On 11/30/23 08:25, Philippe Mathieu-Daudé wrote: > Few non-TCG cleanups extracted from a bigger rework. > > Philippe Mathieu-Daudé (3): > target/arm: Restrict TCG specific helpers > target/arm: Restrict DC CVAP & DC CVADP instructions to TCG accel > target/arm/tcg: Including missing 'exec/exec-all.h' header > > target/arm/helper.c | 60 +++------------------------------- > target/arm/tcg/op_helper.c | 55 +++++++++++++++++++++++++++++++ > target/arm/tcg/translate-a64.c | 1 + > 3 files changed, 61 insertions(+), 55 deletions(-) > Series: Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~ ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH-for-9.0 0/3] target/arm/tcg: Few non-TCG cleanups 2023-11-30 14:25 [PATCH-for-9.0 0/3] target/arm/tcg: Few non-TCG cleanups Philippe Mathieu-Daudé ` (3 preceding siblings ...) 2023-11-30 15:25 ` [PATCH-for-9.0 0/3] target/arm/tcg: Few non-TCG cleanups Richard Henderson @ 2023-12-11 15:47 ` Peter Maydell 4 siblings, 0 replies; 6+ messages in thread From: Peter Maydell @ 2023-12-11 15:47 UTC (permalink / raw) To: Philippe Mathieu-Daudé; +Cc: qemu-devel, qemu-arm On Thu, 30 Nov 2023 at 14:25, Philippe Mathieu-Daudé <philmd@linaro.org> wrote: > > Few non-TCG cleanups extracted from a bigger rework. > > Philippe Mathieu-Daudé (3): > target/arm: Restrict TCG specific helpers > target/arm: Restrict DC CVAP & DC CVADP instructions to TCG accel > target/arm/tcg: Including missing 'exec/exec-all.h' header Applied to target-arm.next for 9.0, thanks. -- PMM ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2023-12-11 15:49 UTC | newest] Thread overview: 6+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2023-11-30 14:25 [PATCH-for-9.0 0/3] target/arm/tcg: Few non-TCG cleanups Philippe Mathieu-Daudé 2023-11-30 14:25 ` [PATCH-for-9.0 1/3] target/arm: Restrict TCG specific helpers Philippe Mathieu-Daudé 2023-11-30 14:25 ` [PATCH-for-9.0 2/3] target/arm: Restrict DC CVAP & DC CVADP instructions to TCG accel Philippe Mathieu-Daudé 2023-11-30 14:25 ` [PATCH-for-9.0 3/3] target/arm/tcg: Including missing 'exec/exec-all.h' header Philippe Mathieu-Daudé 2023-11-30 15:25 ` [PATCH-for-9.0 0/3] target/arm/tcg: Few non-TCG cleanups Richard Henderson 2023-12-11 15:47 ` Peter Maydell
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