[PATCH v3 0/8] ppc: pnv ChipTOD and various timebase fixes

[Nicholas Piggin <npiggin@gmail.com>]

This accumulated a few changes and review comment fixes since v2:
- Remove the now unnecessary class xscom ops.
- Split the introduction of the chiptod model from wiring it to
  machines.
- Fix chiptod model patch changelog.
- Wrap chiptod/tb state machine variables in CPUArchState in a struct.

Will put this in the next merge window if no objections. Thanks to
Cedric for all the review and help.

Thanks,
Nick

Nicholas Piggin (8):
  target/ppc: Rename TBL to TB on 64-bit
  target/ppc: Improve timebase register defines naming
  target/ppc: Fix move-to timebase SPR access permissions
  pnv/chiptod: Add POWER9/10 chiptod model
  ppc/pnv: Wire ChipTOD model to powernv9 and powernv10 machines
  pnv/chiptod: Implement the ChipTOD to Core transfer
  target/ppc: Implement core timebase state machine and TFMR
  target/ppc: Add SMT support to time facilities

 include/hw/ppc/pnv.h         |   2 +
 include/hw/ppc/pnv_chip.h    |   3 +
 include/hw/ppc/pnv_chiptod.h |  53 ++++
 include/hw/ppc/pnv_xscom.h   |   9 +
 target/ppc/cpu.h             |  57 +++-
 hw/ppc/pnv.c                 |  45 +++
 hw/ppc/pnv_chiptod.c         | 586 +++++++++++++++++++++++++++++++++++
 target/ppc/helper_regs.c     |  39 ++-
 target/ppc/ppc-qmp-cmds.c    |   4 +
 target/ppc/timebase_helper.c | 309 +++++++++++++++++-
 target/ppc/translate.c       |  42 ++-
 hw/ppc/meson.build           |   1 +
 hw/ppc/trace-events          |   4 +
 13 files changed, 1129 insertions(+), 25 deletions(-)
 create mode 100644 include/hw/ppc/pnv_chiptod.h
 create mode 100644 hw/ppc/pnv_chiptod.c

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2.42.0