qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Cc: Richard Henderson <richard.henderson@linaro.org>
Subject: [PULL 14/46] target/i386: do not clobber T0 on string operations
Date: Sun, 31 Dec 2023 09:44:30 +0100	[thread overview]
Message-ID: <20231231084502.235366-15-pbonzini@redhat.com> (raw)
In-Reply-To: <20231231084502.235366-1-pbonzini@redhat.com>

The new decoder would rather have the operand in T0 when expanding SCAS, rather
than use R_EAX directly as gen_scas currently does.  This makes SCAS more similar
to CMP and SUB, in that CC_DST = T0 - T1.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 target/i386/tcg/translate.c | 45 ++++++++++++++++++++-----------------
 1 file changed, 24 insertions(+), 21 deletions(-)

diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index efef4e74d4c..00ed0cc9a31 100644
--- a/target/i386/tcg/translate.c
+++ b/target/i386/tcg/translate.c
@@ -522,9 +522,9 @@ void gen_op_add_reg_im(DisasContext *s, MemOp size, int reg, int32_t val)
     gen_op_mov_reg_v(s, size, reg, s->tmp0);
 }
 
-static inline void gen_op_add_reg_T0(DisasContext *s, MemOp size, int reg)
+static inline void gen_op_add_reg(DisasContext *s, MemOp size, int reg, TCGv val)
 {
-    tcg_gen_add_tl(s->tmp0, cpu_regs[reg], s->T0);
+    tcg_gen_add_tl(s->tmp0, cpu_regs[reg], val);
     gen_op_mov_reg_v(s, size, reg, s->tmp0);
 }
 
@@ -707,10 +707,12 @@ static inline void gen_string_movl_A0_EDI(DisasContext *s)
     gen_lea_v_seg(s, s->aflag, cpu_regs[R_EDI], R_ES, -1);
 }
 
-static inline void gen_op_movl_T0_Dshift(DisasContext *s, MemOp ot)
+static inline TCGv gen_compute_Dshift(DisasContext *s, MemOp ot)
 {
-    tcg_gen_ld32s_tl(s->T0, tcg_env, offsetof(CPUX86State, df));
-    tcg_gen_shli_tl(s->T0, s->T0, ot);
+    TCGv dshift = tcg_temp_new();
+    tcg_gen_ld32s_tl(dshift, tcg_env, offsetof(CPUX86State, df));
+    tcg_gen_shli_tl(dshift, dshift, ot);
+    return dshift;
 };
 
 static TCGv gen_ext_tl(TCGv dst, TCGv src, MemOp size, bool sign)
@@ -818,13 +820,16 @@ static bool gen_check_io(DisasContext *s, MemOp ot, TCGv_i32 port,
 
 static void gen_movs(DisasContext *s, MemOp ot)
 {
+    TCGv dshift;
+
     gen_string_movl_A0_ESI(s);
     gen_op_ld_v(s, ot, s->T0, s->A0);
     gen_string_movl_A0_EDI(s);
     gen_op_st_v(s, ot, s->T0, s->A0);
-    gen_op_movl_T0_Dshift(s, ot);
-    gen_op_add_reg_T0(s, s->aflag, R_ESI);
-    gen_op_add_reg_T0(s, s->aflag, R_EDI);
+
+    dshift = gen_compute_Dshift(s, ot);
+    gen_op_add_reg(s, s->aflag, R_ESI, dshift);
+    gen_op_add_reg(s, s->aflag, R_EDI, dshift);
 }
 
 static void gen_op_update1_cc(DisasContext *s)
@@ -1249,8 +1254,7 @@ static void gen_stos(DisasContext *s, MemOp ot)
     gen_op_mov_v_reg(s, MO_32, s->T0, R_EAX);
     gen_string_movl_A0_EDI(s);
     gen_op_st_v(s, ot, s->T0, s->A0);
-    gen_op_movl_T0_Dshift(s, ot);
-    gen_op_add_reg_T0(s, s->aflag, R_EDI);
+    gen_op_add_reg(s, s->aflag, R_EDI, gen_compute_Dshift(s, ot));
 }
 
 static void gen_lods(DisasContext *s, MemOp ot)
@@ -1258,8 +1262,7 @@ static void gen_lods(DisasContext *s, MemOp ot)
     gen_string_movl_A0_ESI(s);
     gen_op_ld_v(s, ot, s->T0, s->A0);
     gen_op_mov_reg_v(s, ot, R_EAX, s->T0);
-    gen_op_movl_T0_Dshift(s, ot);
-    gen_op_add_reg_T0(s, s->aflag, R_ESI);
+    gen_op_add_reg(s, s->aflag, R_ESI, gen_compute_Dshift(s, ot));
 }
 
 static void gen_scas(DisasContext *s, MemOp ot)
@@ -1267,19 +1270,21 @@ static void gen_scas(DisasContext *s, MemOp ot)
     gen_string_movl_A0_EDI(s);
     gen_op_ld_v(s, ot, s->T1, s->A0);
     gen_op(s, OP_CMPL, ot, R_EAX);
-    gen_op_movl_T0_Dshift(s, ot);
-    gen_op_add_reg_T0(s, s->aflag, R_EDI);
+    gen_op_add_reg(s, s->aflag, R_EDI, gen_compute_Dshift(s, ot));
 }
 
 static void gen_cmps(DisasContext *s, MemOp ot)
 {
+    TCGv dshift;
+
     gen_string_movl_A0_EDI(s);
     gen_op_ld_v(s, ot, s->T1, s->A0);
     gen_string_movl_A0_ESI(s);
     gen_op(s, OP_CMPL, ot, OR_TMP0);
-    gen_op_movl_T0_Dshift(s, ot);
-    gen_op_add_reg_T0(s, s->aflag, R_ESI);
-    gen_op_add_reg_T0(s, s->aflag, R_EDI);
+
+    dshift = gen_compute_Dshift(s, ot);
+    gen_op_add_reg(s, s->aflag, R_ESI, dshift);
+    gen_op_add_reg(s, s->aflag, R_EDI, dshift);
 }
 
 static void gen_bpt_io(DisasContext *s, TCGv_i32 t_port, int ot)
@@ -1307,8 +1312,7 @@ static void gen_ins(DisasContext *s, MemOp ot)
     tcg_gen_andi_i32(s->tmp2_i32, s->tmp2_i32, 0xffff);
     gen_helper_in_func(ot, s->T0, s->tmp2_i32);
     gen_op_st_v(s, ot, s->T0, s->A0);
-    gen_op_movl_T0_Dshift(s, ot);
-    gen_op_add_reg_T0(s, s->aflag, R_EDI);
+    gen_op_add_reg(s, s->aflag, R_EDI, gen_compute_Dshift(s, ot));
     gen_bpt_io(s, s->tmp2_i32, ot);
 }
 
@@ -1321,8 +1325,7 @@ static void gen_outs(DisasContext *s, MemOp ot)
     tcg_gen_andi_i32(s->tmp2_i32, s->tmp2_i32, 0xffff);
     tcg_gen_trunc_tl_i32(s->tmp3_i32, s->T0);
     gen_helper_out_func(ot, s->tmp2_i32, s->tmp3_i32);
-    gen_op_movl_T0_Dshift(s, ot);
-    gen_op_add_reg_T0(s, s->aflag, R_ESI);
+    gen_op_add_reg(s, s->aflag, R_ESI, gen_compute_Dshift(s, ot));
     gen_bpt_io(s, s->tmp2_i32, ot);
 }
 
-- 
2.43.0



  parent reply	other threads:[~2023-12-31  8:47 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-31  8:44 [PULL 00/46] (mostly) target/i386 and meson changes for 2023-12-31 Paolo Bonzini
2023-12-31  8:44 ` [PULL 01/46] configure: use a native non-cross compiler for linux-user Paolo Bonzini
2023-12-31  8:44 ` [PULL 02/46] target/i386: optimize computation of JL and JLE from flags Paolo Bonzini
2023-12-31  8:44 ` [PULL 03/46] target/i386: speedup JO/SETO after MUL or IMUL Paolo Bonzini
2023-12-31  8:44 ` [PULL 04/46] target/i386: remove unnecessary arguments from raise_interrupt Paolo Bonzini
2023-12-31  8:44 ` [PULL 05/46] target/i386: remove unnecessary truncations Paolo Bonzini
2023-12-31  8:44 ` [PULL 06/46] target/i386: clean up cpu_cc_compute_all Paolo Bonzini
2023-12-31  8:44 ` [PULL 07/46] target/i386: document more deviations from the manual Paolo Bonzini
2023-12-31  8:44 ` [PULL 08/46] target/i386: reimplement check for validity of LOCK prefix Paolo Bonzini
2023-12-31  8:44 ` [PULL 09/46] target/i386: avoid trunc and ext for MULX and RORX Paolo Bonzini
2023-12-31  8:44 ` [PULL 10/46] target/i386: rename zext0/zext2 and make them closer to the manual Paolo Bonzini
2023-12-31  8:44 ` [PULL 11/46] target/i386: add X86_SPECIALs for MOVSX and MOVZX Paolo Bonzini
2023-12-31  8:44 ` [PULL 12/46] target/i386: do not decode string source/destination into decode->mem Paolo Bonzini
2023-12-31  8:44 ` [PULL 13/46] target/i386: do not clobber A0 in POP translation Paolo Bonzini
2023-12-31  8:44 ` Paolo Bonzini [this message]
2023-12-31  8:44 ` [PULL 15/46] target/i386: split eflags computation out of gen_compute_eflags Paolo Bonzini
2023-12-31  8:44 ` [PULL 16/46] target/i386: do not use s->tmp4 for push Paolo Bonzini
2023-12-31  8:44 ` [PULL 17/46] target/i386: do not use s->tmp0 for jumps on ECX ==/!= 0 Paolo Bonzini
2023-12-31  8:44 ` [PULL 18/46] target/i386: prepare for implementation of STOS/SCAS in new decoder Paolo Bonzini
2023-12-31  8:44 ` [PULL 19/46] target/i386: move operand load and writeback out of gen_cmovcc1 Paolo Bonzini
2023-12-31  8:44 ` [PULL 20/46] target/i386: adjust decoding of J operand Paolo Bonzini
2023-12-31  8:44 ` [PULL 21/46] target/i386: introduce flags writeback mechanism Paolo Bonzini
2023-12-31  8:44 ` [PULL 22/46] target/i386: implement CMPccXADD Paolo Bonzini
2023-12-31  8:44 ` [PULL 23/46] target/i386: the sgx_epc_get_section stub is reachable Paolo Bonzini
2023-12-31  8:44 ` [PULL 24/46] esp: check for NULL result from scsi_device_find() Paolo Bonzini
2023-12-31  8:44 ` [PULL 25/46] meson: fix type of "relocatable" option Paolo Bonzini
2023-12-31  8:44 ` [PULL 26/46] meson: remove unused variable Paolo Bonzini
2023-12-31  8:44 ` [PULL 27/46] meson: use version_compare() to compare version Paolo Bonzini
2023-12-31  8:44 ` [PULL 28/46] Makefile: clean qemu-iotests output Paolo Bonzini
2023-12-31  8:44 ` [PULL 29/46] configure: remove unnecessary subshell Paolo Bonzini
2023-12-31  8:44 ` [PULL 30/46] configure: unify again the case arms in probe_target_compiler Paolo Bonzini
2023-12-31  8:44 ` [PULL 31/46] meson: add more sections to main meson.build Paolo Bonzini
2023-12-31  8:44 ` [PULL 32/46] meson: move program checks together Paolo Bonzini
2023-12-31  8:44 ` [PULL 33/46] meson: move option validation together Paolo Bonzini
2023-12-31  8:44 ` [PULL 34/46] meson: move accelerator dependency checks together Paolo Bonzini
2023-12-31  8:44 ` [PULL 35/46] meson: keep subprojects together Paolo Bonzini
2023-12-31  8:44 ` [PULL 36/46] meson: move CFI detection code with other compiler flags Paolo Bonzini
2023-12-31  8:44 ` [PULL 37/46] meson: move config-host.h definitions together Paolo Bonzini
2023-12-31  8:44 ` [PULL 38/46] meson: move subdirs to "Collect sources" section Paolo Bonzini
2023-12-31  8:44 ` [PULL 39/46] meson: always probe u2f and canokey if the option is enabled Paolo Bonzini
2023-12-31  8:44 ` [PULL 40/46] meson: remove OS definitions from config_targetos Paolo Bonzini
2023-12-31  8:44 ` [PULL 41/46] meson: remove CONFIG_POSIX and CONFIG_WIN32 " Paolo Bonzini
2023-12-31  8:44 ` [PULL 42/46] meson: remove config_targetos Paolo Bonzini
2023-12-31  8:44 ` [PULL 43/46] meson: remove CONFIG_ALL Paolo Bonzini
2023-12-31  8:45 ` [PULL 44/46] meson: rename config_all Paolo Bonzini
2023-12-31  8:45 ` [PULL 45/46] configure, meson: rename targetos to host_os Paolo Bonzini
2023-12-31  8:45 ` [PULL 46/46] meson.build: report graphics backends separately Paolo Bonzini
2024-01-05 12:53 ` [PULL 00/46] (mostly) target/i386 and meson changes for 2023-12-31 Peter Maydell

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20231231084502.235366-15-pbonzini@redhat.com \
    --to=pbonzini@redhat.com \
    --cc=qemu-devel@nongnu.org \
    --cc=richard.henderson@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).