* [PULL 00/71] HW core patches for 2024-01-05
@ 2024-01-05 15:41 Philippe Mathieu-Daudé
2024-01-05 15:41 ` [PULL 01/71] meson: Allow building binary with no target-specific files in hw/ Philippe Mathieu-Daudé
` (71 more replies)
0 siblings, 72 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:41 UTC (permalink / raw)
To: qemu-devel; +Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé
The following changes since commit 05470c3979d5485003e129ff4b0c2ef98af91d86:
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging (2024-01-04 19:55:20 +0000)
are available in the Git repository at:
https://github.com/philmd/qemu.git tags/hw-cpus-20240105
for you to fetch changes up to a318da6b3f6a88e6cfd6953c519def9457e8962f:
target/sparc: Simplify qemu_irq_ack (2024-01-05 16:20:15 +0100)
----------------------------------------------------------------
HW core patch queue
- Unify CPU QOM type checks (Gavin)
- Simplify uses of some CPU related property (Philippe)
(start-powered-off, ARM reset-cbar and mp-affinity)
- Header and documentation cleanups (Zhao, Philippe)
- Have Memory API return boolean indicating possible error
- Fix frame filter mask in CAN sja1000 model (Pavel)
- QOM embed MCF5206 timer into SoC (Thomas)
- Simplify LEON3 qemu_irq_ack handler (Clément)
----------------------------------------------------------------
Clément Chigot (1):
target/sparc: Simplify qemu_irq_ack
Gavin Shan (29):
target/alpha: Remove fallback to ev67 cpu class
target/hppa: Remove object_class_is_abstract()
cpu: Add helper cpu_model_from_type()
cpu: Add generic cpu_list()
target/alpha: Use generic cpu_list()
target/arm: Use generic cpu_list()
target/avr: Use generic cpu_list()
target/cris: Use generic cpu_list()
target/hexagon: Use generic cpu_list()
target/hppa: Use generic cpu_list()
target/loongarch: Use generic cpu_list()
target/m68k: Use generic cpu_list()
target/mips: Use generic cpu_list()
target/openrisc: Use generic cpu_list()
target/riscv: Use generic cpu_list()
target/rx: Use generic cpu_list()
target/sh4: Use generic cpu_list()
target/tricore: Use generic cpu_list()
target/xtensa: Use generic cpu_list()
target: Use generic cpu_model_from_type()
machine: Use error handling when CPU type is checked
machine: Introduce helper is_cpu_type_supported()
machine: Improve is_cpu_type_supported()
machine: Print CPU model name instead of CPU type
hw/arm/virt: Hide host CPU model for tcg
hw/arm/virt: Check CPU type in machine_run_board_init()
hw/arm/sbsa-ref: Check CPU type in machine_run_board_init()
hw/arm: Check CPU type in machine_run_board_init()
hw/riscv/shakti_c: Check CPU type in machine_run_board_init()
Pavel Pisa (1):
hw/net/can/sja1000: fix bug for single acceptance filter and standard
frame
Philippe Mathieu-Daudé (37):
meson: Allow building binary with no target-specific files in hw/
cpu: Call object_class_dynamic_cast() once in cpu_class_by_name()
hw/core: Add machine_class_default_cpu_type()
hw/core/cpu: Remove final vestiges of dynamic state tracing
hw/core/cpu: Update description of CPUState::node
hw/audio/sb16: Do not migrate qdev properties
hw/arm/bcm2836: Simplify use of 'reset-cbar' property
hw/arm/bcm2836: Use ARM_CPU 'mp-affinity' property
hw/ppc/spapr_cpu_core: Access QDev properties with proper API
hw: Simplify accesses to the CPUState::'start-powered-off' property
hw/ppc/xive2_regs: Remove unnecessary 'cpu.h' inclusion
hw/mips: Inline 'bios.h' definitions
memory: Have memory_region_init_ram_flags_nomigrate() return a boolean
memory: Have memory_region_init_ram_nomigrate() handler return a
boolean
memory: Have memory_region_init_rom_nomigrate() handler return a
boolean
memory: Simplify memory_region_init_rom_nomigrate() calls
memory: Simplify memory_region_init_ram_from_fd() calls
memory: Have memory_region_init_ram() handler return a boolean
memory: Have memory_region_init_rom() handler return a boolean
memory: Have memory_region_init_rom_device_nomigrate() return a
boolean
memory: Simplify memory_region_init_rom_device_nomigrate() calls
memory: Have memory_region_init_rom_device() handler return a boolean
memory: Have memory_region_init_resizeable_ram() return a boolean
memory: Have memory_region_init_ram_from_file() handler return a
boolean
memory: Have memory_region_init_ram_from_fd() handler return a boolean
backends: Use g_autofree in HostMemoryBackendClass::alloc() handlers
backends: Simplify host_memory_backend_memory_complete()
backends: Have HostMemoryBackendClass::alloc() handler return a
boolean
backends: Reduce variable scope in host_memory_backend_memory_complete
util/oslib: Have qemu_prealloc_mem() handler return a boolean
misc: Simplify qemu_prealloc_mem() calls
hw: Simplify memory_region_init_ram() calls
hw/arm: Simplify memory_region_init_rom() calls
hw/sparc: Simplify memory_region_init_ram_nomigrate() calls
hw/misc: Simplify memory_region_init_ram_from_fd() calls
hw/nvram: Simplify memory_region_init_rom_device() calls
hw/pci-host/raven: Propagate error in raven_realize()
Thomas Huth (1):
hw/m68k/mcf5206: Embed m5206_timer_state in m5206_mbar_state
Zhao Liu (2):
hw/cpu/core: Cleanup unused included header in core.c
hw/cpu/cluster: Cleanup unused included header in cluster.c
meson.build | 8 +-
include/exec/memory.h | 40 +++++--
include/hw/boards.h | 6 ++
include/hw/core/cpu.h | 18 +++-
include/hw/mips/bios.h | 14 ---
include/hw/ppc/xive2_regs.h | 2 +-
include/qemu/osdep.h | 4 +-
include/sysemu/hostmem.h | 10 +-
linux-user/alpha/target_elf.h | 2 +-
target/alpha/cpu.h | 3 -
target/arm/cpu.h | 3 -
target/avr/cpu.h | 2 -
target/cris/cpu.h | 3 -
target/hexagon/cpu.h | 3 -
target/hppa/cpu.h | 3 -
target/loongarch/cpu.h | 4 -
target/m68k/cpu.h | 4 -
target/mips/cpu.h | 4 -
target/openrisc/cpu.h | 3 -
target/riscv/cpu.h | 2 -
target/rx/cpu.h | 3 -
target/sh4/cpu.h | 3 -
target/sparc/cpu.h | 2 +-
target/tricore/cpu.h | 4 -
target/xtensa/cpu.h | 3 -
backends/hostmem-epc.c | 14 ++-
backends/hostmem-file.c | 22 ++--
backends/hostmem-memfd.c | 13 ++-
backends/hostmem-ram.c | 12 +--
backends/hostmem.c | 144 ++++++++++++--------------
bsd-user/main.c | 5 +-
cpu-target.c | 44 +++++++-
hw/arm/armsse.c | 6 +-
hw/arm/armv7m.c | 8 +-
hw/arm/aspeed_ast2400.c | 6 +-
hw/arm/aspeed_ast2600.c | 6 +-
hw/arm/bananapi_m2u.c | 12 +--
hw/arm/bcm2836.c | 18 ++--
hw/arm/cubieboard.c | 12 +--
hw/arm/fsl-imx25.c | 19 ++--
hw/arm/fsl-imx31.c | 19 ++--
hw/arm/fsl-imx6.c | 19 ++--
hw/arm/integratorcp.c | 7 +-
hw/arm/mps2-tz.c | 26 +++--
hw/arm/mps2.c | 26 +++--
hw/arm/msf2-som.c | 12 +--
hw/arm/musca.c | 12 +--
hw/arm/npcm7xx_boards.c | 12 +--
hw/arm/nrf51_soc.c | 7 +-
hw/arm/orangepi.c | 12 +--
hw/arm/sbsa-ref.c | 36 ++-----
hw/arm/virt.c | 60 ++++-------
hw/audio/sb16.c | 10 +-
hw/core/cpu-common.c | 8 +-
hw/core/machine.c | 103 +++++++++++-------
hw/cpu/cluster.c | 5 +-
hw/cpu/core.c | 9 +-
hw/m68k/mcf5206.c | 20 ++--
hw/mips/cps.c | 7 +-
hw/mips/jazz.c | 10 +-
hw/mips/malta.c | 9 +-
hw/mips/mipssim.c | 10 +-
hw/misc/ivshmem.c | 8 +-
hw/net/can/can_sja1000.c | 2 +-
hw/nvram/nrf51_nvm.c | 7 +-
hw/pci-host/raven.c | 6 +-
hw/ppc/e500.c | 2 +-
hw/ppc/rs6000_mc.c | 7 +-
hw/ppc/spapr_cpu_core.c | 2 +-
hw/riscv/shakti_c.c | 13 ++-
hw/sparc/leon3.c | 8 +-
hw/sparc/sun4m.c | 23 ++--
hw/sparc64/sun4u.c | 7 +-
hw/virtio/virtio-mem.c | 6 +-
system/memory.c | 69 +++++++-----
system/vl.c | 2 +-
target/alpha/cpu.c | 23 ----
target/arm/arm-qmp-cmds.c | 3 +-
target/arm/cpu.c | 4 +-
target/arm/helper.c | 46 --------
target/avr/cpu.c | 23 +---
target/cris/cpu.c | 42 +-------
target/hexagon/cpu.c | 24 +----
target/hppa/cpu.c | 32 +-----
target/i386/cpu.c | 3 +-
target/loongarch/cpu.c | 23 +---
target/loongarch/loongarch-qmp-cmds.c | 3 +-
target/m68k/cpu.c | 4 +-
target/m68k/helper.c | 40 -------
target/mips/sysemu/mips-qmp-cmds.c | 3 +-
target/openrisc/cpu.c | 46 +-------
target/ppc/cpu_init.c | 3 +-
target/ppc/ppc-qmp-cmds.c | 3 +-
target/riscv/cpu.c | 36 +------
target/riscv/riscv-qmp-cmds.c | 3 +-
target/rx/cpu.c | 16 ---
target/sh4/cpu.c | 17 ---
target/sparc/int32_helper.c | 2 +-
target/tricore/cpu.c | 4 +-
target/tricore/helper.c | 22 ----
target/xtensa/cpu.c | 4 +-
target/xtensa/helper.c | 9 --
util/oslib-posix.c | 7 +-
util/oslib-win32.c | 4 +-
target/mips/cpu-defs.c.inc | 9 --
105 files changed, 576 insertions(+), 977 deletions(-)
delete mode 100644 include/hw/mips/bios.h
--
2.41.0
^ permalink raw reply [flat|nested] 76+ messages in thread
* [PULL 01/71] meson: Allow building binary with no target-specific files in hw/
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
@ 2024-01-05 15:41 ` Philippe Mathieu-Daudé
2024-01-05 15:41 ` [PULL 02/71] target/alpha: Remove fallback to ev67 cpu class Philippe Mathieu-Daudé
` (70 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:41 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Paolo Bonzini, Marc-André Lureau, Daniel P. Berrangé,
Thomas Huth
Allow building a qemu-system-foo binary with target-agnostic
only HW models.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20231121203129.67999-1-philmd@linaro.org>
---
meson.build | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/meson.build b/meson.build
index 5a2582776c..371edafae6 100644
--- a/meson.build
+++ b/meson.build
@@ -3771,9 +3771,11 @@ foreach target : target_dirs
arch_deps += t.dependencies()
hw_dir = target_name == 'sparc64' ? 'sparc64' : target_base_arch
- hw = hw_arch[hw_dir].apply(config_target, strict: false)
- arch_srcs += hw.sources()
- arch_deps += hw.dependencies()
+ if hw_arch.has_key(hw_dir)
+ hw = hw_arch[hw_dir].apply(config_target, strict: false)
+ arch_srcs += hw.sources()
+ arch_deps += hw.dependencies()
+ endif
arch_srcs += config_devices_h[target]
link_args += ['@block.syms', '@qemu.syms']
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 02/71] target/alpha: Remove fallback to ev67 cpu class
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
2024-01-05 15:41 ` [PULL 01/71] meson: Allow building binary with no target-specific files in hw/ Philippe Mathieu-Daudé
@ 2024-01-05 15:41 ` Philippe Mathieu-Daudé
2024-01-05 15:41 ` [PULL 03/71] target/hppa: Remove object_class_is_abstract() Philippe Mathieu-Daudé
` (69 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:41 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Gavin Shan, Richard Henderson,
Philippe Mathieu-Daudé, Laurent Vivier
From: Gavin Shan <gshan@redhat.com>
'ev67' CPU class will be returned to match everything, which makes
no sense as mentioned in the comments. Remove the logic to fall
back to 'ev67' CPU class to match everything.
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231114235628.534334-2-gshan@redhat.com>
[PMD: Reword subject, replace 'any' -> 'ev67' on linux-user]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
linux-user/alpha/target_elf.h | 2 +-
target/alpha/cpu.c | 7 ++-----
2 files changed, 3 insertions(+), 6 deletions(-)
diff --git a/linux-user/alpha/target_elf.h b/linux-user/alpha/target_elf.h
index 344e9f4d39..b77d638f6d 100644
--- a/linux-user/alpha/target_elf.h
+++ b/linux-user/alpha/target_elf.h
@@ -9,6 +9,6 @@
#define ALPHA_TARGET_ELF_H
static inline const char *cpu_get_model(uint32_t eflags)
{
- return "any";
+ return "ev67";
}
#endif
diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
index 39cf841b3e..91fe8ae095 100644
--- a/target/alpha/cpu.c
+++ b/target/alpha/cpu.c
@@ -141,11 +141,8 @@ static ObjectClass *alpha_cpu_class_by_name(const char *cpu_model)
typename = g_strdup_printf(ALPHA_CPU_TYPE_NAME("%s"), cpu_model);
oc = object_class_by_name(typename);
g_free(typename);
-
- /* TODO: remove match everything nonsense */
- if (!oc || object_class_is_abstract(oc)) {
- /* Default to ev67; no reason not to emulate insns by default. */
- oc = object_class_by_name(ALPHA_CPU_TYPE_NAME("ev67"));
+ if (!oc || !object_class_dynamic_cast(oc, TYPE_ALPHA_CPU)) {
+ return NULL;
}
return oc;
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 03/71] target/hppa: Remove object_class_is_abstract()
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
2024-01-05 15:41 ` [PULL 01/71] meson: Allow building binary with no target-specific files in hw/ Philippe Mathieu-Daudé
2024-01-05 15:41 ` [PULL 02/71] target/alpha: Remove fallback to ev67 cpu class Philippe Mathieu-Daudé
@ 2024-01-05 15:41 ` Philippe Mathieu-Daudé
2024-01-05 15:41 ` [PULL 04/71] cpu: Call object_class_dynamic_cast() once in cpu_class_by_name() Philippe Mathieu-Daudé
` (68 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:41 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Gavin Shan, Richard Henderson,
Philippe Mathieu-Daudé
From: Gavin Shan <gshan@redhat.com>
Since commit 3a9d0d7b64 ("hw/cpu: Call object_class_is_abstract()
once in cpu_class_by_name()"), there is no need to check if @oc is
abstract because it has been covered by cpu_class_by_name().
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231114235628.534334-3-gshan@redhat.com>
[PMD: Mention commit 3a9d0d7b64]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/hppa/cpu.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c
index 04de1689d7..e3e7200b1d 100644
--- a/target/hppa/cpu.c
+++ b/target/hppa/cpu.c
@@ -162,9 +162,7 @@ static ObjectClass *hppa_cpu_class_by_name(const char *cpu_model)
g_autofree char *typename = g_strconcat(cpu_model, "-cpu", NULL);
ObjectClass *oc = object_class_by_name(typename);
- if (oc &&
- !object_class_is_abstract(oc) &&
- object_class_dynamic_cast(oc, TYPE_HPPA_CPU)) {
+ if (oc && object_class_dynamic_cast(oc, TYPE_HPPA_CPU)) {
return oc;
}
return NULL;
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 04/71] cpu: Call object_class_dynamic_cast() once in cpu_class_by_name()
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (2 preceding siblings ...)
2024-01-05 15:41 ` [PULL 03/71] target/hppa: Remove object_class_is_abstract() Philippe Mathieu-Daudé
@ 2024-01-05 15:41 ` Philippe Mathieu-Daudé
2024-01-05 15:41 ` [PULL 05/71] cpu: Add helper cpu_model_from_type() Philippe Mathieu-Daudé
` (67 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:41 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Gavin Shan, Igor Mammedov, Richard Henderson, Peter Maydell,
Michael Rolnik, Edgar E. Iglesias, Brian Cain, Song Gao,
Laurent Vivier, Stafford Horne, Palmer Dabbelt, Alistair Francis,
Bin Meng, Weiwei Li, Daniel Henrique Barboza, Liu Zhiwei,
Bastian Koppelmann, Max Filippov
For all targets, the CPU class returned from CPUClass::class_by_name()
and object_class_dynamic_cast(oc, CPU_RESOLVING_TYPE) need to be
compatible. Lets apply the check in cpu_class_by_name() for once,
instead of having the check in CPUClass::class_by_name() for individual
target.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Gavin Shan <gshan@redhat.com>
Message-ID: <20231114235628.534334-4-gshan@redhat.com>
---
hw/core/cpu-common.c | 8 +++++---
target/alpha/cpu.c | 3 ---
target/arm/cpu.c | 4 +---
target/avr/cpu.c | 8 +-------
target/cris/cpu.c | 4 +---
target/hexagon/cpu.c | 4 +---
target/hppa/cpu.c | 6 +-----
target/loongarch/cpu.c | 8 +-------
target/m68k/cpu.c | 4 +---
target/openrisc/cpu.c | 4 +---
target/riscv/cpu.c | 4 +---
target/tricore/cpu.c | 4 +---
target/xtensa/cpu.c | 4 +---
13 files changed, 16 insertions(+), 49 deletions(-)
diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c
index 82dae51a55..d0e7bbdf06 100644
--- a/hw/core/cpu-common.c
+++ b/hw/core/cpu-common.c
@@ -154,10 +154,12 @@ ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model)
assert(cc->class_by_name);
assert(cpu_model);
oc = cc->class_by_name(cpu_model);
- if (oc == NULL || object_class_is_abstract(oc)) {
- return NULL;
+ if (object_class_dynamic_cast(oc, typename) &&
+ !object_class_is_abstract(oc)) {
+ return oc;
}
- return oc;
+
+ return NULL;
}
static void cpu_common_parse_features(const char *typename, char *features,
diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
index 91fe8ae095..83345c5c7d 100644
--- a/target/alpha/cpu.c
+++ b/target/alpha/cpu.c
@@ -141,9 +141,6 @@ static ObjectClass *alpha_cpu_class_by_name(const char *cpu_model)
typename = g_strdup_printf(ALPHA_CPU_TYPE_NAME("%s"), cpu_model);
oc = object_class_by_name(typename);
g_free(typename);
- if (!oc || !object_class_dynamic_cast(oc, TYPE_ALPHA_CPU)) {
- return NULL;
- }
return oc;
}
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 650e09b29c..1c8b787482 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -2411,9 +2411,7 @@ static ObjectClass *arm_cpu_class_by_name(const char *cpu_model)
oc = object_class_by_name(typename);
g_strfreev(cpuname);
g_free(typename);
- if (!oc || !object_class_dynamic_cast(oc, TYPE_ARM_CPU)) {
- return NULL;
- }
+
return oc;
}
diff --git a/target/avr/cpu.c b/target/avr/cpu.c
index 999c010ded..3e478294a6 100644
--- a/target/avr/cpu.c
+++ b/target/avr/cpu.c
@@ -160,13 +160,7 @@ static Property avr_cpu_properties[] = {
static ObjectClass *avr_cpu_class_by_name(const char *cpu_model)
{
- ObjectClass *oc;
-
- oc = object_class_by_name(cpu_model);
- if (object_class_dynamic_cast(oc, TYPE_AVR_CPU) == NULL) {
- oc = NULL;
- }
- return oc;
+ return object_class_by_name(cpu_model);
}
static void avr_cpu_dump_state(CPUState *cs, FILE *f, int flags)
diff --git a/target/cris/cpu.c b/target/cris/cpu.c
index 675b73ac04..a5083a0077 100644
--- a/target/cris/cpu.c
+++ b/target/cris/cpu.c
@@ -95,9 +95,7 @@ static ObjectClass *cris_cpu_class_by_name(const char *cpu_model)
typename = g_strdup_printf(CRIS_CPU_TYPE_NAME("%s"), cpu_model);
oc = object_class_by_name(typename);
g_free(typename);
- if (oc != NULL && !object_class_dynamic_cast(oc, TYPE_CRIS_CPU)) {
- oc = NULL;
- }
+
return oc;
}
diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
index 9d1ffc3b4b..aa48f5fe89 100644
--- a/target/hexagon/cpu.c
+++ b/target/hexagon/cpu.c
@@ -63,9 +63,7 @@ static ObjectClass *hexagon_cpu_class_by_name(const char *cpu_model)
oc = object_class_by_name(typename);
g_strfreev(cpuname);
g_free(typename);
- if (!oc || !object_class_dynamic_cast(oc, TYPE_HEXAGON_CPU)) {
- return NULL;
- }
+
return oc;
}
diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c
index e3e7200b1d..1a5fb6c65b 100644
--- a/target/hppa/cpu.c
+++ b/target/hppa/cpu.c
@@ -160,12 +160,8 @@ static void hppa_cpu_initfn(Object *obj)
static ObjectClass *hppa_cpu_class_by_name(const char *cpu_model)
{
g_autofree char *typename = g_strconcat(cpu_model, "-cpu", NULL);
- ObjectClass *oc = object_class_by_name(typename);
- if (oc && object_class_dynamic_cast(oc, TYPE_HPPA_CPU)) {
- return oc;
- }
- return NULL;
+ return object_class_by_name(typename);
}
static void hppa_cpu_list_entry(gpointer data, gpointer user_data)
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index 07319d6fb9..81f2d8d8ed 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -718,15 +718,9 @@ static ObjectClass *loongarch_cpu_class_by_name(const char *cpu_model)
g_autofree char *typename
= g_strdup_printf(LOONGARCH_CPU_TYPE_NAME("%s"), cpu_model);
oc = object_class_by_name(typename);
- if (!oc) {
- return NULL;
- }
}
- if (object_class_dynamic_cast(oc, TYPE_LOONGARCH_CPU)) {
- return oc;
- }
- return NULL;
+ return oc;
}
void loongarch_cpu_dump_state(CPUState *cs, FILE *f, int flags)
diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c
index 43b1bde21c..1421e77c2c 100644
--- a/target/m68k/cpu.c
+++ b/target/m68k/cpu.c
@@ -111,9 +111,7 @@ static ObjectClass *m68k_cpu_class_by_name(const char *cpu_model)
typename = g_strdup_printf(M68K_CPU_TYPE_NAME("%s"), cpu_model);
oc = object_class_by_name(typename);
g_free(typename);
- if (oc != NULL && object_class_dynamic_cast(oc, TYPE_M68K_CPU) == NULL) {
- return NULL;
- }
+
return oc;
}
diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c
index 1173260017..f7d53c592a 100644
--- a/target/openrisc/cpu.c
+++ b/target/openrisc/cpu.c
@@ -164,9 +164,7 @@ static ObjectClass *openrisc_cpu_class_by_name(const char *cpu_model)
typename = g_strdup_printf(OPENRISC_CPU_TYPE_NAME("%s"), cpu_model);
oc = object_class_by_name(typename);
g_free(typename);
- if (oc != NULL && !object_class_dynamic_cast(oc, TYPE_OPENRISC_CPU)) {
- return NULL;
- }
+
return oc;
}
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 83c7c0cf07..523e9a16ea 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -646,9 +646,7 @@ static ObjectClass *riscv_cpu_class_by_name(const char *cpu_model)
oc = object_class_by_name(typename);
g_strfreev(cpuname);
g_free(typename);
- if (!oc || !object_class_dynamic_cast(oc, TYPE_RISCV_CPU)) {
- return NULL;
- }
+
return oc;
}
diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c
index 034e01c189..8acacdf0c0 100644
--- a/target/tricore/cpu.c
+++ b/target/tricore/cpu.c
@@ -132,9 +132,7 @@ static ObjectClass *tricore_cpu_class_by_name(const char *cpu_model)
typename = g_strdup_printf(TRICORE_CPU_TYPE_NAME("%s"), cpu_model);
oc = object_class_by_name(typename);
g_free(typename);
- if (!oc || !object_class_dynamic_cast(oc, TYPE_TRICORE_CPU)) {
- return NULL;
- }
+
return oc;
}
diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c
index e20fe87bf2..93e782a6e0 100644
--- a/target/xtensa/cpu.c
+++ b/target/xtensa/cpu.c
@@ -141,9 +141,7 @@ static ObjectClass *xtensa_cpu_class_by_name(const char *cpu_model)
typename = g_strdup_printf(XTENSA_CPU_TYPE_NAME("%s"), cpu_model);
oc = object_class_by_name(typename);
g_free(typename);
- if (oc == NULL || !object_class_dynamic_cast(oc, TYPE_XTENSA_CPU)) {
- return NULL;
- }
+
return oc;
}
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 05/71] cpu: Add helper cpu_model_from_type()
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (3 preceding siblings ...)
2024-01-05 15:41 ` [PULL 04/71] cpu: Call object_class_dynamic_cast() once in cpu_class_by_name() Philippe Mathieu-Daudé
@ 2024-01-05 15:41 ` Philippe Mathieu-Daudé
2024-01-05 15:41 ` [PULL 06/71] cpu: Add generic cpu_list() Philippe Mathieu-Daudé
` (66 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:41 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Gavin Shan, Igor Mammedov,
Philippe Mathieu-Daudé, Richard Henderson, Paolo Bonzini,
Eduardo Habkost, Marcel Apfelbaum, Yanan Wang
From: Gavin Shan <gshan@redhat.com>
Add helper cpu_model_from_type() to extract the CPU model name from
the CPU type name in two circumstances: (1) The CPU type name is the
combination of the CPU model name and suffix. (2) The CPU type name
is same to the CPU model name.
The helper will be used in the subsequent commits to conver the
CPU type name to the CPU model name.
Suggested-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20231114235628.534334-6-gshan@redhat.com>
[PMD: Mention returned string must be released with g_free()]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/core/cpu.h | 13 +++++++++++++
cpu-target.c | 15 +++++++++++++++
2 files changed, 28 insertions(+)
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index c0c8320413..76ef59de0a 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -779,6 +779,19 @@ void cpu_reset(CPUState *cpu);
*/
ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model);
+/**
+ * cpu_model_from_type:
+ * @typename: The CPU type name
+ *
+ * Extract the CPU model name from the CPU type name. The
+ * CPU type name is either the combination of the CPU model
+ * name and suffix, or same to the CPU model name.
+ *
+ * Returns: CPU model name or NULL if the CPU class doesn't exist
+ * The user should g_free() the string once no longer needed.
+ */
+char *cpu_model_from_type(const char *typename);
+
/**
* cpu_create:
* @typename: The CPU type.
diff --git a/cpu-target.c b/cpu-target.c
index 430dc53566..6f4afc1dbc 100644
--- a/cpu-target.c
+++ b/cpu-target.c
@@ -241,6 +241,21 @@ void cpu_exec_initfn(CPUState *cpu)
#endif
}
+char *cpu_model_from_type(const char *typename)
+{
+ const char *suffix = "-" CPU_RESOLVING_TYPE;
+
+ if (!object_class_by_name(typename)) {
+ return NULL;
+ }
+
+ if (g_str_has_suffix(typename, suffix)) {
+ return g_strndup(typename, strlen(typename) - strlen(suffix));
+ }
+
+ return g_strdup(typename);
+}
+
const char *parse_cpu_option(const char *cpu_option)
{
ObjectClass *oc;
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 06/71] cpu: Add generic cpu_list()
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (4 preceding siblings ...)
2024-01-05 15:41 ` [PULL 05/71] cpu: Add helper cpu_model_from_type() Philippe Mathieu-Daudé
@ 2024-01-05 15:41 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 07/71] target/alpha: Use " Philippe Mathieu-Daudé
` (65 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:41 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Gavin Shan, Richard Henderson,
Philippe Mathieu-Daudé, Warner Losh, Kyle Evans,
Paolo Bonzini
From: Gavin Shan <gshan@redhat.com>
Add generic cpu_list() to replace the individual target's implementation
in the subsequent commits. Currently, there are 3 targets with no cpu_list()
implementation: microblaze and nios2. With this applied, those two targets
switch to the generic cpu_list().
[gshan@gshan q]$ ./build/qemu-system-microblaze -cpu ?
Available CPUs:
microblaze-cpu
[gshan@gshan q]$ ./build/qemu-system-nios2 -cpu ?
Available CPUs:
nios2-cpu
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231114235628.534334-7-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
bsd-user/main.c | 5 +----
cpu-target.c | 29 ++++++++++++++++++++++++++---
2 files changed, 27 insertions(+), 7 deletions(-)
diff --git a/bsd-user/main.c b/bsd-user/main.c
index e6014f517e..4de226d211 100644
--- a/bsd-user/main.c
+++ b/bsd-user/main.c
@@ -378,10 +378,7 @@ int main(int argc, char **argv)
} else if (!strcmp(r, "cpu")) {
cpu_model = argv[optind++];
if (is_help_option(cpu_model)) {
- /* XXX: implement xxx_cpu_list for targets that still miss it */
-#if defined(cpu_list)
- cpu_list();
-#endif
+ list_cpus();
exit(1);
}
} else if (!strcmp(r, "B")) {
diff --git a/cpu-target.c b/cpu-target.c
index 6f4afc1dbc..5eecd7ea2d 100644
--- a/cpu-target.c
+++ b/cpu-target.c
@@ -24,6 +24,7 @@
#include "hw/qdev-core.h"
#include "hw/qdev-properties.h"
#include "qemu/error-report.h"
+#include "qemu/qemu-print.h"
#include "migration/vmstate.h"
#ifdef CONFIG_USER_ONLY
#include "qemu.h"
@@ -283,12 +284,34 @@ const char *parse_cpu_option(const char *cpu_option)
return cpu_type;
}
+#ifndef cpu_list
+static void cpu_list_entry(gpointer data, gpointer user_data)
+{
+ CPUClass *cc = CPU_CLASS(OBJECT_CLASS(data));
+ const char *typename = object_class_get_name(OBJECT_CLASS(data));
+ g_autofree char *model = cpu_model_from_type(typename);
+
+ if (cc->deprecation_note) {
+ qemu_printf(" %s (deprecated)\n", model);
+ } else {
+ qemu_printf(" %s\n", model);
+ }
+}
+
+static void cpu_list(void)
+{
+ GSList *list;
+
+ list = object_class_get_list_sorted(TYPE_CPU, false);
+ qemu_printf("Available CPUs:\n");
+ g_slist_foreach(list, cpu_list_entry, NULL);
+ g_slist_free(list);
+}
+#endif
+
void list_cpus(void)
{
- /* XXX: implement xxx_cpu_list for targets that still miss it */
-#if defined(cpu_list)
cpu_list();
-#endif
}
#if defined(CONFIG_USER_ONLY)
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 07/71] target/alpha: Use generic cpu_list()
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (5 preceding siblings ...)
2024-01-05 15:41 ` [PULL 06/71] cpu: Add generic cpu_list() Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 08/71] target/arm: " Philippe Mathieu-Daudé
` (64 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Gavin Shan,
Philippe Mathieu-Daudé, Richard Henderson
From: Gavin Shan <gshan@redhat.com>
Before it's applied:
[gshan@gshan q]$ ./build/qemu-system-alpha -cpu ?
Available CPUs:
ev4-alpha-cpu
ev5-alpha-cpu
ev56-alpha-cpu
ev6-alpha-cpu
ev67-alpha-cpu
ev68-alpha-cpu
pca56-alpha-cpu
After it's applied:
[gshan@gshan q]$ ./build/qemu-system-alpha -cpu ?
Available CPUs:
ev4
ev5
ev56
ev6
ev67
ev68
pca56
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20231114235628.534334-8-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/alpha/cpu.h | 3 ---
target/alpha/cpu.c | 17 -----------------
2 files changed, 20 deletions(-)
diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h
index d672e911dd..ce806587ca 100644
--- a/target/alpha/cpu.h
+++ b/target/alpha/cpu.h
@@ -292,8 +292,6 @@ void alpha_cpu_dump_state(CPUState *cs, FILE *f, int flags);
int alpha_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int alpha_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
-#define cpu_list alpha_cpu_list
-
#include "exec/cpu-all.h"
enum {
@@ -441,7 +439,6 @@ void alpha_translate_init(void);
#define CPU_RESOLVING_TYPE TYPE_ALPHA_CPU
-void alpha_cpu_list(void);
G_NORETURN void dynamic_excp(CPUAlphaState *, uintptr_t, int, int);
G_NORETURN void arith_excp(CPUAlphaState *, uintptr_t, int, uint64_t);
diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
index 83345c5c7d..b8ed29e343 100644
--- a/target/alpha/cpu.c
+++ b/target/alpha/cpu.c
@@ -87,23 +87,6 @@ static void alpha_cpu_realizefn(DeviceState *dev, Error **errp)
acc->parent_realize(dev, errp);
}
-static void alpha_cpu_list_entry(gpointer data, gpointer user_data)
-{
- ObjectClass *oc = data;
-
- qemu_printf(" %s\n", object_class_get_name(oc));
-}
-
-void alpha_cpu_list(void)
-{
- GSList *list;
-
- list = object_class_get_list_sorted(TYPE_ALPHA_CPU, false);
- qemu_printf("Available CPUs:\n");
- g_slist_foreach(list, alpha_cpu_list_entry, NULL);
- g_slist_free(list);
-}
-
/* Models */
typedef struct AlphaCPUAlias {
const char *alias;
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 08/71] target/arm: Use generic cpu_list()
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (6 preceding siblings ...)
2024-01-05 15:42 ` [PULL 07/71] target/alpha: Use " Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 09/71] target/avr: " Philippe Mathieu-Daudé
` (63 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Gavin Shan,
Philippe Mathieu-Daudé, Richard Henderson, Peter Maydell
From: Gavin Shan <gshan@redhat.com>
No changes of the output from the following command before and
after it's applied.
[gshan@gshan q]$ ./build/qemu-system-aarch64 -cpu ?
Available CPUs:
a64fx
arm1026
arm1136
arm1136-r2
arm1176
arm11mpcore
arm926
arm946
cortex-a15
cortex-a35
cortex-a53
cortex-a55
cortex-a57
cortex-a7
cortex-a710
cortex-a72
cortex-a76
cortex-a8
cortex-a9
cortex-m0
cortex-m3
cortex-m33
cortex-m4
cortex-m55
cortex-m7
cortex-r5
cortex-r52
cortex-r5f
max
neoverse-n1
neoverse-n2
neoverse-v1
pxa250
pxa255
pxa260
pxa261
pxa262
pxa270-a0
pxa270-a1
pxa270
pxa270-b0
pxa270-b1
pxa270-c0
pxa270-c5
sa1100
sa1110
ti925t
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20231114235628.534334-9-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/arm/cpu.h | 3 ---
target/arm/helper.c | 46 ---------------------------------------------
2 files changed, 49 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index a0282e0d28..8c3ca2e231 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -2737,7 +2737,6 @@ static inline bool access_secure_reg(CPUARMState *env)
(arm_is_secure(_env) && !arm_el_is_aa64((_env), 3)), \
(_val))
-void arm_cpu_list(void);
uint32_t arm_phys_excp_target_el(CPUState *cs, uint32_t excp_idx,
uint32_t cur_el, bool secure);
@@ -2840,8 +2839,6 @@ bool write_cpustate_to_list(ARMCPU *cpu, bool kvm_sync);
#define TYPE_ARM_HOST_CPU "host-" TYPE_ARM_CPU
-#define cpu_list arm_cpu_list
-
/* ARM has the following "translation regimes" (as the ARM ARM calls them):
*
* If EL3 is 64-bit:
diff --git a/target/arm/helper.c b/target/arm/helper.c
index fc546df5c7..a2a7f6c29f 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -9468,52 +9468,6 @@ void register_cp_regs_for_features(ARMCPU *cpu)
#endif
}
-/* Sort alphabetically by type name, except for "any". */
-static gint arm_cpu_list_compare(gconstpointer a, gconstpointer b)
-{
- ObjectClass *class_a = (ObjectClass *)a;
- ObjectClass *class_b = (ObjectClass *)b;
- const char *name_a, *name_b;
-
- name_a = object_class_get_name(class_a);
- name_b = object_class_get_name(class_b);
- if (strcmp(name_a, "any-" TYPE_ARM_CPU) == 0) {
- return 1;
- } else if (strcmp(name_b, "any-" TYPE_ARM_CPU) == 0) {
- return -1;
- } else {
- return strcmp(name_a, name_b);
- }
-}
-
-static void arm_cpu_list_entry(gpointer data, gpointer user_data)
-{
- ObjectClass *oc = data;
- CPUClass *cc = CPU_CLASS(oc);
- const char *typename;
- char *name;
-
- typename = object_class_get_name(oc);
- name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_ARM_CPU));
- if (cc->deprecation_note) {
- qemu_printf(" %s (deprecated)\n", name);
- } else {
- qemu_printf(" %s\n", name);
- }
- g_free(name);
-}
-
-void arm_cpu_list(void)
-{
- GSList *list;
-
- list = object_class_get_list(TYPE_ARM_CPU, false);
- list = g_slist_sort(list, arm_cpu_list_compare);
- qemu_printf("Available CPUs:\n");
- g_slist_foreach(list, arm_cpu_list_entry, NULL);
- g_slist_free(list);
-}
-
/*
* Private utility function for define_one_arm_cp_reg_with_opaque():
* add a single reginfo struct to the hash table.
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 09/71] target/avr: Use generic cpu_list()
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (7 preceding siblings ...)
2024-01-05 15:42 ` [PULL 08/71] target/arm: " Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 10/71] target/cris: " Philippe Mathieu-Daudé
` (62 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Gavin Shan,
Philippe Mathieu-Daudé, Richard Henderson, Michael Rolnik
From: Gavin Shan <gshan@redhat.com>
Before it's applied:
[gshan@gshan q]$ ./build/qemu-system-avr -cpu ?
avr5-avr-cpu
avr51-avr-cpu
avr6-avr-cpu
After it's applied:
[gshan@gshan q]$ ./build/qemu-system-avr -cpu ?
Available CPUs:
avr5
avr51
avr6
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20231114235628.534334-10-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/avr/cpu.h | 2 --
target/avr/cpu.c | 15 ---------------
2 files changed, 17 deletions(-)
diff --git a/target/avr/cpu.h b/target/avr/cpu.h
index 7960c5c57a..7d5dd42575 100644
--- a/target/avr/cpu.h
+++ b/target/avr/cpu.h
@@ -184,7 +184,6 @@ static inline void set_avr_feature(CPUAVRState *env, int feature)
env->features |= (1U << feature);
}
-#define cpu_list avr_cpu_list
#define cpu_mmu_index avr_cpu_mmu_index
static inline int avr_cpu_mmu_index(CPUAVRState *env, bool ifetch)
@@ -194,7 +193,6 @@ static inline int avr_cpu_mmu_index(CPUAVRState *env, bool ifetch)
void avr_cpu_tcg_init(void);
-void avr_cpu_list(void);
int cpu_avr_exec(CPUState *cpu);
enum {
diff --git a/target/avr/cpu.c b/target/avr/cpu.c
index 3e478294a6..f5cbdc4a8c 100644
--- a/target/avr/cpu.c
+++ b/target/avr/cpu.c
@@ -362,21 +362,6 @@ typedef struct AVRCPUInfo {
} AVRCPUInfo;
-static void avr_cpu_list_entry(gpointer data, gpointer user_data)
-{
- const char *typename = object_class_get_name(OBJECT_CLASS(data));
-
- qemu_printf("%s\n", typename);
-}
-
-void avr_cpu_list(void)
-{
- GSList *list;
- list = object_class_get_list_sorted(TYPE_AVR_CPU, false);
- g_slist_foreach(list, avr_cpu_list_entry, NULL);
- g_slist_free(list);
-}
-
#define DEFINE_AVR_CPU_TYPE(model, initfn) \
{ \
.parent = TYPE_AVR_CPU, \
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 10/71] target/cris: Use generic cpu_list()
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (8 preceding siblings ...)
2024-01-05 15:42 ` [PULL 09/71] target/avr: " Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 11/71] target/hexagon: " Philippe Mathieu-Daudé
` (61 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Gavin Shan, Richard Henderson,
Philippe Mathieu-Daudé, Edgar E. Iglesias
From: Gavin Shan <gshan@redhat.com>
Before it's applied:
[gshan@gshan q]$ ./build/qemu-system-cris -cpu ?
Available CPUs:
crisv8
crisv9
crisv10
crisv11
crisv17
crisv32
After it's applied:
[gshan@gshan q]$ ./build/qemu-system-cris -cpu ?
Available CPUs:
crisv10
crisv11
crisv17
crisv32
crisv8
crisv9
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231114235628.534334-11-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/cris/cpu.h | 3 ---
target/cris/cpu.c | 38 --------------------------------------
2 files changed, 41 deletions(-)
diff --git a/target/cris/cpu.h b/target/cris/cpu.h
index 1be7f90319..d830dcac5b 100644
--- a/target/cris/cpu.h
+++ b/target/cris/cpu.h
@@ -287,7 +287,4 @@ static inline void cpu_get_tb_cpu_state(CPUCRISState *env, vaddr *pc,
| X_FLAG | PFIX_FLAG));
}
-#define cpu_list cris_cpu_list
-void cris_cpu_list(void);
-
#endif
diff --git a/target/cris/cpu.c b/target/cris/cpu.c
index a5083a0077..9ba08e8b0c 100644
--- a/target/cris/cpu.c
+++ b/target/cris/cpu.c
@@ -99,44 +99,6 @@ static ObjectClass *cris_cpu_class_by_name(const char *cpu_model)
return oc;
}
-/* Sort alphabetically by VR. */
-static gint cris_cpu_list_compare(gconstpointer a, gconstpointer b)
-{
- CRISCPUClass *ccc_a = CRIS_CPU_CLASS(a);
- CRISCPUClass *ccc_b = CRIS_CPU_CLASS(b);
-
- /* */
- if (ccc_a->vr > ccc_b->vr) {
- return 1;
- } else if (ccc_a->vr < ccc_b->vr) {
- return -1;
- } else {
- return 0;
- }
-}
-
-static void cris_cpu_list_entry(gpointer data, gpointer user_data)
-{
- ObjectClass *oc = data;
- const char *typename = object_class_get_name(oc);
- char *name;
-
- name = g_strndup(typename, strlen(typename) - strlen(CRIS_CPU_TYPE_SUFFIX));
- qemu_printf(" %s\n", name);
- g_free(name);
-}
-
-void cris_cpu_list(void)
-{
- GSList *list;
-
- list = object_class_get_list(TYPE_CRIS_CPU, false);
- list = g_slist_sort(list, cris_cpu_list_compare);
- qemu_printf("Available CPUs:\n");
- g_slist_foreach(list, cris_cpu_list_entry, NULL);
- g_slist_free(list);
-}
-
static void cris_cpu_realizefn(DeviceState *dev, Error **errp)
{
CPUState *cs = CPU(dev);
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 11/71] target/hexagon: Use generic cpu_list()
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (9 preceding siblings ...)
2024-01-05 15:42 ` [PULL 10/71] target/cris: " Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 12/71] target/hppa: " Philippe Mathieu-Daudé
` (60 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Gavin Shan, Richard Henderson,
Philippe Mathieu-Daudé, Brian Cain
From: Gavin Shan <gshan@redhat.com>
No changes in the output from the following command.
[gshan@gshan q]$ ./build/qemu-hexagon -cpu ?
Available CPUs:
v67
v68
v69
v71
v73
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231114235628.534334-12-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/hexagon/cpu.h | 3 ---
target/hexagon/cpu.c | 20 --------------------
2 files changed, 23 deletions(-)
diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h
index 7d16083c6a..5c11ae3445 100644
--- a/target/hexagon/cpu.h
+++ b/target/hexagon/cpu.h
@@ -37,9 +37,6 @@
#define CPU_RESOLVING_TYPE TYPE_HEXAGON_CPU
-void hexagon_cpu_list(void);
-#define cpu_list hexagon_cpu_list
-
#define MMU_USER_IDX 0
typedef struct {
diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
index aa48f5fe89..c0cd739e15 100644
--- a/target/hexagon/cpu.c
+++ b/target/hexagon/cpu.c
@@ -32,26 +32,6 @@ static void hexagon_v69_cpu_init(Object *obj) { }
static void hexagon_v71_cpu_init(Object *obj) { }
static void hexagon_v73_cpu_init(Object *obj) { }
-static void hexagon_cpu_list_entry(gpointer data, gpointer user_data)
-{
- ObjectClass *oc = data;
- char *name = g_strdup(object_class_get_name(oc));
- if (g_str_has_suffix(name, HEXAGON_CPU_TYPE_SUFFIX)) {
- name[strlen(name) - strlen(HEXAGON_CPU_TYPE_SUFFIX)] = '\0';
- }
- qemu_printf(" %s\n", name);
- g_free(name);
-}
-
-void hexagon_cpu_list(void)
-{
- GSList *list;
- list = object_class_get_list_sorted(TYPE_HEXAGON_CPU, false);
- qemu_printf("Available CPUs:\n");
- g_slist_foreach(list, hexagon_cpu_list_entry, NULL);
- g_slist_free(list);
-}
-
static ObjectClass *hexagon_cpu_class_by_name(const char *cpu_model)
{
ObjectClass *oc;
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 12/71] target/hppa: Use generic cpu_list()
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (10 preceding siblings ...)
2024-01-05 15:42 ` [PULL 11/71] target/hexagon: " Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 13/71] target/loongarch: " Philippe Mathieu-Daudé
` (59 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Gavin Shan,
Philippe Mathieu-Daudé, Richard Henderson
From: Gavin Shan <gshan@redhat.com>
No changes in the output from the following command.
[gshan@gshan q]$ ./build/qemu-system-hppa -cpu ?
Available CPUs:
hppa
hppa64
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20231114235628.534334-13-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/hppa/cpu.h | 3 ---
target/hppa/cpu.c | 24 ------------------------
2 files changed, 27 deletions(-)
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index 8be45c69c9..fd659ca88b 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -402,7 +402,4 @@ G_NORETURN void hppa_dynamic_excp(CPUHPPAState *env, int excp, uintptr_t ra);
#define CPU_RESOLVING_TYPE TYPE_HPPA_CPU
-#define cpu_list hppa_cpu_list
-void hppa_cpu_list(void);
-
#endif /* HPPA_CPU_H */
diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c
index 1a5fb6c65b..e1f252cc45 100644
--- a/target/hppa/cpu.c
+++ b/target/hppa/cpu.c
@@ -164,30 +164,6 @@ static ObjectClass *hppa_cpu_class_by_name(const char *cpu_model)
return object_class_by_name(typename);
}
-static void hppa_cpu_list_entry(gpointer data, gpointer user_data)
-{
- ObjectClass *oc = data;
- CPUClass *cc = CPU_CLASS(oc);
- const char *tname = object_class_get_name(oc);
- g_autofree char *name = g_strndup(tname, strchr(tname, '-') - tname);
-
- if (cc->deprecation_note) {
- qemu_printf(" %s (deprecated)\n", name);
- } else {
- qemu_printf(" %s\n", name);
- }
-}
-
-void hppa_cpu_list(void)
-{
- GSList *list;
-
- list = object_class_get_list_sorted(TYPE_HPPA_CPU, false);
- qemu_printf("Available CPUs:\n");
- g_slist_foreach(list, hppa_cpu_list_entry, NULL);
- g_slist_free(list);
-}
-
#ifndef CONFIG_USER_ONLY
#include "hw/core/sysemu-cpu-ops.h"
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 13/71] target/loongarch: Use generic cpu_list()
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (11 preceding siblings ...)
2024-01-05 15:42 ` [PULL 12/71] target/hppa: " Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 14/71] target/m68k: " Philippe Mathieu-Daudé
` (58 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Gavin Shan, Richard Henderson,
Philippe Mathieu-Daudé, Song Gao
From: Gavin Shan <gshan@redhat.com>
Before it's applied:
[gshan@gshan q]$ ./build/qemu-system-loongarch64 -cpu ?
la132-loongarch-cpu
la464-loongarch-cpu
max-loongarch-cpu
After it's applied:
[gshan@gshan q]$ ./build/qemu-system-loongarch64 -cpu ?
Available CPUs:
la132
la464
max
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231114235628.534334-14-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/loongarch/cpu.h | 4 ----
target/loongarch/cpu.c | 15 ---------------
2 files changed, 19 deletions(-)
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index 00d1fba597..0c15a174e4 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -466,10 +466,6 @@ static inline void cpu_get_tb_cpu_state(CPULoongArchState *env, vaddr *pc,
*flags |= is_va32(env) * HW_FLAGS_VA32;
}
-void loongarch_cpu_list(void);
-
-#define cpu_list loongarch_cpu_list
-
#include "exec/cpu-all.h"
#define CPU_RESOLVING_TYPE TYPE_LOONGARCH_CPU
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index 81f2d8d8ed..87dfcdb0a5 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -483,21 +483,6 @@ static void loongarch_max_initfn(Object *obj)
loongarch_la464_initfn(obj);
}
-static void loongarch_cpu_list_entry(gpointer data, gpointer user_data)
-{
- const char *typename = object_class_get_name(OBJECT_CLASS(data));
-
- qemu_printf("%s\n", typename);
-}
-
-void loongarch_cpu_list(void)
-{
- GSList *list;
- list = object_class_get_list_sorted(TYPE_LOONGARCH_CPU, false);
- g_slist_foreach(list, loongarch_cpu_list_entry, NULL);
- g_slist_free(list);
-}
-
static void loongarch_cpu_reset_hold(Object *obj)
{
CPUState *cs = CPU(obj);
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 14/71] target/m68k: Use generic cpu_list()
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (12 preceding siblings ...)
2024-01-05 15:42 ` [PULL 13/71] target/loongarch: " Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 15/71] target/mips: " Philippe Mathieu-Daudé
` (57 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Gavin Shan, Richard Henderson,
Philippe Mathieu-Daudé, Laurent Vivier
From: Gavin Shan <gshan@redhat.com>
Before it's applied:
[gshan@gshan q]$ ./build/qemu-system-m68k -cpu ?
cfv4e
m5206
m5208
m68000
m68010
m68020
m68030
m68040
m68060
any
After it's applied:
[gshan@gshan q]$ ./build/qemu-system-m68k -cpu ?
Available CPUs:
any
cfv4e
m5206
m5208
m68000
m68010
m68020
m68030
m68040
m68060
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231114235628.534334-15-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/m68k/cpu.h | 4 ----
target/m68k/helper.c | 40 ----------------------------------------
2 files changed, 44 deletions(-)
diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index 6cfc696d2b..d13427b0fe 100644
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -556,8 +556,6 @@ static inline bool m68k_feature(CPUM68KState *env, int feature)
return (env->features & BIT_ULL(feature)) != 0;
}
-void m68k_cpu_list(void);
-
void register_m68k_insns (CPUM68KState *env);
enum {
@@ -576,8 +574,6 @@ enum {
#define CPU_RESOLVING_TYPE TYPE_M68K_CPU
-#define cpu_list m68k_cpu_list
-
/* MMU modes definitions */
#define MMU_KERNEL_IDX 0
#define MMU_USER_IDX 1
diff --git a/target/m68k/helper.c b/target/m68k/helper.c
index 0a1544cd68..14508dfa11 100644
--- a/target/m68k/helper.c
+++ b/target/m68k/helper.c
@@ -29,46 +29,6 @@
#define SIGNBIT (1u << 31)
-/* Sort alphabetically, except for "any". */
-static gint m68k_cpu_list_compare(gconstpointer a, gconstpointer b)
-{
- ObjectClass *class_a = (ObjectClass *)a;
- ObjectClass *class_b = (ObjectClass *)b;
- const char *name_a, *name_b;
-
- name_a = object_class_get_name(class_a);
- name_b = object_class_get_name(class_b);
- if (strcmp(name_a, "any-" TYPE_M68K_CPU) == 0) {
- return 1;
- } else if (strcmp(name_b, "any-" TYPE_M68K_CPU) == 0) {
- return -1;
- } else {
- return strcasecmp(name_a, name_b);
- }
-}
-
-static void m68k_cpu_list_entry(gpointer data, gpointer user_data)
-{
- ObjectClass *c = data;
- const char *typename;
- char *name;
-
- typename = object_class_get_name(c);
- name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_M68K_CPU));
- qemu_printf("%s\n", name);
- g_free(name);
-}
-
-void m68k_cpu_list(void)
-{
- GSList *list;
-
- list = object_class_get_list(TYPE_M68K_CPU, false);
- list = g_slist_sort(list, m68k_cpu_list_compare);
- g_slist_foreach(list, m68k_cpu_list_entry, NULL);
- g_slist_free(list);
-}
-
static int cf_fpu_gdb_get_reg(CPUM68KState *env, GByteArray *mem_buf, int n)
{
if (n < 8) {
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 15/71] target/mips: Use generic cpu_list()
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (13 preceding siblings ...)
2024-01-05 15:42 ` [PULL 14/71] target/m68k: " Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 16/71] target/openrisc: " Philippe Mathieu-Daudé
` (56 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Gavin Shan,
Philippe Mathieu-Daudé, Richard Henderson, Aurelien Jarno,
Jiaxun Yang, Aleksandar Rikalo
From: Gavin Shan <gshan@redhat.com>
Before it's applied:
[gshan@gshan q]$ ./build/qemu-system-mips64 -cpu ?
MIPS '4Kc'
MIPS '4Km'
MIPS '4KEcR1'
MIPS 'XBurstR1'
MIPS '4KEmR1'
MIPS '4KEc'
MIPS '4KEm'
MIPS '24Kc'
MIPS '24KEc'
MIPS '24Kf'
MIPS '34Kf'
MIPS '74Kf'
MIPS 'XBurstR2'
MIPS 'M14K'
MIPS 'M14Kc'
MIPS 'P5600'
MIPS 'mips32r6-generic'
MIPS 'I7200'
MIPS 'R4000'
MIPS 'VR5432'
MIPS '5Kc'
MIPS '5Kf'
MIPS '20Kc'
MIPS 'MIPS64R2-generic'
MIPS '5KEc'
MIPS '5KEf'
MIPS 'I6400'
MIPS 'I6500'
MIPS 'Loongson-2E'
MIPS 'Loongson-2F'
MIPS 'Loongson-3A1000'
MIPS 'Loongson-3A4000'
MIPS 'mips64dspr2'
MIPS 'Octeon68XX'
After it's applied:
[gshan@gshan q]$ ./build/qemu-system-mips64 -cpu ?
Available CPUs:
20Kc
24Kc
24KEc
24Kf
34Kf
4Kc
4KEc
4KEcR1
4KEm
4KEmR1
4Km
5Kc
5KEc
5KEf
5Kf
74Kf
I6400
I6500
I7200
Loongson-2E
Loongson-2F
Loongson-3A1000
Loongson-3A4000
M14K
M14Kc
mips32r6-generic
mips64dspr2
MIPS64R2-generic
Octeon68XX
P5600
R4000
VR5432
XBurstR1
XBurstR2
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20231114235628.534334-16-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/mips/cpu.h | 4 ----
target/mips/cpu-defs.c.inc | 9 ---------
2 files changed, 13 deletions(-)
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 52f13f0363..1163a71f3c 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -1235,10 +1235,6 @@ struct MIPSCPUClass {
bool no_data_aborts;
};
-void mips_cpu_list(void);
-
-#define cpu_list mips_cpu_list
-
void cpu_wrdsp(uint32_t rs, uint32_t mask_num, CPUMIPSState *env);
uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState *env);
diff --git a/target/mips/cpu-defs.c.inc b/target/mips/cpu-defs.c.inc
index c0c389c59a..fbf787d8ce 100644
--- a/target/mips/cpu-defs.c.inc
+++ b/target/mips/cpu-defs.c.inc
@@ -1018,15 +1018,6 @@ const mips_def_t mips_defs[] =
};
const int mips_defs_number = ARRAY_SIZE(mips_defs);
-void mips_cpu_list(void)
-{
- int i;
-
- for (i = 0; i < ARRAY_SIZE(mips_defs); i++) {
- qemu_printf("MIPS '%s'\n", mips_defs[i].name);
- }
-}
-
static void fpu_init (CPUMIPSState *env, const mips_def_t *def)
{
int i;
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 16/71] target/openrisc: Use generic cpu_list()
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (14 preceding siblings ...)
2024-01-05 15:42 ` [PULL 15/71] target/mips: " Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 17/71] target/riscv: " Philippe Mathieu-Daudé
` (55 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Gavin Shan,
Philippe Mathieu-Daudé, Richard Henderson, Stafford Horne
From: Gavin Shan <gshan@redhat.com>
Before it's applied:
[gshan@gshan q]$ ./build/qemu-or1k -cpu ?
Available CPUs:
or1200
any
After it's applied:
[gshan@gshan q]$ ./build/qemu-or1k -cpu ?
Available CPUs:
any
or1200
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20231114235628.534334-17-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/openrisc/cpu.h | 3 ---
target/openrisc/cpu.c | 42 ------------------------------------------
2 files changed, 45 deletions(-)
diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h
index dedeb89f8e..b454014ddd 100644
--- a/target/openrisc/cpu.h
+++ b/target/openrisc/cpu.h
@@ -299,15 +299,12 @@ struct ArchCPU {
CPUOpenRISCState env;
};
-void cpu_openrisc_list(void);
void openrisc_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
int openrisc_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int openrisc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
void openrisc_translate_init(void);
int print_insn_or1k(bfd_vma addr, disassemble_info *info);
-#define cpu_list cpu_openrisc_list
-
#ifndef CONFIG_USER_ONLY
hwaddr openrisc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c
index f7d53c592a..381ebe00d3 100644
--- a/target/openrisc/cpu.c
+++ b/target/openrisc/cpu.c
@@ -253,48 +253,6 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data)
cc->tcg_ops = &openrisc_tcg_ops;
}
-/* Sort alphabetically by type name, except for "any". */
-static gint openrisc_cpu_list_compare(gconstpointer a, gconstpointer b)
-{
- ObjectClass *class_a = (ObjectClass *)a;
- ObjectClass *class_b = (ObjectClass *)b;
- const char *name_a, *name_b;
-
- name_a = object_class_get_name(class_a);
- name_b = object_class_get_name(class_b);
- if (strcmp(name_a, "any-" TYPE_OPENRISC_CPU) == 0) {
- return 1;
- } else if (strcmp(name_b, "any-" TYPE_OPENRISC_CPU) == 0) {
- return -1;
- } else {
- return strcmp(name_a, name_b);
- }
-}
-
-static void openrisc_cpu_list_entry(gpointer data, gpointer user_data)
-{
- ObjectClass *oc = data;
- const char *typename;
- char *name;
-
- typename = object_class_get_name(oc);
- name = g_strndup(typename,
- strlen(typename) - strlen("-" TYPE_OPENRISC_CPU));
- qemu_printf(" %s\n", name);
- g_free(name);
-}
-
-void cpu_openrisc_list(void)
-{
- GSList *list;
-
- list = object_class_get_list(TYPE_OPENRISC_CPU, false);
- list = g_slist_sort(list, openrisc_cpu_list_compare);
- qemu_printf("Available CPUs:\n");
- g_slist_foreach(list, openrisc_cpu_list_entry, NULL);
- g_slist_free(list);
-}
-
#define DEFINE_OPENRISC_CPU_TYPE(cpu_model, initfn) \
{ \
.parent = TYPE_OPENRISC_CPU, \
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 17/71] target/riscv: Use generic cpu_list()
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (15 preceding siblings ...)
2024-01-05 15:42 ` [PULL 16/71] target/openrisc: " Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 18/71] target/rx: " Philippe Mathieu-Daudé
` (54 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Gavin Shan,
Philippe Mathieu-Daudé, Richard Henderson, Palmer Dabbelt,
Alistair Francis, Bin Meng, Weiwei Li, Daniel Henrique Barboza,
Liu Zhiwei
From: Gavin Shan <gshan@redhat.com>
Before it's applied:
[gshan@gshan q]$ ./build/qemu-system-riscv64 -cpu ?
any
max
rv64
shakti-c
sifive-e51
sifive-u54
thead-c906
veyron-v1
x-rv128
After it's applied:
[gshan@gshan q]$ ./build/qemu-system-riscv64 -cpu ?
Available CPUs:
any
max
rv64
shakti-c
sifive-e51
sifive-u54
thead-c906
veyron-v1
x-rv128
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20231114235628.534334-18-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/riscv/cpu.h | 2 --
target/riscv/cpu.c | 29 -----------------------------
2 files changed, 31 deletions(-)
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index d74b361be6..2725528bb5 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -490,9 +490,7 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr);
char *riscv_isa_string(RISCVCPU *cpu);
-void riscv_cpu_list(void);
-#define cpu_list riscv_cpu_list
#define cpu_mmu_index riscv_cpu_mmu_index
#ifndef CONFIG_USER_ONLY
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 523e9a16ea..22d7422c89 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1733,35 +1733,6 @@ char *riscv_isa_string(RISCVCPU *cpu)
return isa_str;
}
-static gint riscv_cpu_list_compare(gconstpointer a, gconstpointer b)
-{
- ObjectClass *class_a = (ObjectClass *)a;
- ObjectClass *class_b = (ObjectClass *)b;
- const char *name_a, *name_b;
-
- name_a = object_class_get_name(class_a);
- name_b = object_class_get_name(class_b);
- return strcmp(name_a, name_b);
-}
-
-static void riscv_cpu_list_entry(gpointer data, gpointer user_data)
-{
- const char *typename = object_class_get_name(OBJECT_CLASS(data));
- int len = strlen(typename) - strlen(RISCV_CPU_TYPE_SUFFIX);
-
- qemu_printf("%.*s\n", len, typename);
-}
-
-void riscv_cpu_list(void)
-{
- GSList *list;
-
- list = object_class_get_list(TYPE_RISCV_CPU, false);
- list = g_slist_sort(list, riscv_cpu_list_compare);
- g_slist_foreach(list, riscv_cpu_list_entry, NULL);
- g_slist_free(list);
-}
-
#define DEFINE_CPU(type_name, initfn) \
{ \
.name = type_name, \
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 18/71] target/rx: Use generic cpu_list()
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (16 preceding siblings ...)
2024-01-05 15:42 ` [PULL 17/71] target/riscv: " Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 19/71] target/sh4: " Philippe Mathieu-Daudé
` (53 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Gavin Shan, Richard Henderson,
Philippe Mathieu-Daudé, Yoshinori Sato
From: Gavin Shan <gshan@redhat.com>
Before it's applied:
[gshan@gshan q]$ ./build/qemu-system-rx -cpu ?
Available CPUs:
rx62n-rx-cpu
After it's applied:
[gshan@gshan q]$ ./build/qemu-system-rx -cpu ?
Available CPUs:
rx62n
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231114235628.534334-19-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/rx/cpu.h | 3 ---
target/rx/cpu.c | 16 ----------------
2 files changed, 19 deletions(-)
diff --git a/target/rx/cpu.h b/target/rx/cpu.h
index e931e77e85..65f9cd2d0a 100644
--- a/target/rx/cpu.h
+++ b/target/rx/cpu.h
@@ -139,11 +139,8 @@ int rx_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int rx_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
void rx_translate_init(void);
-void rx_cpu_list(void);
void rx_cpu_unpack_psw(CPURXState *env, uint32_t psw, int rte);
-#define cpu_list rx_cpu_list
-
#include "exec/cpu-all.h"
#define CPU_INTERRUPT_SOFT CPU_INTERRUPT_TGT_INT_0
diff --git a/target/rx/cpu.c b/target/rx/cpu.c
index 9cc9d9d15e..c5ffeffe32 100644
--- a/target/rx/cpu.c
+++ b/target/rx/cpu.c
@@ -89,22 +89,6 @@ static void rx_cpu_reset_hold(Object *obj)
set_flush_inputs_to_zero(1, &env->fp_status);
}
-static void rx_cpu_list_entry(gpointer data, gpointer user_data)
-{
- ObjectClass *oc = data;
-
- qemu_printf(" %s\n", object_class_get_name(oc));
-}
-
-void rx_cpu_list(void)
-{
- GSList *list;
- list = object_class_get_list_sorted(TYPE_RX_CPU, false);
- qemu_printf("Available CPUs:\n");
- g_slist_foreach(list, rx_cpu_list_entry, NULL);
- g_slist_free(list);
-}
-
static ObjectClass *rx_cpu_class_by_name(const char *cpu_model)
{
ObjectClass *oc;
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 19/71] target/sh4: Use generic cpu_list()
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (17 preceding siblings ...)
2024-01-05 15:42 ` [PULL 18/71] target/rx: " Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 20/71] target/tricore: " Philippe Mathieu-Daudé
` (52 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Gavin Shan, Richard Henderson,
Philippe Mathieu-Daudé, Yoshinori Sato
From: Gavin Shan <gshan@redhat.com>
Before it's applied:
[gshan@gshan q]$ ./build/qemu-system-sh4 -cpu ?
sh7750r
sh7751r
sh7785
After it's applied:
[gshan@gshan q]$ ./build/qemu-system-sh4 -cpu ?
Available CPUs:
sh7750r
sh7751r
sh7785
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231114235628.534334-20-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/sh4/cpu.h | 3 ---
target/sh4/cpu.c | 17 -----------------
2 files changed, 20 deletions(-)
diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
index 031dc0b457..0e6fa65bae 100644
--- a/target/sh4/cpu.h
+++ b/target/sh4/cpu.h
@@ -238,7 +238,6 @@ G_NORETURN void superh_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
uintptr_t retaddr);
void sh4_translate_init(void);
-void sh4_cpu_list(void);
#if !defined(CONFIG_USER_ONLY)
hwaddr superh_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
@@ -272,8 +271,6 @@ void cpu_load_tlb(CPUSH4State * env);
#define CPU_RESOLVING_TYPE TYPE_SUPERH_CPU
-#define cpu_list sh4_cpu_list
-
/* MMU modes definitions */
#define MMU_USER_IDX 1
static inline int cpu_mmu_index (CPUSH4State *env, bool ifetch)
diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c
index a8ec98b134..806a0ef875 100644
--- a/target/sh4/cpu.c
+++ b/target/sh4/cpu.c
@@ -122,23 +122,6 @@ static void superh_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
info->print_insn = print_insn_sh;
}
-static void superh_cpu_list_entry(gpointer data, gpointer user_data)
-{
- const char *typename = object_class_get_name(OBJECT_CLASS(data));
- int len = strlen(typename) - strlen(SUPERH_CPU_TYPE_SUFFIX);
-
- qemu_printf("%.*s\n", len, typename);
-}
-
-void sh4_cpu_list(void)
-{
- GSList *list;
-
- list = object_class_get_list_sorted(TYPE_SUPERH_CPU, false);
- g_slist_foreach(list, superh_cpu_list_entry, NULL);
- g_slist_free(list);
-}
-
static ObjectClass *superh_cpu_class_by_name(const char *cpu_model)
{
ObjectClass *oc;
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 20/71] target/tricore: Use generic cpu_list()
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (18 preceding siblings ...)
2024-01-05 15:42 ` [PULL 19/71] target/sh4: " Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 21/71] target/xtensa: " Philippe Mathieu-Daudé
` (51 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Gavin Shan, Richard Henderson,
Philippe Mathieu-Daudé, Bastian Koppelmann
From: Gavin Shan <gshan@redhat.com>
No changes in the output from the following command.
[gshan@gshan q]$ ./build/qemu-system-tricore -cpu ?
Available CPUs:
tc1796
tc1797
tc27x
tc37x
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231114235628.534334-21-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/tricore/cpu.h | 4 ----
target/tricore/helper.c | 22 ----------------------
2 files changed, 26 deletions(-)
diff --git a/target/tricore/cpu.h b/target/tricore/cpu.h
index de3ab53a83..2d4446cea5 100644
--- a/target/tricore/cpu.h
+++ b/target/tricore/cpu.h
@@ -246,10 +246,6 @@ void fpu_set_state(CPUTriCoreState *env);
#define MMU_USER_IDX 2
-void tricore_cpu_list(void);
-
-#define cpu_list tricore_cpu_list
-
static inline int cpu_mmu_index(CPUTriCoreState *env, bool ifetch)
{
return 0;
diff --git a/target/tricore/helper.c b/target/tricore/helper.c
index 7e5da3cb23..174f666e1e 100644
--- a/target/tricore/helper.c
+++ b/target/tricore/helper.c
@@ -96,28 +96,6 @@ bool tricore_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
}
}
-static void tricore_cpu_list_entry(gpointer data, gpointer user_data)
-{
- ObjectClass *oc = data;
- const char *typename;
- char *name;
-
- typename = object_class_get_name(oc);
- name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_TRICORE_CPU));
- qemu_printf(" %s\n", name);
- g_free(name);
-}
-
-void tricore_cpu_list(void)
-{
- GSList *list;
-
- list = object_class_get_list_sorted(TYPE_TRICORE_CPU, false);
- qemu_printf("Available CPUs:\n");
- g_slist_foreach(list, tricore_cpu_list_entry, NULL);
- g_slist_free(list);
-}
-
void fpu_set_state(CPUTriCoreState *env)
{
switch (extract32(env->PSW, 24, 2)) {
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 21/71] target/xtensa: Use generic cpu_list()
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (19 preceding siblings ...)
2024-01-05 15:42 ` [PULL 20/71] target/tricore: " Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 22/71] target: Use generic cpu_model_from_type() Philippe Mathieu-Daudé
` (50 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Gavin Shan,
Philippe Mathieu-Daudé, Max Filippov
From: Gavin Shan <gshan@redhat.com>
Before it's applied:
[gshan@gshan q]$ ./build/qemu-system-xtensa -cpu ?
Available CPUs:
test_mmuhifi_c3
sample_controller
lx106
dsp3400
de233_fpu
de212
dc233c
dc232b
After it's applied:
[gshan@gshan q]$ ./build/qemu-system-xtensa -cpu ?
Available CPUs:
dc232b
dc233c
de212
de233_fpu
dsp3400
lx106
sample_controller
test_mmuhifi_c3
Signed-off-by: Gavin Shan <gshan@redhat.com>
Message-ID: <20231114235628.534334-22-gshan@redhat.com>
[PMD: Split patch in 2, only include the "Use generic cpu_list" change]
Message-ID: <51ffd060-b2f8-405c-83e1-a0663c0183f5@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/xtensa/cpu.h | 3 ---
target/xtensa/helper.c | 9 ---------
2 files changed, 12 deletions(-)
diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
index dd81729306..d9c49a35fa 100644
--- a/target/xtensa/cpu.h
+++ b/target/xtensa/cpu.h
@@ -600,8 +600,6 @@ G_NORETURN void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
MMUAccessType access_type, int mmu_idx,
uintptr_t retaddr);
-#define cpu_list xtensa_cpu_list
-
#define CPU_RESOLVING_TYPE TYPE_XTENSA_CPU
#if TARGET_BIG_ENDIAN
@@ -626,7 +624,6 @@ void check_interrupts(CPUXtensaState *s);
void xtensa_irq_init(CPUXtensaState *env);
qemu_irq *xtensa_get_extints(CPUXtensaState *env);
qemu_irq xtensa_get_runstall(CPUXtensaState *env);
-void xtensa_cpu_list(void);
void xtensa_sync_window_from_phys(CPUXtensaState *env);
void xtensa_sync_phys_from_window(CPUXtensaState *env);
void xtensa_rotate_window(CPUXtensaState *env, uint32_t delta);
diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c
index dbeb97a953..f6632df646 100644
--- a/target/xtensa/helper.c
+++ b/target/xtensa/helper.c
@@ -234,15 +234,6 @@ void xtensa_breakpoint_handler(CPUState *cs)
}
}
-void xtensa_cpu_list(void)
-{
- XtensaConfigList *core = xtensa_cores;
- qemu_printf("Available CPUs:\n");
- for (; core; core = core->next) {
- qemu_printf(" %s\n", core->config->name);
- }
-}
-
#ifndef CONFIG_USER_ONLY
void xtensa_cpu_do_unaligned_access(CPUState *cs,
vaddr addr, MMUAccessType access_type,
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 22/71] target: Use generic cpu_model_from_type()
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (20 preceding siblings ...)
2024-01-05 15:42 ` [PULL 21/71] target/xtensa: " Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 23/71] hw/core: Add machine_class_default_cpu_type() Philippe Mathieu-Daudé
` (49 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Gavin Shan,
Philippe Mathieu-Daudé, Richard Henderson, Peter Maydell,
Paolo Bonzini, Song Gao, Huacai Chen, Aurelien Jarno, Jiaxun Yang,
Aleksandar Rikalo, Nicholas Piggin, Daniel Henrique Barboza,
Cédric Le Goater, Palmer Dabbelt, Alistair Francis, Bin Meng,
Weiwei Li, Liu Zhiwei
From: Gavin Shan <gshan@redhat.com>
Use generic cpu_model_from_type() when the CPU model name needs to
be extracted from the CPU type name.
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20231114235628.534334-23-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/arm/arm-qmp-cmds.c | 3 +--
target/i386/cpu.c | 3 +--
target/loongarch/loongarch-qmp-cmds.c | 3 +--
target/mips/sysemu/mips-qmp-cmds.c | 3 +--
target/ppc/cpu_init.c | 3 +--
target/ppc/ppc-qmp-cmds.c | 3 +--
target/riscv/cpu.c | 3 +--
target/riscv/riscv-qmp-cmds.c | 3 +--
8 files changed, 8 insertions(+), 16 deletions(-)
diff --git a/target/arm/arm-qmp-cmds.c b/target/arm/arm-qmp-cmds.c
index b53d5efe13..2250cd7ddf 100644
--- a/target/arm/arm-qmp-cmds.c
+++ b/target/arm/arm-qmp-cmds.c
@@ -237,8 +237,7 @@ static void arm_cpu_add_definition(gpointer data, gpointer user_data)
typename = object_class_get_name(oc);
info = g_malloc0(sizeof(*info));
- info->name = g_strndup(typename,
- strlen(typename) - strlen("-" TYPE_ARM_CPU));
+ info->name = cpu_model_from_type(typename);
info->q_typename = g_strdup(typename);
QAPI_LIST_PREPEND(*cpu_list, info);
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index fd47ee7def..2524881ce2 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -1744,8 +1744,7 @@ static char *x86_cpu_class_get_model_name(X86CPUClass *cc)
{
const char *class_name = object_class_get_name(OBJECT_CLASS(cc));
assert(g_str_has_suffix(class_name, X86_CPU_TYPE_SUFFIX));
- return g_strndup(class_name,
- strlen(class_name) - strlen(X86_CPU_TYPE_SUFFIX));
+ return cpu_model_from_type(class_name);
}
typedef struct X86CPUVersionDefinition {
diff --git a/target/loongarch/loongarch-qmp-cmds.c b/target/loongarch/loongarch-qmp-cmds.c
index 645672ff59..ec33ce81f0 100644
--- a/target/loongarch/loongarch-qmp-cmds.c
+++ b/target/loongarch/loongarch-qmp-cmds.c
@@ -22,8 +22,7 @@ static void loongarch_cpu_add_definition(gpointer data, gpointer user_data)
CpuDefinitionInfo *info = g_new0(CpuDefinitionInfo, 1);
const char *typename = object_class_get_name(oc);
- info->name = g_strndup(typename,
- strlen(typename) - strlen("-" TYPE_LOONGARCH_CPU));
+ info->name = cpu_model_from_type(typename);
info->q_typename = g_strdup(typename);
QAPI_LIST_PREPEND(*cpu_list, info);
diff --git a/target/mips/sysemu/mips-qmp-cmds.c b/target/mips/sysemu/mips-qmp-cmds.c
index 6db4626412..7340ac70ba 100644
--- a/target/mips/sysemu/mips-qmp-cmds.c
+++ b/target/mips/sysemu/mips-qmp-cmds.c
@@ -19,8 +19,7 @@ static void mips_cpu_add_definition(gpointer data, gpointer user_data)
typename = object_class_get_name(oc);
info = g_malloc0(sizeof(*info));
- info->name = g_strndup(typename,
- strlen(typename) - strlen("-" TYPE_MIPS_CPU));
+ info->name = cpu_model_from_type(typename);
info->q_typename = g_strdup(typename);
QAPI_LIST_PREPEND(*cpu_list, info);
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 40fe14a6c2..344196a8ce 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -7036,8 +7036,7 @@ static void ppc_cpu_list_entry(gpointer data, gpointer user_data)
return;
}
- name = g_strndup(typename,
- strlen(typename) - strlen(POWERPC_CPU_TYPE_SUFFIX));
+ name = cpu_model_from_type(typename);
qemu_printf("PowerPC %-16s PVR %08x\n", name, pcc->pvr);
for (i = 0; ppc_cpu_aliases[i].alias != NULL; i++) {
PowerPCCPUAlias *alias = &ppc_cpu_aliases[i];
diff --git a/target/ppc/ppc-qmp-cmds.c b/target/ppc/ppc-qmp-cmds.c
index f9acc21056..c0c137d9d7 100644
--- a/target/ppc/ppc-qmp-cmds.c
+++ b/target/ppc/ppc-qmp-cmds.c
@@ -181,8 +181,7 @@ static void ppc_cpu_defs_entry(gpointer data, gpointer user_data)
typename = object_class_get_name(oc);
info = g_malloc0(sizeof(*info));
- info->name = g_strndup(typename,
- strlen(typename) - strlen(POWERPC_CPU_TYPE_SUFFIX));
+ info->name = cpu_model_from_type(typename);
QAPI_LIST_PREPEND(*first, info);
}
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 22d7422c89..b07a76ef6b 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -657,8 +657,7 @@ char *riscv_cpu_get_name(RISCVCPU *cpu)
g_assert(g_str_has_suffix(typename, RISCV_CPU_TYPE_SUFFIX));
- return g_strndup(typename,
- strlen(typename) - strlen(RISCV_CPU_TYPE_SUFFIX));
+ return cpu_model_from_type(typename);
}
static void riscv_cpu_dump_state(CPUState *cs, FILE *f, int flags)
diff --git a/target/riscv/riscv-qmp-cmds.c b/target/riscv/riscv-qmp-cmds.c
index 2f2dbae7c8..c5551d2cfe 100644
--- a/target/riscv/riscv-qmp-cmds.c
+++ b/target/riscv/riscv-qmp-cmds.c
@@ -44,8 +44,7 @@ static void riscv_cpu_add_definition(gpointer data, gpointer user_data)
const char *typename = object_class_get_name(oc);
ObjectClass *dyn_class;
- info->name = g_strndup(typename,
- strlen(typename) - strlen("-" TYPE_RISCV_CPU));
+ info->name = cpu_model_from_type(typename);
info->q_typename = g_strdup(typename);
dyn_class = object_class_dynamic_cast(oc, TYPE_RISCV_DYNAMIC_CPU);
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 23/71] hw/core: Add machine_class_default_cpu_type()
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (21 preceding siblings ...)
2024-01-05 15:42 ` [PULL 22/71] target: Use generic cpu_model_from_type() Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 24/71] machine: Use error handling when CPU type is checked Philippe Mathieu-Daudé
` (48 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Richard Henderson, Eduardo Habkost, Marcel Apfelbaum, Yanan Wang,
Paolo Bonzini
Add a helper to return a machine default CPU type.
If this machine is restricted to a single CPU type,
use it as default, obviously.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231116163726.28952-1-philmd@linaro.org>
---
include/hw/boards.h | 6 ++++++
hw/core/machine.c | 8 ++++++++
system/vl.c | 2 +-
3 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/include/hw/boards.h b/include/hw/boards.h
index 8af165f4dc..bcfde8a84d 100644
--- a/include/hw/boards.h
+++ b/include/hw/boards.h
@@ -24,6 +24,12 @@ OBJECT_DECLARE_TYPE(MachineState, MachineClass, MACHINE)
extern MachineState *current_machine;
+/**
+ * machine_class_default_cpu_type: Return the machine default CPU type.
+ * @mc: Machine class
+ */
+const char *machine_class_default_cpu_type(MachineClass *mc);
+
void machine_add_audiodev_property(MachineClass *mc);
void machine_run_board_init(MachineState *machine, const char *mem_path, Error **errp);
bool machine_usb(MachineState *machine);
diff --git a/hw/core/machine.c b/hw/core/machine.c
index 2699bcba53..0198b54b39 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -1390,6 +1390,14 @@ out:
return r;
}
+const char *machine_class_default_cpu_type(MachineClass *mc)
+{
+ if (mc->valid_cpu_types && !mc->valid_cpu_types[1]) {
+ /* Only a single CPU type allowed: use it as default. */
+ return mc->valid_cpu_types[0];
+ }
+ return mc->default_cpu_type;
+}
void machine_run_board_init(MachineState *machine, const char *mem_path, Error **errp)
{
diff --git a/system/vl.c b/system/vl.c
index 6b87bfa32c..fbdf8bd55a 100644
--- a/system/vl.c
+++ b/system/vl.c
@@ -3737,7 +3737,7 @@ void qemu_init(int argc, char **argv)
migration_object_init();
/* parse features once if machine provides default cpu_type */
- current_machine->cpu_type = machine_class->default_cpu_type;
+ current_machine->cpu_type = machine_class_default_cpu_type(machine_class);
if (cpu_option) {
current_machine->cpu_type = parse_cpu_option(cpu_option);
}
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 24/71] machine: Use error handling when CPU type is checked
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (22 preceding siblings ...)
2024-01-05 15:42 ` [PULL 23/71] hw/core: Add machine_class_default_cpu_type() Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 25/71] machine: Introduce helper is_cpu_type_supported() Philippe Mathieu-Daudé
` (47 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Gavin Shan, Igor Mammedov,
Markus Armbruster, Philippe Mathieu-Daudé, Eduardo Habkost,
Marcel Apfelbaum, Yanan Wang
From: Gavin Shan <gshan@redhat.com>
Functions that use an Error **errp parameter to return errors should
not also report them to the user, because reporting is the caller's
job. The principle is violated by machine_run_board_init() because
it calls error_report(), error_printf(), and exit(1) when the machine
doesn't support the requested CPU type.
Clean this up by using error_setg() and error_append_hint() instead.
No functional change, as the only caller passes &error_fatal.
Suggested-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Message-ID: <20231204004726.483558-2-gshan@redhat.com>
[PMD: Correct error_append_hint() argument]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/core/machine.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/hw/core/machine.c b/hw/core/machine.c
index 0198b54b39..1898d1d1d7 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -1477,15 +1477,16 @@ void machine_run_board_init(MachineState *machine, const char *mem_path, Error *
if (!machine_class->valid_cpu_types[i]) {
/* The user specified CPU is not valid */
- error_report("Invalid CPU type: %s", machine->cpu_type);
- error_printf("The valid types are: %s",
- machine_class->valid_cpu_types[0]);
+ error_setg(errp, "Invalid CPU type: %s", machine->cpu_type);
+ error_append_hint(errp, "The valid types are: %s",
+ machine_class->valid_cpu_types[0]);
for (i = 1; machine_class->valid_cpu_types[i]; i++) {
- error_printf(", %s", machine_class->valid_cpu_types[i]);
+ error_append_hint(errp, ", %s",
+ machine_class->valid_cpu_types[i]);
}
- error_printf("\n");
- exit(1);
+ error_append_hint(errp, "\n");
+ return;
}
}
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 25/71] machine: Introduce helper is_cpu_type_supported()
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (23 preceding siblings ...)
2024-01-05 15:42 ` [PULL 24/71] machine: Use error handling when CPU type is checked Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 26/71] machine: Improve is_cpu_type_supported() Philippe Mathieu-Daudé
` (46 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Gavin Shan,
Philippe Mathieu-Daudé, Eduardo Habkost, Marcel Apfelbaum,
Yanan Wang
From: Gavin Shan <gshan@redhat.com>
The logic, to check if the specified CPU type is supported in
machine_run_board_init(), is independent enough. Factor it out into
helper is_cpu_type_supported(). machine_run_board_init() looks a bit
clean with this. Since we're here, @machine_class is renamed to @mc to
avoid multiple line spanning of code. The comments are tweaked a bit
either.
No functional change intended.
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231204004726.483558-3-gshan@redhat.com>
[PMD: Only call new helper if machine->cpu_type is not NULL]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/core/machine.c | 84 ++++++++++++++++++++++++++---------------------
1 file changed, 46 insertions(+), 38 deletions(-)
diff --git a/hw/core/machine.c b/hw/core/machine.c
index 1898d1d1d7..0119b11fc8 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -1399,12 +1399,53 @@ const char *machine_class_default_cpu_type(MachineClass *mc)
return mc->default_cpu_type;
}
+static bool is_cpu_type_supported(const MachineState *machine, Error **errp)
+{
+ MachineClass *mc = MACHINE_GET_CLASS(machine);
+ ObjectClass *oc = object_class_by_name(machine->cpu_type);
+ CPUClass *cc;
+ int i;
+
+ /*
+ * Check if the user specified CPU type is supported when the valid
+ * CPU types have been determined. Note that the user specified CPU
+ * type is provided through '-cpu' option.
+ */
+ if (mc->valid_cpu_types) {
+ for (i = 0; mc->valid_cpu_types[i]; i++) {
+ if (object_class_dynamic_cast(oc, mc->valid_cpu_types[i])) {
+ break;
+ }
+ }
+
+ /* The user specified CPU type isn't valid */
+ if (!mc->valid_cpu_types[i]) {
+ error_setg(errp, "Invalid CPU type: %s", machine->cpu_type);
+ error_append_hint(errp, "The valid types are: %s",
+ mc->valid_cpu_types[0]);
+ for (i = 1; mc->valid_cpu_types[i]; i++) {
+ error_append_hint(errp, ", %s", mc->valid_cpu_types[i]);
+ }
+
+ error_append_hint(errp, "\n");
+ return false;
+ }
+ }
+
+ /* Check if CPU type is deprecated and warn if so */
+ cc = CPU_CLASS(oc);
+ if (cc && cc->deprecation_note) {
+ warn_report("CPU model %s is deprecated -- %s",
+ machine->cpu_type, cc->deprecation_note);
+ }
+
+ return true;
+}
+
void machine_run_board_init(MachineState *machine, const char *mem_path, Error **errp)
{
ERRP_GUARD();
MachineClass *machine_class = MACHINE_GET_CLASS(machine);
- ObjectClass *oc = object_class_by_name(machine->cpu_type);
- CPUClass *cc;
/* This checkpoint is required by replay to separate prior clock
reading from the other reads, because timer polling functions query
@@ -1459,42 +1500,9 @@ void machine_run_board_init(MachineState *machine, const char *mem_path, Error *
machine->ram = machine_consume_memdev(machine, machine->memdev);
}
- /* If the machine supports the valid_cpu_types check and the user
- * specified a CPU with -cpu check here that the user CPU is supported.
- */
- if (machine_class->valid_cpu_types && machine->cpu_type) {
- int i;
-
- for (i = 0; machine_class->valid_cpu_types[i]; i++) {
- if (object_class_dynamic_cast(oc,
- machine_class->valid_cpu_types[i])) {
- /* The user specified CPU is in the valid field, we are
- * good to go.
- */
- break;
- }
- }
-
- if (!machine_class->valid_cpu_types[i]) {
- /* The user specified CPU is not valid */
- error_setg(errp, "Invalid CPU type: %s", machine->cpu_type);
- error_append_hint(errp, "The valid types are: %s",
- machine_class->valid_cpu_types[0]);
- for (i = 1; machine_class->valid_cpu_types[i]; i++) {
- error_append_hint(errp, ", %s",
- machine_class->valid_cpu_types[i]);
- }
-
- error_append_hint(errp, "\n");
- return;
- }
- }
-
- /* Check if CPU type is deprecated and warn if so */
- cc = CPU_CLASS(oc);
- if (cc && cc->deprecation_note) {
- warn_report("CPU model %s is deprecated -- %s", machine->cpu_type,
- cc->deprecation_note);
+ /* Check if the CPU type is supported */
+ if (machine->cpu_type && !is_cpu_type_supported(machine, errp)) {
+ return;
}
if (machine->cgs) {
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 26/71] machine: Improve is_cpu_type_supported()
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (24 preceding siblings ...)
2024-01-05 15:42 ` [PULL 25/71] machine: Introduce helper is_cpu_type_supported() Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 27/71] machine: Print CPU model name instead of CPU type Philippe Mathieu-Daudé
` (45 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Gavin Shan,
Philippe Mathieu-Daudé, Eduardo Habkost, Marcel Apfelbaum,
Yanan Wang
From: Gavin Shan <gshan@redhat.com>
It's no sense to check the CPU type when mc->valid_cpu_types[0] is
NULL, which is a program error. Raise an assert on this.
A precise hint for the error message is given when mc->valid_cpu_types[0]
is the only valid entry. Besides, enumeration on mc->valid_cpu_types[0]
when we have mutiple valid entries there is avoided to increase the code
readability, as suggested by Philippe Mathieu-Daudé.
Besides, @cc comes from machine->cpu_type or mc->default_cpu_type. For
the later case, it can be NULL and it's also a program error. We should
use assert() in this case.
Signed-off-by: Gavin Shan <gshan@redhat.com>
Message-ID: <20231204004726.483558-4-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/core/machine.c | 20 ++++++++++++++------
1 file changed, 14 insertions(+), 6 deletions(-)
diff --git a/hw/core/machine.c b/hw/core/machine.c
index 0119b11fc8..c523ce32eb 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -1412,6 +1412,7 @@ static bool is_cpu_type_supported(const MachineState *machine, Error **errp)
* type is provided through '-cpu' option.
*/
if (mc->valid_cpu_types) {
+ assert(mc->valid_cpu_types[0] != NULL);
for (i = 0; mc->valid_cpu_types[i]; i++) {
if (object_class_dynamic_cast(oc, mc->valid_cpu_types[i])) {
break;
@@ -1421,20 +1422,27 @@ static bool is_cpu_type_supported(const MachineState *machine, Error **errp)
/* The user specified CPU type isn't valid */
if (!mc->valid_cpu_types[i]) {
error_setg(errp, "Invalid CPU type: %s", machine->cpu_type);
- error_append_hint(errp, "The valid types are: %s",
- mc->valid_cpu_types[0]);
- for (i = 1; mc->valid_cpu_types[i]; i++) {
- error_append_hint(errp, ", %s", mc->valid_cpu_types[i]);
+ if (!mc->valid_cpu_types[1]) {
+ error_append_hint(errp, "The only valid type is: %s\n",
+ mc->valid_cpu_types[0]);
+ } else {
+ error_append_hint(errp, "The valid types are: ");
+ for (i = 0; mc->valid_cpu_types[i]; i++) {
+ error_append_hint(errp, "%s%s",
+ mc->valid_cpu_types[i],
+ mc->valid_cpu_types[i + 1] ? ", " : "");
+ }
+ error_append_hint(errp, "\n");
}
- error_append_hint(errp, "\n");
return false;
}
}
/* Check if CPU type is deprecated and warn if so */
cc = CPU_CLASS(oc);
- if (cc && cc->deprecation_note) {
+ assert(cc != NULL);
+ if (cc->deprecation_note) {
warn_report("CPU model %s is deprecated -- %s",
machine->cpu_type, cc->deprecation_note);
}
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 27/71] machine: Print CPU model name instead of CPU type
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (25 preceding siblings ...)
2024-01-05 15:42 ` [PULL 26/71] machine: Improve is_cpu_type_supported() Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 28/71] hw/arm/virt: Hide host CPU model for tcg Philippe Mathieu-Daudé
` (44 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Gavin Shan,
Philippe Mathieu-Daudé, Eduardo Habkost, Marcel Apfelbaum,
Yanan Wang
From: Gavin Shan <gshan@redhat.com>
The names of supported CPU models instead of CPU types should be
printed when the user specified CPU type isn't supported, to be
consistent with the output from '-cpu ?'.
Correct the error messages to print CPU model names instead of CPU
type names.
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231204004726.483558-5-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/core/machine.c | 14 +++++++++-----
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/hw/core/machine.c b/hw/core/machine.c
index c523ce32eb..fc239101f9 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -1421,15 +1421,19 @@ static bool is_cpu_type_supported(const MachineState *machine, Error **errp)
/* The user specified CPU type isn't valid */
if (!mc->valid_cpu_types[i]) {
- error_setg(errp, "Invalid CPU type: %s", machine->cpu_type);
+ g_autofree char *requested = cpu_model_from_type(machine->cpu_type);
+ error_setg(errp, "Invalid CPU model: %s", requested);
if (!mc->valid_cpu_types[1]) {
- error_append_hint(errp, "The only valid type is: %s\n",
- mc->valid_cpu_types[0]);
+ g_autofree char *model = cpu_model_from_type(
+ mc->valid_cpu_types[0]);
+ error_append_hint(errp, "The only valid type is: %s\n", model);
} else {
- error_append_hint(errp, "The valid types are: ");
+ error_append_hint(errp, "The valid models are: ");
for (i = 0; mc->valid_cpu_types[i]; i++) {
+ g_autofree char *model = cpu_model_from_type(
+ mc->valid_cpu_types[i]);
error_append_hint(errp, "%s%s",
- mc->valid_cpu_types[i],
+ model,
mc->valid_cpu_types[i + 1] ? ", " : "");
}
error_append_hint(errp, "\n");
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 28/71] hw/arm/virt: Hide host CPU model for tcg
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (26 preceding siblings ...)
2024-01-05 15:42 ` [PULL 27/71] machine: Print CPU model name instead of CPU type Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 29/71] hw/arm/virt: Check CPU type in machine_run_board_init() Philippe Mathieu-Daudé
` (43 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Gavin Shan, Richard Henderson,
Philippe Mathieu-Daudé, Peter Maydell
From: Gavin Shan <gshan@redhat.com>
The 'host' CPU model isn't available until KVM or HVF is enabled.
For example, the following error messages are seen when the guest
is started with option '-cpu cortex-a8' on tcg after the next commit
is applied to check the CPU type in machine_run_board_init().
ERROR:../hw/core/machine.c:1423:is_cpu_type_supported: \
assertion failed: (model != NULL)
Bail out! ERROR:../hw/core/machine.c:1423:is_cpu_type_supported: \
assertion failed: (model != NULL)
Aborted (core dumped)
Hide 'host' CPU model until KVM or HVF is enabled. With this applied,
the valid CPU models can be shown.
qemu-system-aarch64: Invalid CPU type: cortex-a8
The valid types are: cortex-a7, cortex-a15, cortex-a35, \
cortex-a55, cortex-a72, cortex-a76, cortex-a710, a64fx, \
neoverse-n1, neoverse-v1, neoverse-n2, cortex-a53, \
cortex-a57, max
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231204004726.483558-6-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/arm/virt.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 8b69aba189..8b060ef1d9 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -220,7 +220,9 @@ static const char *valid_cpus[] = {
#endif
ARM_CPU_TYPE_NAME("cortex-a53"),
ARM_CPU_TYPE_NAME("cortex-a57"),
+#if defined(CONFIG_KVM) || defined(CONFIG_HVF)
ARM_CPU_TYPE_NAME("host"),
+#endif
ARM_CPU_TYPE_NAME("max"),
};
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 29/71] hw/arm/virt: Check CPU type in machine_run_board_init()
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (27 preceding siblings ...)
2024-01-05 15:42 ` [PULL 28/71] hw/arm/virt: Hide host CPU model for tcg Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-09 14:33 ` Peter Maydell
2024-01-05 15:42 ` [PULL 30/71] hw/arm/sbsa-ref: " Philippe Mathieu-Daudé
` (42 subsequent siblings)
71 siblings, 1 reply; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Gavin Shan,
Philippe Mathieu-Daudé, Richard Henderson, Peter Maydell
From: Gavin Shan <gshan@redhat.com>
Set mc->valid_cpu_types so that the user specified CPU type can be
validated in machine_run_board_init(). We needn't to do the check
by ourselves.
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20231204004726.483558-7-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/arm/virt.c | 62 +++++++++++++++++++--------------------------------
1 file changed, 23 insertions(+), 39 deletions(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 8b060ef1d9..2793121cb4 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -204,40 +204,6 @@ static const int a15irqmap[] = {
[VIRT_PLATFORM_BUS] = 112, /* ...to 112 + PLATFORM_BUS_NUM_IRQS -1 */
};
-static const char *valid_cpus[] = {
-#ifdef CONFIG_TCG
- ARM_CPU_TYPE_NAME("cortex-a7"),
- ARM_CPU_TYPE_NAME("cortex-a15"),
- ARM_CPU_TYPE_NAME("cortex-a35"),
- ARM_CPU_TYPE_NAME("cortex-a55"),
- ARM_CPU_TYPE_NAME("cortex-a72"),
- ARM_CPU_TYPE_NAME("cortex-a76"),
- ARM_CPU_TYPE_NAME("cortex-a710"),
- ARM_CPU_TYPE_NAME("a64fx"),
- ARM_CPU_TYPE_NAME("neoverse-n1"),
- ARM_CPU_TYPE_NAME("neoverse-v1"),
- ARM_CPU_TYPE_NAME("neoverse-n2"),
-#endif
- ARM_CPU_TYPE_NAME("cortex-a53"),
- ARM_CPU_TYPE_NAME("cortex-a57"),
-#if defined(CONFIG_KVM) || defined(CONFIG_HVF)
- ARM_CPU_TYPE_NAME("host"),
-#endif
- ARM_CPU_TYPE_NAME("max"),
-};
-
-static bool cpu_type_valid(const char *cpu)
-{
- int i;
-
- for (i = 0; i < ARRAY_SIZE(valid_cpus); i++) {
- if (strcmp(cpu, valid_cpus[i]) == 0) {
- return true;
- }
- }
- return false;
-}
-
static void create_randomness(MachineState *ms, const char *node)
{
struct {
@@ -2042,11 +2008,6 @@ static void machvirt_init(MachineState *machine)
unsigned int smp_cpus = machine->smp.cpus;
unsigned int max_cpus = machine->smp.max_cpus;
- if (!cpu_type_valid(machine->cpu_type)) {
- error_report("mach-virt: CPU type %s not supported", machine->cpu_type);
- exit(1);
- }
-
possible_cpus = mc->possible_cpu_arch_ids(machine);
/*
@@ -2940,6 +2901,28 @@ static void virt_machine_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
+ static const char * const valid_cpu_types[] = {
+#ifdef CONFIG_TCG
+ ARM_CPU_TYPE_NAME("cortex-a7"),
+ ARM_CPU_TYPE_NAME("cortex-a15"),
+ ARM_CPU_TYPE_NAME("cortex-a35"),
+ ARM_CPU_TYPE_NAME("cortex-a55"),
+ ARM_CPU_TYPE_NAME("cortex-a72"),
+ ARM_CPU_TYPE_NAME("cortex-a76"),
+ ARM_CPU_TYPE_NAME("cortex-a710"),
+ ARM_CPU_TYPE_NAME("a64fx"),
+ ARM_CPU_TYPE_NAME("neoverse-n1"),
+ ARM_CPU_TYPE_NAME("neoverse-v1"),
+ ARM_CPU_TYPE_NAME("neoverse-n2"),
+#endif
+ ARM_CPU_TYPE_NAME("cortex-a53"),
+ ARM_CPU_TYPE_NAME("cortex-a57"),
+#if defined(CONFIG_KVM) || defined(CONFIG_HVF)
+ ARM_CPU_TYPE_NAME("host"),
+#endif
+ ARM_CPU_TYPE_NAME("max"),
+ NULL
+ };
mc->init = machvirt_init;
/* Start with max_cpus set to 512, which is the maximum supported by KVM.
@@ -2966,6 +2949,7 @@ static void virt_machine_class_init(ObjectClass *oc, void *data)
#else
mc->default_cpu_type = ARM_CPU_TYPE_NAME("max");
#endif
+ mc->valid_cpu_types = valid_cpu_types;
mc->get_default_cpu_node_id = virt_get_default_cpu_node_id;
mc->kvm_type = virt_kvm_type;
assert(!mc->get_hotplug_handler);
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 30/71] hw/arm/sbsa-ref: Check CPU type in machine_run_board_init()
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (28 preceding siblings ...)
2024-01-05 15:42 ` [PULL 29/71] hw/arm/virt: Check CPU type in machine_run_board_init() Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 31/71] hw/arm: " Philippe Mathieu-Daudé
` (41 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Gavin Shan,
Philippe Mathieu-Daudé, Leif Lindholm, Richard Henderson,
Radoslaw Biernacki, Peter Maydell, Marcin Juszkiewicz
From: Gavin Shan <gshan@redhat.com>
Set mc->valid_cpu_types so that the user specified CPU type can
be validated in machine_run_board_init(). We needn't to do it
by ourselves.
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20231204004726.483558-8-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/arm/sbsa-ref.c | 36 ++++++++++--------------------------
1 file changed, 10 insertions(+), 26 deletions(-)
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index f3c9704693..477dca0637 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -145,27 +145,6 @@ static const int sbsa_ref_irqmap[] = {
[SBSA_GWDT_WS0] = 16,
};
-static const char * const valid_cpus[] = {
- ARM_CPU_TYPE_NAME("cortex-a57"),
- ARM_CPU_TYPE_NAME("cortex-a72"),
- ARM_CPU_TYPE_NAME("neoverse-n1"),
- ARM_CPU_TYPE_NAME("neoverse-v1"),
- ARM_CPU_TYPE_NAME("neoverse-n2"),
- ARM_CPU_TYPE_NAME("max"),
-};
-
-static bool cpu_type_valid(const char *cpu)
-{
- int i;
-
- for (i = 0; i < ARRAY_SIZE(valid_cpus); i++) {
- if (strcmp(cpu, valid_cpus[i]) == 0) {
- return true;
- }
- }
- return false;
-}
-
static uint64_t sbsa_ref_cpu_mp_affinity(SBSAMachineState *sms, int idx)
{
uint8_t clustersz = ARM_DEFAULT_CPUS_PER_CLUSTER;
@@ -733,11 +712,6 @@ static void sbsa_ref_init(MachineState *machine)
const CPUArchIdList *possible_cpus;
int n, sbsa_max_cpus;
- if (!cpu_type_valid(machine->cpu_type)) {
- error_report("sbsa-ref: CPU type %s not supported", machine->cpu_type);
- exit(1);
- }
-
if (kvm_enabled()) {
error_report("sbsa-ref: KVM is not supported for this machine");
exit(1);
@@ -898,10 +872,20 @@ static void sbsa_ref_instance_init(Object *obj)
static void sbsa_ref_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
+ static const char * const valid_cpu_types[] = {
+ ARM_CPU_TYPE_NAME("cortex-a57"),
+ ARM_CPU_TYPE_NAME("cortex-a72"),
+ ARM_CPU_TYPE_NAME("neoverse-n1"),
+ ARM_CPU_TYPE_NAME("neoverse-v1"),
+ ARM_CPU_TYPE_NAME("neoverse-n2"),
+ ARM_CPU_TYPE_NAME("max"),
+ NULL,
+ };
mc->init = sbsa_ref_init;
mc->desc = "QEMU 'SBSA Reference' ARM Virtual Machine";
mc->default_cpu_type = ARM_CPU_TYPE_NAME("neoverse-n1");
+ mc->valid_cpu_types = valid_cpu_types;
mc->max_cpus = 512;
mc->pci_allow_0_address = true;
mc->minimum_page_bits = 12;
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 31/71] hw/arm: Check CPU type in machine_run_board_init()
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (29 preceding siblings ...)
2024-01-05 15:42 ` [PULL 30/71] hw/arm/sbsa-ref: " Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 32/71] hw/riscv/shakti_c: " Philippe Mathieu-Daudé
` (40 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Gavin Shan, Richard Henderson,
Philippe Mathieu-Daudé, Peter Maydell, Beniamino Galvani,
Strahinja Jankovic, Subbaraya Sundeep, Tyrone Ting, Hao Wu,
Niek Linnenbank
From: Gavin Shan <gshan@redhat.com>
Set mc->valid_cpu_types so that the user specified CPU type can
be validated in machine_run_board_init(). We needn't to do it by
ourselves.
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231204004726.483558-9-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/arm/bananapi_m2u.c | 12 ++++++------
hw/arm/cubieboard.c | 12 ++++++------
hw/arm/mps2-tz.c | 26 ++++++++++++++++++++------
hw/arm/mps2.c | 26 ++++++++++++++++++++------
hw/arm/msf2-som.c | 12 ++++++------
hw/arm/musca.c | 12 +++++-------
hw/arm/npcm7xx_boards.c | 12 +++++-------
hw/arm/orangepi.c | 12 ++++++------
8 files changed, 74 insertions(+), 50 deletions(-)
diff --git a/hw/arm/bananapi_m2u.c b/hw/arm/bananapi_m2u.c
index 8f24b18d8c..0a4b6f29b1 100644
--- a/hw/arm/bananapi_m2u.c
+++ b/hw/arm/bananapi_m2u.c
@@ -71,12 +71,6 @@ static void bpim2u_init(MachineState *machine)
exit(1);
}
- /* Only allow Cortex-A7 for this board */
- if (strcmp(machine->cpu_type, ARM_CPU_TYPE_NAME("cortex-a7")) != 0) {
- error_report("This board can only be used with cortex-a7 CPU");
- exit(1);
- }
-
r40 = AW_R40(object_new(TYPE_AW_R40));
object_property_add_child(OBJECT(machine), "soc", OBJECT(r40));
object_unref(OBJECT(r40));
@@ -133,12 +127,18 @@ static void bpim2u_init(MachineState *machine)
static void bpim2u_machine_init(MachineClass *mc)
{
+ static const char * const valid_cpu_types[] = {
+ ARM_CPU_TYPE_NAME("cortex-a7"),
+ NULL
+ };
+
mc->desc = "Bananapi M2U (Cortex-A7)";
mc->init = bpim2u_init;
mc->min_cpus = AW_R40_NUM_CPUS;
mc->max_cpus = AW_R40_NUM_CPUS;
mc->default_cpus = AW_R40_NUM_CPUS;
mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a7");
+ mc->valid_cpu_types = valid_cpu_types;
mc->default_ram_size = 1 * GiB;
mc->default_ram_id = "bpim2u.ram";
}
diff --git a/hw/arm/cubieboard.c b/hw/arm/cubieboard.c
index 29146f5018..b976727eef 100644
--- a/hw/arm/cubieboard.c
+++ b/hw/arm/cubieboard.c
@@ -52,12 +52,6 @@ static void cubieboard_init(MachineState *machine)
exit(1);
}
- /* Only allow Cortex-A8 for this board */
- if (strcmp(machine->cpu_type, ARM_CPU_TYPE_NAME("cortex-a8")) != 0) {
- error_report("This board can only be used with cortex-a8 CPU");
- exit(1);
- }
-
a10 = AW_A10(object_new(TYPE_AW_A10));
object_property_add_child(OBJECT(machine), "soc", OBJECT(a10));
object_unref(OBJECT(a10));
@@ -114,8 +108,14 @@ static void cubieboard_init(MachineState *machine)
static void cubieboard_machine_init(MachineClass *mc)
{
+ static const char * const valid_cpu_types[] = {
+ ARM_CPU_TYPE_NAME("cortex-a8"),
+ NULL
+ };
+
mc->desc = "cubietech cubieboard (Cortex-A8)";
mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a8");
+ mc->valid_cpu_types = valid_cpu_types;
mc->default_ram_size = 1 * GiB;
mc->init = cubieboard_init;
mc->block_default_type = IF_IDE;
diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
index 668db5ed61..5d8cdc1a4c 100644
--- a/hw/arm/mps2-tz.c
+++ b/hw/arm/mps2-tz.c
@@ -813,12 +813,6 @@ static void mps2tz_common_init(MachineState *machine)
int num_ppcs;
int i;
- if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) {
- error_report("This board can only be used with CPU %s",
- mc->default_cpu_type);
- exit(1);
- }
-
if (machine->ram_size != mc->default_ram_size) {
char *sz = size_to_str(mc->default_ram_size);
error_report("Invalid RAM size, should be %s", sz);
@@ -1318,6 +1312,10 @@ static void mps2tz_an505_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_CLASS(oc);
+ static const char * const valid_cpu_types[] = {
+ ARM_CPU_TYPE_NAME("cortex-m33"),
+ NULL
+ };
mc->desc = "ARM MPS2 with AN505 FPGA image for Cortex-M33";
mc->default_cpus = 1;
@@ -1325,6 +1323,7 @@ static void mps2tz_an505_class_init(ObjectClass *oc, void *data)
mc->max_cpus = mc->default_cpus;
mmc->fpga_type = FPGA_AN505;
mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m33");
+ mc->valid_cpu_types = valid_cpu_types;
mmc->scc_id = 0x41045050;
mmc->sysclk_frq = 20 * 1000 * 1000; /* 20MHz */
mmc->apb_periph_frq = mmc->sysclk_frq;
@@ -1347,6 +1346,10 @@ static void mps2tz_an521_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_CLASS(oc);
+ static const char * const valid_cpu_types[] = {
+ ARM_CPU_TYPE_NAME("cortex-m33"),
+ NULL
+ };
mc->desc = "ARM MPS2 with AN521 FPGA image for dual Cortex-M33";
mc->default_cpus = 2;
@@ -1354,6 +1357,7 @@ static void mps2tz_an521_class_init(ObjectClass *oc, void *data)
mc->max_cpus = mc->default_cpus;
mmc->fpga_type = FPGA_AN521;
mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m33");
+ mc->valid_cpu_types = valid_cpu_types;
mmc->scc_id = 0x41045210;
mmc->sysclk_frq = 20 * 1000 * 1000; /* 20MHz */
mmc->apb_periph_frq = mmc->sysclk_frq;
@@ -1376,6 +1380,10 @@ static void mps3tz_an524_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_CLASS(oc);
+ static const char * const valid_cpu_types[] = {
+ ARM_CPU_TYPE_NAME("cortex-m33"),
+ NULL
+ };
mc->desc = "ARM MPS3 with AN524 FPGA image for dual Cortex-M33";
mc->default_cpus = 2;
@@ -1383,6 +1391,7 @@ static void mps3tz_an524_class_init(ObjectClass *oc, void *data)
mc->max_cpus = mc->default_cpus;
mmc->fpga_type = FPGA_AN524;
mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m33");
+ mc->valid_cpu_types = valid_cpu_types;
mmc->scc_id = 0x41045240;
mmc->sysclk_frq = 32 * 1000 * 1000; /* 32MHz */
mmc->apb_periph_frq = mmc->sysclk_frq;
@@ -1410,6 +1419,10 @@ static void mps3tz_an547_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_CLASS(oc);
+ static const char * const valid_cpu_types[] = {
+ ARM_CPU_TYPE_NAME("cortex-m55"),
+ NULL
+ };
mc->desc = "ARM MPS3 with AN547 FPGA image for Cortex-M55";
mc->default_cpus = 1;
@@ -1417,6 +1430,7 @@ static void mps3tz_an547_class_init(ObjectClass *oc, void *data)
mc->max_cpus = mc->default_cpus;
mmc->fpga_type = FPGA_AN547;
mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m55");
+ mc->valid_cpu_types = valid_cpu_types;
mmc->scc_id = 0x41055470;
mmc->sysclk_frq = 32 * 1000 * 1000; /* 32MHz */
mmc->apb_periph_frq = 25 * 1000 * 1000; /* 25MHz */
diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c
index 292a180ad2..bd873cc5de 100644
--- a/hw/arm/mps2.c
+++ b/hw/arm/mps2.c
@@ -142,12 +142,6 @@ static void mps2_common_init(MachineState *machine)
QList *oscclk;
int i;
- if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) {
- error_report("This board can only be used with CPU %s",
- mc->default_cpu_type);
- exit(1);
- }
-
if (machine->ram_size != mc->default_ram_size) {
char *sz = size_to_str(mc->default_ram_size);
error_report("Invalid RAM size, should be %s", sz);
@@ -484,10 +478,15 @@ static void mps2_an385_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
MPS2MachineClass *mmc = MPS2_MACHINE_CLASS(oc);
+ static const char * const valid_cpu_types[] = {
+ ARM_CPU_TYPE_NAME("cortex-m3"),
+ NULL
+ };
mc->desc = "ARM MPS2 with AN385 FPGA image for Cortex-M3";
mmc->fpga_type = FPGA_AN385;
mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m3");
+ mc->valid_cpu_types = valid_cpu_types;
mmc->scc_id = 0x41043850;
mmc->psram_base = 0x21000000;
mmc->ethernet_base = 0x40200000;
@@ -498,10 +497,15 @@ static void mps2_an386_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
MPS2MachineClass *mmc = MPS2_MACHINE_CLASS(oc);
+ static const char * const valid_cpu_types[] = {
+ ARM_CPU_TYPE_NAME("cortex-m4"),
+ NULL
+ };
mc->desc = "ARM MPS2 with AN386 FPGA image for Cortex-M4";
mmc->fpga_type = FPGA_AN386;
mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m4");
+ mc->valid_cpu_types = valid_cpu_types;
mmc->scc_id = 0x41043860;
mmc->psram_base = 0x21000000;
mmc->ethernet_base = 0x40200000;
@@ -512,10 +516,15 @@ static void mps2_an500_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
MPS2MachineClass *mmc = MPS2_MACHINE_CLASS(oc);
+ static const char * const valid_cpu_types[] = {
+ ARM_CPU_TYPE_NAME("cortex-m7"),
+ NULL
+ };
mc->desc = "ARM MPS2 with AN500 FPGA image for Cortex-M7";
mmc->fpga_type = FPGA_AN500;
mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m7");
+ mc->valid_cpu_types = valid_cpu_types;
mmc->scc_id = 0x41045000;
mmc->psram_base = 0x60000000;
mmc->ethernet_base = 0xa0000000;
@@ -526,10 +535,15 @@ static void mps2_an511_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
MPS2MachineClass *mmc = MPS2_MACHINE_CLASS(oc);
+ static const char * const valid_cpu_types[] = {
+ ARM_CPU_TYPE_NAME("cortex-m3"),
+ NULL
+ };
mc->desc = "ARM MPS2 with AN511 DesignStart FPGA image for Cortex-M3";
mmc->fpga_type = FPGA_AN511;
mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m3");
+ mc->valid_cpu_types = valid_cpu_types;
mmc->scc_id = 0x41045110;
mmc->psram_base = 0x21000000;
mmc->ethernet_base = 0x40200000;
diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c
index 7b3106c790..eb74b23797 100644
--- a/hw/arm/msf2-som.c
+++ b/hw/arm/msf2-som.c
@@ -55,12 +55,6 @@ static void emcraft_sf2_s2s010_init(MachineState *machine)
MemoryRegion *ddr = g_new(MemoryRegion, 1);
Clock *m3clk;
- if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) {
- error_report("This board can only be used with CPU %s",
- mc->default_cpu_type);
- exit(1);
- }
-
memory_region_init_ram(ddr, NULL, "ddr-ram", DDR_SIZE,
&error_fatal);
memory_region_add_subregion(sysmem, DDR_BASE_ADDRESS, ddr);
@@ -106,9 +100,15 @@ static void emcraft_sf2_s2s010_init(MachineState *machine)
static void emcraft_sf2_machine_init(MachineClass *mc)
{
+ static const char * const valid_cpu_types[] = {
+ ARM_CPU_TYPE_NAME("cortex-m3"),
+ NULL
+ };
+
mc->desc = "SmartFusion2 SOM kit from Emcraft (M2S010)";
mc->init = emcraft_sf2_s2s010_init;
mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m3");
+ mc->valid_cpu_types = valid_cpu_types;
}
DEFINE_MACHINE("emcraft-sf2", emcraft_sf2_machine_init)
diff --git a/hw/arm/musca.c b/hw/arm/musca.c
index 6eeee57c9d..770ec1a15c 100644
--- a/hw/arm/musca.c
+++ b/hw/arm/musca.c
@@ -355,7 +355,6 @@ static void musca_init(MachineState *machine)
{
MuscaMachineState *mms = MUSCA_MACHINE(machine);
MuscaMachineClass *mmc = MUSCA_MACHINE_GET_CLASS(mms);
- MachineClass *mc = MACHINE_GET_CLASS(machine);
MemoryRegion *system_memory = get_system_memory();
DeviceState *ssedev;
DeviceState *dev_splitter;
@@ -366,12 +365,6 @@ static void musca_init(MachineState *machine)
assert(mmc->num_irqs <= MUSCA_NUMIRQ_MAX);
assert(mmc->num_mpcs <= MUSCA_MPC_MAX);
- if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) {
- error_report("This board can only be used with CPU %s",
- mc->default_cpu_type);
- exit(1);
- }
-
mms->sysclk = clock_new(OBJECT(machine), "SYSCLK");
clock_set_hz(mms->sysclk, SYSCLK_FRQ);
mms->s32kclk = clock_new(OBJECT(machine), "S32KCLK");
@@ -604,11 +597,16 @@ static void musca_init(MachineState *machine)
static void musca_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
+ static const char * const valid_cpu_types[] = {
+ ARM_CPU_TYPE_NAME("cortex-m33"),
+ NULL
+ };
mc->default_cpus = 2;
mc->min_cpus = mc->default_cpus;
mc->max_cpus = mc->default_cpus;
mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m33");
+ mc->valid_cpu_types = valid_cpu_types;
mc->init = musca_init;
}
diff --git a/hw/arm/npcm7xx_boards.c b/hw/arm/npcm7xx_boards.c
index 2aef579aac..2999b8b96d 100644
--- a/hw/arm/npcm7xx_boards.c
+++ b/hw/arm/npcm7xx_boards.c
@@ -121,15 +121,8 @@ static NPCM7xxState *npcm7xx_create_soc(MachineState *machine,
uint32_t hw_straps)
{
NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_GET_CLASS(machine);
- MachineClass *mc = MACHINE_CLASS(nmc);
Object *obj;
- if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) {
- error_report("This board can only be used with %s",
- mc->default_cpu_type);
- exit(1);
- }
-
obj = object_new_with_props(nmc->soc_type, OBJECT(machine), "soc",
&error_abort, NULL);
object_property_set_uint(obj, "power-on-straps", hw_straps, &error_abort);
@@ -463,12 +456,17 @@ static void npcm7xx_set_soc_type(NPCM7xxMachineClass *nmc, const char *type)
static void npcm7xx_machine_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
+ static const char * const valid_cpu_types[] = {
+ ARM_CPU_TYPE_NAME("cortex-a9"),
+ NULL
+ };
mc->no_floppy = 1;
mc->no_cdrom = 1;
mc->no_parallel = 1;
mc->default_ram_id = "ram";
mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a9");
+ mc->valid_cpu_types = valid_cpu_types;
}
/*
diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c
index f3784d45ca..77e328191d 100644
--- a/hw/arm/orangepi.c
+++ b/hw/arm/orangepi.c
@@ -49,12 +49,6 @@ static void orangepi_init(MachineState *machine)
exit(1);
}
- /* Only allow Cortex-A7 for this board */
- if (strcmp(machine->cpu_type, ARM_CPU_TYPE_NAME("cortex-a7")) != 0) {
- error_report("This board can only be used with cortex-a7 CPU");
- exit(1);
- }
-
h3 = AW_H3(object_new(TYPE_AW_H3));
object_property_add_child(OBJECT(machine), "soc", OBJECT(h3));
object_unref(OBJECT(h3));
@@ -111,6 +105,11 @@ static void orangepi_init(MachineState *machine)
static void orangepi_machine_init(MachineClass *mc)
{
+ static const char * const valid_cpu_types[] = {
+ ARM_CPU_TYPE_NAME("cortex-a7"),
+ NULL
+ };
+
mc->desc = "Orange Pi PC (Cortex-A7)";
mc->init = orangepi_init;
mc->block_default_type = IF_SD;
@@ -119,6 +118,7 @@ static void orangepi_machine_init(MachineClass *mc)
mc->max_cpus = AW_H3_NUM_CPUS;
mc->default_cpus = AW_H3_NUM_CPUS;
mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a7");
+ mc->valid_cpu_types = valid_cpu_types;
mc->default_ram_size = 1 * GiB;
mc->default_ram_id = "orangepi.ram";
}
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 32/71] hw/riscv/shakti_c: Check CPU type in machine_run_board_init()
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (30 preceding siblings ...)
2024-01-05 15:42 ` [PULL 31/71] hw/arm: " Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 33/71] hw/core/cpu: Remove final vestiges of dynamic state tracing Philippe Mathieu-Daudé
` (39 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Gavin Shan,
Philippe Mathieu-Daudé, Vijai Kumar K, Palmer Dabbelt,
Alistair Francis, Bin Meng, Weiwei Li, Daniel Henrique Barboza,
Liu Zhiwei
From: Gavin Shan <gshan@redhat.com>
Set mc->valid_cpu_types so that the user specified CPU type can
be validated in machine_run_board_init(). We needn't to do it
by ourselves.
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231204004726.483558-10-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/riscv/shakti_c.c | 13 ++++++-------
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/hw/riscv/shakti_c.c b/hw/riscv/shakti_c.c
index 12ea74b032..3888034c2b 100644
--- a/hw/riscv/shakti_c.c
+++ b/hw/riscv/shakti_c.c
@@ -28,7 +28,6 @@
#include "exec/address-spaces.h"
#include "hw/riscv/boot.h"
-
static const struct MemmapEntry {
hwaddr base;
hwaddr size;
@@ -47,12 +46,6 @@ static void shakti_c_machine_state_init(MachineState *mstate)
ShaktiCMachineState *sms = RISCV_SHAKTI_MACHINE(mstate);
MemoryRegion *system_memory = get_system_memory();
- /* Allow only Shakti C CPU for this platform */
- if (strcmp(mstate->cpu_type, TYPE_RISCV_CPU_SHAKTI_C) != 0) {
- error_report("This board can only be used with Shakti C CPU");
- exit(1);
- }
-
/* Initialize SoC */
object_initialize_child(OBJECT(mstate), "soc", &sms->soc,
TYPE_RISCV_SHAKTI_SOC);
@@ -82,9 +75,15 @@ static void shakti_c_machine_instance_init(Object *obj)
static void shakti_c_machine_class_init(ObjectClass *klass, void *data)
{
MachineClass *mc = MACHINE_CLASS(klass);
+ static const char * const valid_cpu_types[] = {
+ RISCV_CPU_TYPE_NAME("shakti-c"),
+ NULL
+ };
+
mc->desc = "RISC-V Board compatible with Shakti SDK";
mc->init = shakti_c_machine_state_init;
mc->default_cpu_type = TYPE_RISCV_CPU_SHAKTI_C;
+ mc->valid_cpu_types = valid_cpu_types;
mc->default_ram_id = "riscv.shakti.c.ram";
}
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 33/71] hw/core/cpu: Remove final vestiges of dynamic state tracing
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (31 preceding siblings ...)
2024-01-05 15:42 ` [PULL 32/71] hw/riscv/shakti_c: " Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 34/71] hw/core/cpu: Update description of CPUState::node Philippe Mathieu-Daudé
` (38 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Richard Henderson, Eduardo Habkost, Marcel Apfelbaum, Yanan Wang
The dynamic state tracing was removed in commit d0aaf08bb9.
Fixes: d0aaf08bb9 ("tcg: remove the final vestiges of dstate")
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231129182734.15565-1-philmd@linaro.org>
---
include/hw/core/cpu.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index 76ef59de0a..44ff954207 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -437,9 +437,6 @@ struct qemu_work_item;
* @kvm_fd: vCPU file descriptor for KVM.
* @work_mutex: Lock to prevent multiple access to @work_list.
* @work_list: List of pending asynchronous work.
- * @trace_dstate_delayed: Delayed changes to trace_dstate (includes all changes
- * to @trace_dstate).
- * @trace_dstate: Dynamic tracing state of events for this vCPU (bitmask).
* @plugin_mask: Plugin event bitmap. Modified only via async work.
* @ignore_memory_transaction_failures: Cached copy of the MachineState
* flag of the same name: allows the board to suppress calling of the
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 34/71] hw/core/cpu: Update description of CPUState::node
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (32 preceding siblings ...)
2024-01-05 15:42 ` [PULL 33/71] hw/core/cpu: Remove final vestiges of dynamic state tracing Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 35/71] hw/cpu/core: Cleanup unused included header in core.c Philippe Mathieu-Daudé
` (37 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Richard Henderson, Eduardo Habkost, Marcel Apfelbaum, Yanan Wang
'next_cpu' was converted to 'node' in commit bdc44640cb
("cpu: Use QTAILQ for CPU list").
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231129183243.15859-1-philmd@linaro.org>
---
include/hw/core/cpu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index 44ff954207..238c02c05e 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -430,7 +430,7 @@ struct qemu_work_item;
* @gdb_regs: Additional GDB registers.
* @gdb_num_regs: Number of total registers accessible to GDB.
* @gdb_num_g_regs: Number of registers in GDB 'g' packets.
- * @next_cpu: Next CPU sharing TB cache.
+ * @node: QTAILQ of CPUs sharing TB cache.
* @opaque: User data.
* @mem_io_pc: Host Program Counter at which the memory was accessed.
* @accel: Pointer to accelerator specific state.
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 35/71] hw/cpu/core: Cleanup unused included header in core.c
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (33 preceding siblings ...)
2024-01-05 15:42 ` [PULL 34/71] hw/core/cpu: Update description of CPUState::node Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 36/71] hw/cpu/cluster: Cleanup unused included header in cluster.c Philippe Mathieu-Daudé
` (36 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Zhao Liu,
Philippe Mathieu-Daudé
From: Zhao Liu <zhao1.liu@intel.com>
Remove unused header (qemu/module.h and sysemu/cpus.h) in core.c,
and reorder the remaining header files (except qemu/osdep.h) in
alphabetical order.
Tested by "./configure" and then "make".
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231127145611.925817-2-zhao1.liu@linux.intel.com>
---
hw/cpu/core.c | 9 ++++-----
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/hw/cpu/core.c b/hw/cpu/core.c
index 9876075155..495a5c30ff 100644
--- a/hw/cpu/core.c
+++ b/hw/cpu/core.c
@@ -8,12 +8,11 @@
*/
#include "qemu/osdep.h"
-#include "hw/cpu/core.h"
-#include "qapi/visitor.h"
-#include "qemu/module.h"
-#include "qapi/error.h"
-#include "sysemu/cpus.h"
+
#include "hw/boards.h"
+#include "hw/cpu/core.h"
+#include "qapi/error.h"
+#include "qapi/visitor.h"
static void core_prop_get_core_id(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 36/71] hw/cpu/cluster: Cleanup unused included header in cluster.c
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (34 preceding siblings ...)
2024-01-05 15:42 ` [PULL 35/71] hw/cpu/core: Cleanup unused included header in core.c Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 37/71] hw/audio/sb16: Do not migrate qdev properties Philippe Mathieu-Daudé
` (35 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Zhao Liu,
Philippe Mathieu-Daudé, Eduardo Habkost, Marcel Apfelbaum,
Yanan Wang
From: Zhao Liu <zhao1.liu@intel.com>
Remove unused header (qemu/module.h and qemu/cutils.h) in cluster.c,
and reorder the remaining header files (except qemu/osdep.h) in
alphabetical order.
Tested by "./configure" and then "make".
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231127145611.925817-3-zhao1.liu@linux.intel.com>
---
hw/cpu/cluster.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/hw/cpu/cluster.c b/hw/cpu/cluster.c
index e444b7c29d..61289a840d 100644
--- a/hw/cpu/cluster.c
+++ b/hw/cpu/cluster.c
@@ -19,12 +19,11 @@
*/
#include "qemu/osdep.h"
+
+#include "hw/core/cpu.h"
#include "hw/cpu/cluster.h"
#include "hw/qdev-properties.h"
-#include "hw/core/cpu.h"
#include "qapi/error.h"
-#include "qemu/module.h"
-#include "qemu/cutils.h"
static Property cpu_cluster_properties[] = {
DEFINE_PROP_UINT32("cluster-id", CPUClusterState, cluster_id, 0),
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 37/71] hw/audio/sb16: Do not migrate qdev properties
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (35 preceding siblings ...)
2024-01-05 15:42 ` [PULL 36/71] hw/cpu/cluster: Cleanup unused included header in cluster.c Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 38/71] hw/arm/bcm2836: Simplify use of 'reset-cbar' property Philippe Mathieu-Daudé
` (34 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Fabiano Rosas, Gerd Hoffmann
Since commit f7b4f61f63 ("qdev/isa: convert soundblaster") these
fields have been converted to qdev properties, so don't need to
be migrated:
static Property sb16_properties[] = {
DEFINE_AUDIO_PROPERTIES(SB16State, card),
DEFINE_PROP_UINT32 ("version", SB16State, ver, 0x0405), /* 4.5 */
DEFINE_PROP_UINT32 ("iobase", SB16State, port, 0x220),
DEFINE_PROP_UINT32 ("irq", SB16State, irq, 5),
DEFINE_PROP_UINT32 ("dma", SB16State, dma, 1),
DEFINE_PROP_UINT32 ("dma16", SB16State, hdma, 5),
DEFINE_PROP_END_OF_LIST (),
};
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Message-Id: <20231124182615.94943-1-philmd@linaro.org>
---
hw/audio/sb16.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/hw/audio/sb16.c b/hw/audio/sb16.c
index bf7f35a42b..fd76e78d18 100644
--- a/hw/audio/sb16.c
+++ b/hw/audio/sb16.c
@@ -1325,11 +1325,11 @@ static const VMStateDescription vmstate_sb16 = {
.minimum_version_id = 1,
.post_load = sb16_post_load,
.fields = (const VMStateField[]) {
- VMSTATE_UINT32 (irq, SB16State),
- VMSTATE_UINT32 (dma, SB16State),
- VMSTATE_UINT32 (hdma, SB16State),
- VMSTATE_UINT32 (port, SB16State),
- VMSTATE_UINT32 (ver, SB16State),
+ VMSTATE_UNUSED( 4 /* irq */
+ + 4 /* dma */
+ + 4 /* hdma */
+ + 4 /* port */
+ + 4 /* ver */),
VMSTATE_INT32 (in_index, SB16State),
VMSTATE_INT32 (out_data_len, SB16State),
VMSTATE_INT32 (fmt_stereo, SB16State),
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 38/71] hw/arm/bcm2836: Simplify use of 'reset-cbar' property
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (36 preceding siblings ...)
2024-01-05 15:42 ` [PULL 37/71] hw/audio/sb16: Do not migrate qdev properties Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 39/71] hw/arm/bcm2836: Use ARM_CPU 'mp-affinity' property Philippe Mathieu-Daudé
` (33 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Richard Henderson, Peter Maydell
bcm2836_realize() is called by
- bcm2836_class_init() which sets:
bc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a7")
- bcm2837_class_init() which sets:
bc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a53")
Both Cortex-A7 / A53 have the ARM_FEATURE_CBAR set. If it isn't,
then this is a programming error: use &error_abort.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20231123143813.42632-3-philmd@linaro.org>
---
hw/arm/bcm2836.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
index 166dc896c0..a1bd1406e1 100644
--- a/hw/arm/bcm2836.c
+++ b/hw/arm/bcm2836.c
@@ -131,10 +131,8 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
s->cpu[n].core.mp_affinity = (bc->clusterid << 8) | n;
/* set periphbase/CBAR value for CPU-local registers */
- if (!object_property_set_int(OBJECT(&s->cpu[n].core), "reset-cbar",
- bc->peri_base, errp)) {
- return;
- }
+ object_property_set_int(OBJECT(&s->cpu[n].core), "reset-cbar",
+ bc->peri_base, &error_abort);
/* start powered off if not enabled */
if (!object_property_set_bool(OBJECT(&s->cpu[n].core),
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 39/71] hw/arm/bcm2836: Use ARM_CPU 'mp-affinity' property
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (37 preceding siblings ...)
2024-01-05 15:42 ` [PULL 38/71] hw/arm/bcm2836: Simplify use of 'reset-cbar' property Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 40/71] hw/ppc/spapr_cpu_core: Access QDev properties with proper API Philippe Mathieu-Daudé
` (32 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Richard Henderson, Peter Maydell
The 'mp-affinity' property is present since commit 15a21fe028
("target-arm: Add mp-affinity property for ARM CPU class").
Use it and remove a /* TODO */ comment. Since all ARM CPUs
have this property, use &error_abort, because this call can
not fail.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20231123143813.42632-4-philmd@linaro.org>
---
hw/arm/bcm2836.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
index a1bd1406e1..289c30e6b6 100644
--- a/hw/arm/bcm2836.c
+++ b/hw/arm/bcm2836.c
@@ -127,8 +127,8 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-fiq", 0));
for (n = 0; n < BCM283X_NCPUS; n++) {
- /* TODO: this should be converted to a property of ARM_CPU */
- s->cpu[n].core.mp_affinity = (bc->clusterid << 8) | n;
+ object_property_set_int(OBJECT(&s->cpu[n].core), "mp-affinity",
+ (bc->clusterid << 8) | n, &error_abort);
/* set periphbase/CBAR value for CPU-local registers */
object_property_set_int(OBJECT(&s->cpu[n].core), "reset-cbar",
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 40/71] hw/ppc/spapr_cpu_core: Access QDev properties with proper API
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (38 preceding siblings ...)
2024-01-05 15:42 ` [PULL 39/71] hw/arm/bcm2836: Use ARM_CPU 'mp-affinity' property Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 41/71] hw: Simplify accesses to the CPUState::'start-powered-off' property Philippe Mathieu-Daudé
` (31 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Harsh Prateek Bora, Nicholas Piggin, Daniel Henrique Barboza,
Cédric Le Goater, David Gibson
CPUState::start_powered_off field is part of the internal
implementation of a QDev CPU. It is exposed as the QDev
"start-powered-off" property. External components should
use the qdev properties API to access it.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Message-Id: <20231123143813.42632-2-philmd@linaro.org>
---
hw/ppc/spapr_cpu_core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
index 710078e9f7..5aa1ed474a 100644
--- a/hw/ppc/spapr_cpu_core.c
+++ b/hw/ppc/spapr_cpu_core.c
@@ -306,7 +306,7 @@ static PowerPCCPU *spapr_create_vcpu(SpaprCpuCore *sc, int i, Error **errp)
* All CPUs start halted. CPU0 is unhalted from the machine level reset code
* and the rest are explicitly started up by the guest using an RTAS call.
*/
- cs->start_powered_off = true;
+ qdev_prop_set_bit(DEVICE(obj), "start-powered-off", true);
cs->cpu_index = cc->core_id + i;
if (!spapr_set_vcpu_id(cpu, cs->cpu_index, errp)) {
return NULL;
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 41/71] hw: Simplify accesses to the CPUState::'start-powered-off' property
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (39 preceding siblings ...)
2024-01-05 15:42 ` [PULL 40/71] hw/ppc/spapr_cpu_core: Access QDev properties with proper API Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 42/71] hw/ppc/xive2_regs: Remove unnecessary 'cpu.h' inclusion Philippe Mathieu-Daudé
` (30 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Richard Henderson, Peter Maydell, Mark Cave-Ayland,
Artyom Tarasenko
The 'start-powered-off' property has been added to ARM CPUs in
commit 5de164304a ("arm: Allow secondary KVM CPUs to be booted
via PSCI"), then eventually got generalized to all CPUs in commit
c1b701587e ("target/arm: Move start-powered-off property to generic
CPUState"). Since all CPUs have it, no need to check whether it is
available. Updating this property can't fail, so use &error_abort.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20231123143813.42632-5-philmd@linaro.org>
---
hw/arm/armsse.c | 6 ++----
hw/arm/armv7m.c | 8 ++------
hw/arm/bcm2836.c | 8 ++------
hw/mips/cps.c | 7 +++----
hw/ppc/e500.c | 2 +-
hw/sparc/sun4m.c | 2 +-
6 files changed, 11 insertions(+), 22 deletions(-)
diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c
index 02b4f6596f..91502d157a 100644
--- a/hw/arm/armsse.c
+++ b/hw/arm/armsse.c
@@ -1022,10 +1022,8 @@ static void armsse_realize(DeviceState *dev, Error **errp)
* later if necessary.
*/
if (extract32(info->cpuwait_rst, i, 1)) {
- if (!object_property_set_bool(cpuobj, "start-powered-off", true,
- errp)) {
- return;
- }
+ object_property_set_bool(cpuobj, "start-powered-off", true,
+ &error_abort);
}
if (!s->cpu_fpu[i]) {
if (!object_property_set_bool(cpuobj, "vfp", false, errp)) {
diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c
index 375a40962f..e39b61bc1a 100644
--- a/hw/arm/armv7m.c
+++ b/hw/arm/armv7m.c
@@ -318,12 +318,6 @@ static void armv7m_realize(DeviceState *dev, Error **errp)
return;
}
}
- if (object_property_find(OBJECT(s->cpu), "start-powered-off")) {
- if (!object_property_set_bool(OBJECT(s->cpu), "start-powered-off",
- s->start_powered_off, errp)) {
- return;
- }
- }
if (object_property_find(OBJECT(s->cpu), "vfp")) {
if (!object_property_set_bool(OBJECT(s->cpu), "vfp", s->vfp, errp)) {
return;
@@ -334,6 +328,8 @@ static void armv7m_realize(DeviceState *dev, Error **errp)
return;
}
}
+ object_property_set_bool(OBJECT(s->cpu), "start-powered-off",
+ s->start_powered_off, &error_abort);
/*
* Real M-profile hardware can be configured with a different number of
diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
index 289c30e6b6..b0674a22a6 100644
--- a/hw/arm/bcm2836.c
+++ b/hw/arm/bcm2836.c
@@ -135,12 +135,8 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
bc->peri_base, &error_abort);
/* start powered off if not enabled */
- if (!object_property_set_bool(OBJECT(&s->cpu[n].core),
- "start-powered-off",
- n >= s->enabled_cpus,
- errp)) {
- return;
- }
+ object_property_set_bool(OBJECT(&s->cpu[n].core), "start-powered-off",
+ n >= s->enabled_cpus, &error_abort);
if (!qdev_realize(DEVICE(&s->cpu[n].core), NULL, errp)) {
return;
diff --git a/hw/mips/cps.c b/hw/mips/cps.c
index b6612c1762..4f12e23ab5 100644
--- a/hw/mips/cps.c
+++ b/hw/mips/cps.c
@@ -78,10 +78,9 @@ static void mips_cps_realize(DeviceState *dev, Error **errp)
CPUMIPSState *env = &cpu->env;
/* All VPs are halted on reset. Leave powering up to CPC. */
- if (!object_property_set_bool(OBJECT(cpu), "start-powered-off", true,
- errp)) {
- return;
- }
+ object_property_set_bool(OBJECT(cpu), "start-powered-off", true,
+ &error_abort);
+
/* All cores use the same clock tree */
qdev_connect_clock_in(DEVICE(cpu), "clk-in", s->clock);
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index 384226296b..566f1200dd 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -955,7 +955,7 @@ void ppce500_init(MachineState *machine)
* when implementing non-kernel boot.
*/
object_property_set_bool(OBJECT(cs), "start-powered-off", i != 0,
- &error_fatal);
+ &error_abort);
qdev_realize_and_unref(DEVICE(cs), NULL, &error_fatal);
if (!firstenv) {
diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c
index 17bf5f2879..64895aebe3 100644
--- a/hw/sparc/sun4m.c
+++ b/hw/sparc/sun4m.c
@@ -804,7 +804,7 @@ static void cpu_devinit(const char *cpu_type, unsigned int id,
qemu_register_reset(sun4m_cpu_reset, cpu);
object_property_set_bool(OBJECT(cpu), "start-powered-off", id != 0,
- &error_fatal);
+ &error_abort);
qdev_realize_and_unref(DEVICE(cpu), NULL, &error_fatal);
cpu_sparc_set_id(env, id);
*cpu_irqs = qemu_allocate_irqs(cpu_set_irq, cpu, MAX_PILS);
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 42/71] hw/ppc/xive2_regs: Remove unnecessary 'cpu.h' inclusion
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (40 preceding siblings ...)
2024-01-05 15:42 ` [PULL 41/71] hw: Simplify accesses to the CPUState::'start-powered-off' property Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 43/71] hw/mips: Inline 'bios.h' definitions Philippe Mathieu-Daudé
` (29 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Cédric Le Goater, Cédric Le Goater,
Frédéric Barrat
xive2_regs.h only requires declarations from "qemu/bswap.h".
Include it instead of the huge target-specific "cpu.h".
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Message-Id: <20231122183920.17905-1-philmd@linaro.org>
---
include/hw/ppc/xive2_regs.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/hw/ppc/xive2_regs.h b/include/hw/ppc/xive2_regs.h
index b7adbdb7b9..816f5d0e84 100644
--- a/include/hw/ppc/xive2_regs.h
+++ b/include/hw/ppc/xive2_regs.h
@@ -10,7 +10,7 @@
#ifndef PPC_XIVE2_REGS_H
#define PPC_XIVE2_REGS_H
-#include "cpu.h"
+#include "qemu/bswap.h"
/*
* Thread Interrupt Management Area (TIMA)
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 43/71] hw/mips: Inline 'bios.h' definitions
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (41 preceding siblings ...)
2024-01-05 15:42 ` [PULL 42/71] hw/ppc/xive2_regs: Remove unnecessary 'cpu.h' inclusion Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 44/71] memory: Have memory_region_init_ram_flags_nomigrate() return a boolean Philippe Mathieu-Daudé
` (28 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Hervé Poussineau, Aleksandar Rikalo, Aurelien Jarno,
Jiaxun Yang
There is no universal BIOS, each machine needs a specific one.
Move the machine-specific definitions to each machine code and
remove this bogus header.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20231122184334.18201-1-philmd@linaro.org>
---
include/hw/mips/bios.h | 14 --------------
hw/mips/jazz.c | 10 +++++++++-
hw/mips/malta.c | 9 ++++++++-
hw/mips/mipssim.c | 10 +++++++++-
4 files changed, 26 insertions(+), 17 deletions(-)
delete mode 100644 include/hw/mips/bios.h
diff --git a/include/hw/mips/bios.h b/include/hw/mips/bios.h
deleted file mode 100644
index 44acb6815b..0000000000
--- a/include/hw/mips/bios.h
+++ /dev/null
@@ -1,14 +0,0 @@
-#ifndef HW_MIPS_BIOS_H
-#define HW_MIPS_BIOS_H
-
-#include "qemu/units.h"
-#include "cpu.h"
-
-#define BIOS_SIZE (4 * MiB)
-#if TARGET_BIG_ENDIAN
-#define BIOS_FILENAME "mips_bios.bin"
-#else
-#define BIOS_FILENAME "mipsel_bios.bin"
-#endif
-
-#endif
diff --git a/hw/mips/jazz.c b/hw/mips/jazz.c
index d33a76ad4d..0d2348aa5a 100644
--- a/hw/mips/jazz.c
+++ b/hw/mips/jazz.c
@@ -36,7 +36,6 @@
#include "hw/boards.h"
#include "net/net.h"
#include "hw/scsi/esp.h"
-#include "hw/mips/bios.h"
#include "hw/loader.h"
#include "hw/rtc/mc146818rtc.h"
#include "hw/timer/i8254.h"
@@ -53,12 +52,19 @@
#ifdef CONFIG_TCG
#include "hw/core/tcg-cpu-ops.h"
#endif /* CONFIG_TCG */
+#include "cpu.h"
enum jazz_model_e {
JAZZ_MAGNUM,
JAZZ_PICA61,
};
+#if TARGET_BIG_ENDIAN
+#define BIOS_FILENAME "mips_bios.bin"
+#else
+#define BIOS_FILENAME "mipsel_bios.bin"
+#endif
+
static void main_cpu_reset(void *opaque)
{
MIPSCPU *cpu = opaque;
@@ -147,6 +153,8 @@ static void mips_jazz_init_net(NICInfo *nd, IOMMUMemoryRegion *rc4030_dma_mr,
prom[7] = 0xff - checksum;
}
+#define BIOS_SIZE (4 * MiB)
+
#define MAGNUM_BIOS_SIZE_MAX 0x7e000
#define MAGNUM_BIOS_SIZE \
(BIOS_SIZE < MAGNUM_BIOS_SIZE_MAX ? BIOS_SIZE : MAGNUM_BIOS_SIZE_MAX)
diff --git a/hw/mips/malta.c b/hw/mips/malta.c
index 049de46a9e..d22bb1edef 100644
--- a/hw/mips/malta.c
+++ b/hw/mips/malta.c
@@ -40,7 +40,6 @@
#include "hw/pci/pci.h"
#include "hw/pci/pci_bus.h"
#include "qemu/log.h"
-#include "hw/mips/bios.h"
#include "hw/ide/pci.h"
#include "hw/irq.h"
#include "hw/loader.h"
@@ -59,6 +58,7 @@
#include "hw/qdev-clock.h"
#include "target/mips/internal.h"
#include "trace.h"
+#include "cpu.h"
#define ENVP_PADDR 0x2000
#define ENVP_VADDR cpu_mips_phys_to_kseg0(NULL, ENVP_PADDR)
@@ -71,6 +71,7 @@
#define RESET_ADDRESS 0x1fc00000ULL
#define FLASH_SIZE 0x400000
+#define BIOS_SIZE (4 * MiB)
#define PIIX4_PCI_DEVFN PCI_DEVFN(10, 0)
@@ -91,6 +92,12 @@ typedef struct {
bool display_inited;
} MaltaFPGAState;
+#if TARGET_BIG_ENDIAN
+#define BIOS_FILENAME "mips_bios.bin"
+#else
+#define BIOS_FILENAME "mipsel_bios.bin"
+#endif
+
#define TYPE_MIPS_MALTA "mips-malta"
OBJECT_DECLARE_SIMPLE_TYPE(MaltaState, MIPS_MALTA)
diff --git a/hw/mips/mipssim.c b/hw/mips/mipssim.c
index 4f743f37eb..01e323904d 100644
--- a/hw/mips/mipssim.c
+++ b/hw/mips/mipssim.c
@@ -35,7 +35,6 @@
#include "net/net.h"
#include "sysemu/sysemu.h"
#include "hw/boards.h"
-#include "hw/mips/bios.h"
#include "hw/loader.h"
#include "elf.h"
#include "hw/sysbus.h"
@@ -43,6 +42,15 @@
#include "qemu/error-report.h"
#include "sysemu/qtest.h"
#include "sysemu/reset.h"
+#include "cpu.h"
+
+#define BIOS_SIZE (4 * MiB)
+
+#if TARGET_BIG_ENDIAN
+#define BIOS_FILENAME "mips_bios.bin"
+#else
+#define BIOS_FILENAME "mipsel_bios.bin"
+#endif
static struct _loaderparams {
int ram_size;
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 44/71] memory: Have memory_region_init_ram_flags_nomigrate() return a boolean
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (42 preceding siblings ...)
2024-01-05 15:42 ` [PULL 43/71] hw/mips: Inline 'bios.h' definitions Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 45/71] memory: Have memory_region_init_ram_nomigrate() handler " Philippe Mathieu-Daudé
` (27 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Manos Pitsidianakis, Peter Xu, Gavin Shan, Paolo Bonzini,
David Hildenbrand
Following the example documented since commit e3fe3988d7 ("error:
Document Error API usage rules"), have memory_region_init_ram_nomigrate
return a boolean indicating whether an error is set or not.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-2-philmd@linaro.org>
---
include/exec/memory.h | 4 +++-
system/memory.c | 4 +++-
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/include/exec/memory.h b/include/exec/memory.h
index f172e82ac9..1df7fb0fed 100644
--- a/include/exec/memory.h
+++ b/include/exec/memory.h
@@ -1310,8 +1310,10 @@ void memory_region_init_ram_nomigrate(MemoryRegion *mr,
*
* Note that this function does not do anything to cause the data in the
* RAM memory region to be migrated; that is the responsibility of the caller.
+ *
+ * Return: true on success, else false setting @errp with error.
*/
-void memory_region_init_ram_flags_nomigrate(MemoryRegion *mr,
+bool memory_region_init_ram_flags_nomigrate(MemoryRegion *mr,
Object *owner,
const char *name,
uint64_t size,
diff --git a/system/memory.c b/system/memory.c
index 798b6c0a17..6110e851f1 100644
--- a/system/memory.c
+++ b/system/memory.c
@@ -1555,7 +1555,7 @@ void memory_region_init_ram_nomigrate(MemoryRegion *mr,
memory_region_init_ram_flags_nomigrate(mr, owner, name, size, 0, errp);
}
-void memory_region_init_ram_flags_nomigrate(MemoryRegion *mr,
+bool memory_region_init_ram_flags_nomigrate(MemoryRegion *mr,
Object *owner,
const char *name,
uint64_t size,
@@ -1572,7 +1572,9 @@ void memory_region_init_ram_flags_nomigrate(MemoryRegion *mr,
mr->size = int128_zero();
object_unparent(OBJECT(mr));
error_propagate(errp, err);
+ return false;
}
+ return true;
}
void memory_region_init_resizeable_ram(MemoryRegion *mr,
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 45/71] memory: Have memory_region_init_ram_nomigrate() handler return a boolean
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (43 preceding siblings ...)
2024-01-05 15:42 ` [PULL 44/71] memory: Have memory_region_init_ram_flags_nomigrate() return a boolean Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 46/71] memory: Have memory_region_init_rom_nomigrate() " Philippe Mathieu-Daudé
` (26 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Manos Pitsidianakis, Peter Xu, Gavin Shan, Paolo Bonzini,
David Hildenbrand
Following the example documented since commit e3fe3988d7 ("error:
Document Error API usage rules"), have memory_region_init_ram_nomigrate
return a boolean indicating whether an error is set or not.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-3-philmd@linaro.org>
---
include/exec/memory.h | 4 +++-
system/memory.c | 5 +++--
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/include/exec/memory.h b/include/exec/memory.h
index 1df7fb0fed..413fbda089 100644
--- a/include/exec/memory.h
+++ b/include/exec/memory.h
@@ -1288,8 +1288,10 @@ void memory_region_init_io(MemoryRegion *mr,
*
* Note that this function does not do anything to cause the data in the
* RAM memory region to be migrated; that is the responsibility of the caller.
+ *
+ * Return: true on success, else false setting @errp with error.
*/
-void memory_region_init_ram_nomigrate(MemoryRegion *mr,
+bool memory_region_init_ram_nomigrate(MemoryRegion *mr,
Object *owner,
const char *name,
uint64_t size,
diff --git a/system/memory.c b/system/memory.c
index 6110e851f1..f9e5ae22d5 100644
--- a/system/memory.c
+++ b/system/memory.c
@@ -1546,13 +1546,14 @@ void memory_region_init_io(MemoryRegion *mr,
mr->terminates = true;
}
-void memory_region_init_ram_nomigrate(MemoryRegion *mr,
+bool memory_region_init_ram_nomigrate(MemoryRegion *mr,
Object *owner,
const char *name,
uint64_t size,
Error **errp)
{
- memory_region_init_ram_flags_nomigrate(mr, owner, name, size, 0, errp);
+ return memory_region_init_ram_flags_nomigrate(mr, owner, name,
+ size, 0, errp);
}
bool memory_region_init_ram_flags_nomigrate(MemoryRegion *mr,
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 46/71] memory: Have memory_region_init_rom_nomigrate() handler return a boolean
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (44 preceding siblings ...)
2024-01-05 15:42 ` [PULL 45/71] memory: Have memory_region_init_ram_nomigrate() handler " Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 47/71] memory: Simplify memory_region_init_rom_nomigrate() calls Philippe Mathieu-Daudé
` (25 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Peter Xu, Gavin Shan, Paolo Bonzini, David Hildenbrand
Following the example documented since commit e3fe3988d7 ("error:
Document Error API usage rules"), have memory_region_init_rom_nomigrate
return a boolean indicating whether an error is set or not.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-4-philmd@linaro.org>
[PMD: Only update 'readonly' field on success (Manos Pitsidianakis)]
Message-Id: <af352e7d-3346-4705-be77-6eed86858d18@linaro.org>
---
include/exec/memory.h | 4 +++-
system/memory.c | 9 +++++++--
2 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/include/exec/memory.h b/include/exec/memory.h
index 413fbda089..f3a4a76817 100644
--- a/include/exec/memory.h
+++ b/include/exec/memory.h
@@ -1498,8 +1498,10 @@ void memory_region_init_alias(MemoryRegion *mr,
* must be unique within any device
* @size: size of the region.
* @errp: pointer to Error*, to store an error if it happens.
+ *
+ * Return: true on success, else false setting @errp with error.
*/
-void memory_region_init_rom_nomigrate(MemoryRegion *mr,
+bool memory_region_init_rom_nomigrate(MemoryRegion *mr,
Object *owner,
const char *name,
uint64_t size,
diff --git a/system/memory.c b/system/memory.c
index f9e5ae22d5..72c6441e20 100644
--- a/system/memory.c
+++ b/system/memory.c
@@ -1701,14 +1701,19 @@ void memory_region_init_alias(MemoryRegion *mr,
mr->alias_offset = offset;
}
-void memory_region_init_rom_nomigrate(MemoryRegion *mr,
+bool memory_region_init_rom_nomigrate(MemoryRegion *mr,
Object *owner,
const char *name,
uint64_t size,
Error **errp)
{
- memory_region_init_ram_flags_nomigrate(mr, owner, name, size, 0, errp);
+ if (!memory_region_init_ram_flags_nomigrate(mr, owner, name,
+ size, 0, errp)) {
+ return false;
+ }
mr->readonly = true;
+
+ return true;
}
void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 47/71] memory: Simplify memory_region_init_rom_nomigrate() calls
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (45 preceding siblings ...)
2024-01-05 15:42 ` [PULL 46/71] memory: Have memory_region_init_rom_nomigrate() " Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 48/71] memory: Simplify memory_region_init_ram_from_fd() calls Philippe Mathieu-Daudé
` (24 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Peter Xu, Richard Henderson, Gavin Shan, Paolo Bonzini,
David Hildenbrand
Mechanical change using the following coccinelle script:
@@
expression mr, owner, arg3, arg4, errp;
@@
- memory_region_init_rom_nomigrate(mr, owner, arg3, arg4, &errp);
if (
- errp
+ !memory_region_init_rom_nomigrate(mr, owner, arg3, arg4, &errp)
) {
...
return;
}
and removing the local Error variable.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-5-philmd@linaro.org>
---
system/memory.c | 5 +----
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/system/memory.c b/system/memory.c
index 72c6441e20..3997ac5928 100644
--- a/system/memory.c
+++ b/system/memory.c
@@ -3601,11 +3601,8 @@ void memory_region_init_rom(MemoryRegion *mr,
Error **errp)
{
DeviceState *owner_dev;
- Error *err = NULL;
- memory_region_init_rom_nomigrate(mr, owner, name, size, &err);
- if (err) {
- error_propagate(errp, err);
+ if (!memory_region_init_rom_nomigrate(mr, owner, name, size, errp)) {
return;
}
/* This will assert if owner is neither NULL nor a DeviceState.
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 48/71] memory: Simplify memory_region_init_ram_from_fd() calls
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (46 preceding siblings ...)
2024-01-05 15:42 ` [PULL 47/71] memory: Simplify memory_region_init_rom_nomigrate() calls Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 49/71] memory: Have memory_region_init_ram() handler return a boolean Philippe Mathieu-Daudé
` (23 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Manos Pitsidianakis, Gavin Shan, Paolo Bonzini, Peter Xu,
David Hildenbrand
Mechanical change using the following coccinelle script:
@@
expression mr, owner, arg3, arg4, arg5, arg6, arg7, errp;
@@
- memory_region_init_ram_from_fd(mr, owner, arg3, arg4, arg5, arg6, arg7, &errp);
if (
- errp
+ !memory_region_init_ram_from_fd(mr, owner, arg3, arg4, arg5, arg6, arg7, &errp)
) {
...
return;
}
and removing the local Error variable.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-6-philmd@linaro.org>
---
system/memory.c | 5 +----
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/system/memory.c b/system/memory.c
index 3997ac5928..c1374e9968 100644
--- a/system/memory.c
+++ b/system/memory.c
@@ -3577,11 +3577,8 @@ void memory_region_init_ram(MemoryRegion *mr,
Error **errp)
{
DeviceState *owner_dev;
- Error *err = NULL;
- memory_region_init_ram_nomigrate(mr, owner, name, size, &err);
- if (err) {
- error_propagate(errp, err);
+ if (!memory_region_init_ram_nomigrate(mr, owner, name, size, errp)) {
return;
}
/* This will assert if owner is neither NULL nor a DeviceState.
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 49/71] memory: Have memory_region_init_ram() handler return a boolean
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (47 preceding siblings ...)
2024-01-05 15:42 ` [PULL 48/71] memory: Simplify memory_region_init_ram_from_fd() calls Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 50/71] memory: Have memory_region_init_rom() " Philippe Mathieu-Daudé
` (22 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Peter Xu, Gavin Shan, Paolo Bonzini, David Hildenbrand
Following the example documented since commit e3fe3988d7 ("error:
Document Error API usage rules"), have memory_region_init_ram()
return a boolean indicating whether an error is set or not.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-7-philmd@linaro.org>
---
include/exec/memory.h | 4 +++-
system/memory.c | 6 ++++--
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/include/exec/memory.h b/include/exec/memory.h
index f3a4a76817..b2dce73e7f 100644
--- a/include/exec/memory.h
+++ b/include/exec/memory.h
@@ -1582,8 +1582,10 @@ void memory_region_init_iommu(void *_iommu_mr,
* give the RAM block a unique name for migration purposes.
* We should lift this restriction and allow arbitrary Objects.
* If you pass a non-NULL non-device @owner then we will assert.
+ *
+ * Return: true on success, else false setting @errp with error.
*/
-void memory_region_init_ram(MemoryRegion *mr,
+bool memory_region_init_ram(MemoryRegion *mr,
Object *owner,
const char *name,
uint64_t size,
diff --git a/system/memory.c b/system/memory.c
index c1374e9968..45ce6fd6c1 100644
--- a/system/memory.c
+++ b/system/memory.c
@@ -3570,7 +3570,7 @@ void mtree_info(bool flatview, bool dispatch_tree, bool owner, bool disabled)
}
}
-void memory_region_init_ram(MemoryRegion *mr,
+bool memory_region_init_ram(MemoryRegion *mr,
Object *owner,
const char *name,
uint64_t size,
@@ -3579,7 +3579,7 @@ void memory_region_init_ram(MemoryRegion *mr,
DeviceState *owner_dev;
if (!memory_region_init_ram_nomigrate(mr, owner, name, size, errp)) {
- return;
+ return false;
}
/* This will assert if owner is neither NULL nor a DeviceState.
* We only want the owner here for the purposes of defining a
@@ -3589,6 +3589,8 @@ void memory_region_init_ram(MemoryRegion *mr,
*/
owner_dev = DEVICE(owner);
vmstate_register_ram(mr, owner_dev);
+
+ return true;
}
void memory_region_init_rom(MemoryRegion *mr,
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 50/71] memory: Have memory_region_init_rom() handler return a boolean
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (48 preceding siblings ...)
2024-01-05 15:42 ` [PULL 49/71] memory: Have memory_region_init_ram() handler return a boolean Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 51/71] memory: Have memory_region_init_rom_device_nomigrate() " Philippe Mathieu-Daudé
` (21 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Manos Pitsidianakis, Gavin Shan, Paolo Bonzini, Peter Xu,
David Hildenbrand
Following the example documented since commit e3fe3988d7 ("error:
Document Error API usage rules"), have memory_region_init_rom()
return a boolean indicating whether an error is set or not.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-8-philmd@linaro.org>
---
include/exec/memory.h | 4 +++-
system/memory.c | 6 ++++--
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/include/exec/memory.h b/include/exec/memory.h
index b2dce73e7f..9f54bc4af8 100644
--- a/include/exec/memory.h
+++ b/include/exec/memory.h
@@ -1611,8 +1611,10 @@ bool memory_region_init_ram(MemoryRegion *mr,
* must be unique within any device
* @size: size of the region.
* @errp: pointer to Error*, to store an error if it happens.
+ *
+ * Return: true on success, else false setting @errp with error.
*/
-void memory_region_init_rom(MemoryRegion *mr,
+bool memory_region_init_rom(MemoryRegion *mr,
Object *owner,
const char *name,
uint64_t size,
diff --git a/system/memory.c b/system/memory.c
index 45ce6fd6c1..069aa5ee08 100644
--- a/system/memory.c
+++ b/system/memory.c
@@ -3593,7 +3593,7 @@ bool memory_region_init_ram(MemoryRegion *mr,
return true;
}
-void memory_region_init_rom(MemoryRegion *mr,
+bool memory_region_init_rom(MemoryRegion *mr,
Object *owner,
const char *name,
uint64_t size,
@@ -3602,7 +3602,7 @@ void memory_region_init_rom(MemoryRegion *mr,
DeviceState *owner_dev;
if (!memory_region_init_rom_nomigrate(mr, owner, name, size, errp)) {
- return;
+ return false;
}
/* This will assert if owner is neither NULL nor a DeviceState.
* We only want the owner here for the purposes of defining a
@@ -3612,6 +3612,8 @@ void memory_region_init_rom(MemoryRegion *mr,
*/
owner_dev = DEVICE(owner);
vmstate_register_ram(mr, owner_dev);
+
+ return true;
}
void memory_region_init_rom_device(MemoryRegion *mr,
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 51/71] memory: Have memory_region_init_rom_device_nomigrate() return a boolean
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (49 preceding siblings ...)
2024-01-05 15:42 ` [PULL 50/71] memory: Have memory_region_init_rom() " Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 52/71] memory: Simplify memory_region_init_rom_device_nomigrate() calls Philippe Mathieu-Daudé
` (20 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Peter Xu, Gavin Shan, Paolo Bonzini, David Hildenbrand
Following the example documented since commit e3fe3988d7
("error: Document Error API usage rules"), have
memory_region_init_rom_device_nomigrate() return a boolean
indicating whether an error is set or not.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-9-philmd@linaro.org>
---
include/exec/memory.h | 4 +++-
system/memory.c | 4 +++-
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/include/exec/memory.h b/include/exec/memory.h
index 9f54bc4af8..6d7b49b735 100644
--- a/include/exec/memory.h
+++ b/include/exec/memory.h
@@ -1523,8 +1523,10 @@ bool memory_region_init_rom_nomigrate(MemoryRegion *mr,
* must be unique within any device
* @size: size of the region.
* @errp: pointer to Error*, to store an error if it happens.
+ *
+ * Return: true on success, else false setting @errp with error.
*/
-void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
+bool memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
Object *owner,
const MemoryRegionOps *ops,
void *opaque,
diff --git a/system/memory.c b/system/memory.c
index 069aa5ee08..8db271c19e 100644
--- a/system/memory.c
+++ b/system/memory.c
@@ -1716,7 +1716,7 @@ bool memory_region_init_rom_nomigrate(MemoryRegion *mr,
return true;
}
-void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
+bool memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
Object *owner,
const MemoryRegionOps *ops,
void *opaque,
@@ -1737,7 +1737,9 @@ void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
mr->size = int128_zero();
object_unparent(OBJECT(mr));
error_propagate(errp, err);
+ return false;
}
+ return true;
}
void memory_region_init_iommu(void *_iommu_mr,
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 52/71] memory: Simplify memory_region_init_rom_device_nomigrate() calls
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (50 preceding siblings ...)
2024-01-05 15:42 ` [PULL 51/71] memory: Have memory_region_init_rom_device_nomigrate() " Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 53/71] memory: Have memory_region_init_rom_device() handler return a boolean Philippe Mathieu-Daudé
` (19 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Peter Xu, Gavin Shan, Paolo Bonzini, David Hildenbrand
Mechanical change using the following coccinelle script:
@@
expression mr, owner, arg3, arg4, arg5, arg6, errp;
@@
- memory_region_init_rom_device_nomigrate(mr, owner, arg3, arg4, arg5, arg6, &errp);
if (
- errp
+ !memory_region_init_rom_device_nomigrate(mr, owner, arg3, arg4, arg5, arg6, &errp)
) {
...
return;
}
and removing the local Error variable.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-10-philmd@linaro.org>
---
system/memory.c | 7 ++-----
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/system/memory.c b/system/memory.c
index 8db271c19e..c6562f5e86 100644
--- a/system/memory.c
+++ b/system/memory.c
@@ -3627,12 +3627,9 @@ void memory_region_init_rom_device(MemoryRegion *mr,
Error **errp)
{
DeviceState *owner_dev;
- Error *err = NULL;
- memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
- name, size, &err);
- if (err) {
- error_propagate(errp, err);
+ if (!memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
+ name, size, errp)) {
return;
}
/* This will assert if owner is neither NULL nor a DeviceState.
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 53/71] memory: Have memory_region_init_rom_device() handler return a boolean
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (51 preceding siblings ...)
2024-01-05 15:42 ` [PULL 52/71] memory: Simplify memory_region_init_rom_device_nomigrate() calls Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 54/71] memory: Have memory_region_init_resizeable_ram() " Philippe Mathieu-Daudé
` (18 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Peter Xu, Gavin Shan, Paolo Bonzini, David Hildenbrand
Following the example documented since commit e3fe3988d7 ("error:
Document Error API usage rules"), have memory_region_init_rom_device
return a boolean indicating whether an error is set or not.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-11-philmd@linaro.org>
---
include/exec/memory.h | 4 +++-
system/memory.c | 6 ++++--
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/include/exec/memory.h b/include/exec/memory.h
index 6d7b49b735..6209458f56 100644
--- a/include/exec/memory.h
+++ b/include/exec/memory.h
@@ -1646,8 +1646,10 @@ bool memory_region_init_rom(MemoryRegion *mr,
* must be unique within any device
* @size: size of the region.
* @errp: pointer to Error*, to store an error if it happens.
+ *
+ * Return: true on success, else false setting @errp with error.
*/
-void memory_region_init_rom_device(MemoryRegion *mr,
+bool memory_region_init_rom_device(MemoryRegion *mr,
Object *owner,
const MemoryRegionOps *ops,
void *opaque,
diff --git a/system/memory.c b/system/memory.c
index c6562f5e86..e5193d4623 100644
--- a/system/memory.c
+++ b/system/memory.c
@@ -3618,7 +3618,7 @@ bool memory_region_init_rom(MemoryRegion *mr,
return true;
}
-void memory_region_init_rom_device(MemoryRegion *mr,
+bool memory_region_init_rom_device(MemoryRegion *mr,
Object *owner,
const MemoryRegionOps *ops,
void *opaque,
@@ -3630,7 +3630,7 @@ void memory_region_init_rom_device(MemoryRegion *mr,
if (!memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
name, size, errp)) {
- return;
+ return false;
}
/* This will assert if owner is neither NULL nor a DeviceState.
* We only want the owner here for the purposes of defining a
@@ -3640,6 +3640,8 @@ void memory_region_init_rom_device(MemoryRegion *mr,
*/
owner_dev = DEVICE(owner);
vmstate_register_ram(mr, owner_dev);
+
+ return true;
}
/*
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 54/71] memory: Have memory_region_init_resizeable_ram() return a boolean
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (52 preceding siblings ...)
2024-01-05 15:42 ` [PULL 53/71] memory: Have memory_region_init_rom_device() handler return a boolean Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 55/71] memory: Have memory_region_init_ram_from_file() handler " Philippe Mathieu-Daudé
` (17 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Peter Xu, Gavin Shan, Paolo Bonzini, David Hildenbrand
Following the example documented since commit e3fe3988d7 ("error:
Document Error API usage rules"), have memory_region_init_resizeable_ram
return a boolean indicating whether an error is set or not.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-12-philmd@linaro.org>
---
include/exec/memory.h | 4 +++-
system/memory.c | 4 +++-
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/include/exec/memory.h b/include/exec/memory.h
index 6209458f56..faddf8f073 100644
--- a/include/exec/memory.h
+++ b/include/exec/memory.h
@@ -1342,8 +1342,10 @@ bool memory_region_init_ram_flags_nomigrate(MemoryRegion *mr,
*
* Note that this function does not do anything to cause the data in the
* RAM memory region to be migrated; that is the responsibility of the caller.
+ *
+ * Return: true on success, else false setting @errp with error.
*/
-void memory_region_init_resizeable_ram(MemoryRegion *mr,
+bool memory_region_init_resizeable_ram(MemoryRegion *mr,
Object *owner,
const char *name,
uint64_t size,
diff --git a/system/memory.c b/system/memory.c
index e5193d4623..75303484e1 100644
--- a/system/memory.c
+++ b/system/memory.c
@@ -1578,7 +1578,7 @@ bool memory_region_init_ram_flags_nomigrate(MemoryRegion *mr,
return true;
}
-void memory_region_init_resizeable_ram(MemoryRegion *mr,
+bool memory_region_init_resizeable_ram(MemoryRegion *mr,
Object *owner,
const char *name,
uint64_t size,
@@ -1599,7 +1599,9 @@ void memory_region_init_resizeable_ram(MemoryRegion *mr,
mr->size = int128_zero();
object_unparent(OBJECT(mr));
error_propagate(errp, err);
+ return false;
}
+ return true;
}
#ifdef CONFIG_POSIX
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 55/71] memory: Have memory_region_init_ram_from_file() handler return a boolean
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (53 preceding siblings ...)
2024-01-05 15:42 ` [PULL 54/71] memory: Have memory_region_init_resizeable_ram() " Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 56/71] memory: Have memory_region_init_ram_from_fd() " Philippe Mathieu-Daudé
` (16 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Peter Xu, Gavin Shan, Paolo Bonzini, David Hildenbrand
Following the example documented since commit e3fe3988d7 ("error:
Document Error API usage rules"), have memory_region_init_ram_from_file
return a boolean indicating whether an error is set or not.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-13-philmd@linaro.org>
---
include/exec/memory.h | 4 +++-
system/memory.c | 4 +++-
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/include/exec/memory.h b/include/exec/memory.h
index faddf8f073..c39819ec75 100644
--- a/include/exec/memory.h
+++ b/include/exec/memory.h
@@ -1376,8 +1376,10 @@ bool memory_region_init_resizeable_ram(MemoryRegion *mr,
*
* Note that this function does not do anything to cause the data in the
* RAM memory region to be migrated; that is the responsibility of the caller.
+ *
+ * Return: true on success, else false setting @errp with error.
*/
-void memory_region_init_ram_from_file(MemoryRegion *mr,
+bool memory_region_init_ram_from_file(MemoryRegion *mr,
Object *owner,
const char *name,
uint64_t size,
diff --git a/system/memory.c b/system/memory.c
index 75303484e1..e05d88aa67 100644
--- a/system/memory.c
+++ b/system/memory.c
@@ -1605,7 +1605,7 @@ bool memory_region_init_resizeable_ram(MemoryRegion *mr,
}
#ifdef CONFIG_POSIX
-void memory_region_init_ram_from_file(MemoryRegion *mr,
+bool memory_region_init_ram_from_file(MemoryRegion *mr,
Object *owner,
const char *name,
uint64_t size,
@@ -1628,7 +1628,9 @@ void memory_region_init_ram_from_file(MemoryRegion *mr,
mr->size = int128_zero();
object_unparent(OBJECT(mr));
error_propagate(errp, err);
+ return false;
}
+ return true;
}
void memory_region_init_ram_from_fd(MemoryRegion *mr,
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 56/71] memory: Have memory_region_init_ram_from_fd() handler return a boolean
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (54 preceding siblings ...)
2024-01-05 15:42 ` [PULL 55/71] memory: Have memory_region_init_ram_from_file() handler " Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 57/71] backends: Use g_autofree in HostMemoryBackendClass::alloc() handlers Philippe Mathieu-Daudé
` (15 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Peter Xu, Gavin Shan, Paolo Bonzini, David Hildenbrand
Following the example documented since commit e3fe3988d7 ("error:
Document Error API usage rules"), have memory_region_init_ram_from_fd
return a boolean indicating whether an error is set or not.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-14-philmd@linaro.org>
---
include/exec/memory.h | 4 +++-
system/memory.c | 4 +++-
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/include/exec/memory.h b/include/exec/memory.h
index c39819ec75..48c11ca743 100644
--- a/include/exec/memory.h
+++ b/include/exec/memory.h
@@ -1406,8 +1406,10 @@ bool memory_region_init_ram_from_file(MemoryRegion *mr,
*
* Note that this function does not do anything to cause the data in the
* RAM memory region to be migrated; that is the responsibility of the caller.
+ *
+ * Return: true on success, else false setting @errp with error.
*/
-void memory_region_init_ram_from_fd(MemoryRegion *mr,
+bool memory_region_init_ram_from_fd(MemoryRegion *mr,
Object *owner,
const char *name,
uint64_t size,
diff --git a/system/memory.c b/system/memory.c
index e05d88aa67..9ceb229d28 100644
--- a/system/memory.c
+++ b/system/memory.c
@@ -1633,7 +1633,7 @@ bool memory_region_init_ram_from_file(MemoryRegion *mr,
return true;
}
-void memory_region_init_ram_from_fd(MemoryRegion *mr,
+bool memory_region_init_ram_from_fd(MemoryRegion *mr,
Object *owner,
const char *name,
uint64_t size,
@@ -1654,7 +1654,9 @@ void memory_region_init_ram_from_fd(MemoryRegion *mr,
mr->size = int128_zero();
object_unparent(OBJECT(mr));
error_propagate(errp, err);
+ return false;
}
+ return true;
}
#endif
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 57/71] backends: Use g_autofree in HostMemoryBackendClass::alloc() handlers
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (55 preceding siblings ...)
2024-01-05 15:42 ` [PULL 56/71] memory: Have memory_region_init_ram_from_fd() " Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 58/71] backends: Simplify host_memory_backend_memory_complete() Philippe Mathieu-Daudé
` (14 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Manos Pitsidianakis, Gavin Shan, David Hildenbrand, Igor Mammedov
In preparation of having HostMemoryBackendClass::alloc() handlers
return a boolean, have them use g_autofree.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-15-philmd@linaro.org>
---
backends/hostmem-epc.c | 3 +--
backends/hostmem-file.c | 3 +--
backends/hostmem-memfd.c | 3 +--
backends/hostmem-ram.c | 3 +--
4 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/backends/hostmem-epc.c b/backends/hostmem-epc.c
index 4e162d6789..3ceb079f9e 100644
--- a/backends/hostmem-epc.c
+++ b/backends/hostmem-epc.c
@@ -20,8 +20,8 @@
static void
sgx_epc_backend_memory_alloc(HostMemoryBackend *backend, Error **errp)
{
+ g_autofree char *name = NULL;
uint32_t ram_flags;
- char *name;
int fd;
if (!backend->size) {
@@ -41,7 +41,6 @@ sgx_epc_backend_memory_alloc(HostMemoryBackend *backend, Error **errp)
memory_region_init_ram_from_fd(&backend->mr, OBJECT(backend),
name, backend->size, ram_flags,
fd, 0, errp);
- g_free(name);
}
static void sgx_epc_backend_instance_init(Object *obj)
diff --git a/backends/hostmem-file.c b/backends/hostmem-file.c
index 361d4a8103..fe8c481f8f 100644
--- a/backends/hostmem-file.c
+++ b/backends/hostmem-file.c
@@ -44,8 +44,8 @@ file_backend_memory_alloc(HostMemoryBackend *backend, Error **errp)
object_get_typename(OBJECT(backend)));
#else
HostMemoryBackendFile *fb = MEMORY_BACKEND_FILE(backend);
+ g_autofree gchar *name = NULL;
uint32_t ram_flags;
- gchar *name;
if (!backend->size) {
error_setg(errp, "can't create backend with size 0");
@@ -89,7 +89,6 @@ file_backend_memory_alloc(HostMemoryBackend *backend, Error **errp)
memory_region_init_ram_from_file(&backend->mr, OBJECT(backend), name,
backend->size, fb->align, ram_flags,
fb->mem_path, fb->offset, errp);
- g_free(name);
#endif
}
diff --git a/backends/hostmem-memfd.c b/backends/hostmem-memfd.c
index 3fc85c3db8..db28ab5a56 100644
--- a/backends/hostmem-memfd.c
+++ b/backends/hostmem-memfd.c
@@ -35,8 +35,8 @@ static void
memfd_backend_memory_alloc(HostMemoryBackend *backend, Error **errp)
{
HostMemoryBackendMemfd *m = MEMORY_BACKEND_MEMFD(backend);
+ g_autofree char *name = NULL;
uint32_t ram_flags;
- char *name;
int fd;
if (!backend->size) {
@@ -57,7 +57,6 @@ memfd_backend_memory_alloc(HostMemoryBackend *backend, Error **errp)
ram_flags |= backend->reserve ? 0 : RAM_NORESERVE;
memory_region_init_ram_from_fd(&backend->mr, OBJECT(backend), name,
backend->size, ram_flags, fd, 0, errp);
- g_free(name);
}
static bool
diff --git a/backends/hostmem-ram.c b/backends/hostmem-ram.c
index b8e55cdbd0..0a670fc22a 100644
--- a/backends/hostmem-ram.c
+++ b/backends/hostmem-ram.c
@@ -19,8 +19,8 @@
static void
ram_backend_memory_alloc(HostMemoryBackend *backend, Error **errp)
{
+ g_autofree char *name = NULL;
uint32_t ram_flags;
- char *name;
if (!backend->size) {
error_setg(errp, "can't create backend with size 0");
@@ -32,7 +32,6 @@ ram_backend_memory_alloc(HostMemoryBackend *backend, Error **errp)
ram_flags |= backend->reserve ? 0 : RAM_NORESERVE;
memory_region_init_ram_flags_nomigrate(&backend->mr, OBJECT(backend), name,
backend->size, ram_flags, errp);
- g_free(name);
}
static void
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 58/71] backends: Simplify host_memory_backend_memory_complete()
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (56 preceding siblings ...)
2024-01-05 15:42 ` [PULL 57/71] backends: Use g_autofree in HostMemoryBackendClass::alloc() handlers Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 59/71] backends: Have HostMemoryBackendClass::alloc() handler return a boolean Philippe Mathieu-Daudé
` (13 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Manos Pitsidianakis, Gavin Shan, David Hildenbrand, Igor Mammedov
Return early if bc->alloc is NULL. De-indent the if() ladder.
Note, this avoids a pointless call to error_propagate() with
errp=NULL at the 'out:' label.
Change trivial when reviewed with 'git-diff --ignore-all-space'.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-16-philmd@linaro.org>
---
backends/hostmem.c | 133 +++++++++++++++++++++++----------------------
1 file changed, 67 insertions(+), 66 deletions(-)
diff --git a/backends/hostmem.c b/backends/hostmem.c
index 747e7838c0..1723c19165 100644
--- a/backends/hostmem.c
+++ b/backends/hostmem.c
@@ -328,83 +328,84 @@ host_memory_backend_memory_complete(UserCreatable *uc, Error **errp)
void *ptr;
uint64_t sz;
- if (bc->alloc) {
- bc->alloc(backend, &local_err);
- if (local_err) {
- goto out;
- }
+ if (!bc->alloc) {
+ return;
+ }
+ bc->alloc(backend, &local_err);
+ if (local_err) {
+ goto out;
+ }
- ptr = memory_region_get_ram_ptr(&backend->mr);
- sz = memory_region_size(&backend->mr);
+ ptr = memory_region_get_ram_ptr(&backend->mr);
+ sz = memory_region_size(&backend->mr);
- if (backend->merge) {
- qemu_madvise(ptr, sz, QEMU_MADV_MERGEABLE);
- }
- if (!backend->dump) {
- qemu_madvise(ptr, sz, QEMU_MADV_DONTDUMP);
- }
+ if (backend->merge) {
+ qemu_madvise(ptr, sz, QEMU_MADV_MERGEABLE);
+ }
+ if (!backend->dump) {
+ qemu_madvise(ptr, sz, QEMU_MADV_DONTDUMP);
+ }
#ifdef CONFIG_NUMA
- unsigned long lastbit = find_last_bit(backend->host_nodes, MAX_NODES);
- /* lastbit == MAX_NODES means maxnode = 0 */
- unsigned long maxnode = (lastbit + 1) % (MAX_NODES + 1);
- /* ensure policy won't be ignored in case memory is preallocated
- * before mbind(). note: MPOL_MF_STRICT is ignored on hugepages so
- * this doesn't catch hugepage case. */
- unsigned flags = MPOL_MF_STRICT | MPOL_MF_MOVE;
- int mode = backend->policy;
+ unsigned long lastbit = find_last_bit(backend->host_nodes, MAX_NODES);
+ /* lastbit == MAX_NODES means maxnode = 0 */
+ unsigned long maxnode = (lastbit + 1) % (MAX_NODES + 1);
+ /* ensure policy won't be ignored in case memory is preallocated
+ * before mbind(). note: MPOL_MF_STRICT is ignored on hugepages so
+ * this doesn't catch hugepage case. */
+ unsigned flags = MPOL_MF_STRICT | MPOL_MF_MOVE;
+ int mode = backend->policy;
- /* check for invalid host-nodes and policies and give more verbose
- * error messages than mbind(). */
- if (maxnode && backend->policy == MPOL_DEFAULT) {
- error_setg(errp, "host-nodes must be empty for policy default,"
- " or you should explicitly specify a policy other"
- " than default");
- return;
- } else if (maxnode == 0 && backend->policy != MPOL_DEFAULT) {
- error_setg(errp, "host-nodes must be set for policy %s",
- HostMemPolicy_str(backend->policy));
- return;
- }
+ /* check for invalid host-nodes and policies and give more verbose
+ * error messages than mbind(). */
+ if (maxnode && backend->policy == MPOL_DEFAULT) {
+ error_setg(errp, "host-nodes must be empty for policy default,"
+ " or you should explicitly specify a policy other"
+ " than default");
+ return;
+ } else if (maxnode == 0 && backend->policy != MPOL_DEFAULT) {
+ error_setg(errp, "host-nodes must be set for policy %s",
+ HostMemPolicy_str(backend->policy));
+ return;
+ }
- /* We can have up to MAX_NODES nodes, but we need to pass maxnode+1
- * as argument to mbind() due to an old Linux bug (feature?) which
- * cuts off the last specified node. This means backend->host_nodes
- * must have MAX_NODES+1 bits available.
- */
- assert(sizeof(backend->host_nodes) >=
- BITS_TO_LONGS(MAX_NODES + 1) * sizeof(unsigned long));
- assert(maxnode <= MAX_NODES);
+ /* We can have up to MAX_NODES nodes, but we need to pass maxnode+1
+ * as argument to mbind() due to an old Linux bug (feature?) which
+ * cuts off the last specified node. This means backend->host_nodes
+ * must have MAX_NODES+1 bits available.
+ */
+ assert(sizeof(backend->host_nodes) >=
+ BITS_TO_LONGS(MAX_NODES + 1) * sizeof(unsigned long));
+ assert(maxnode <= MAX_NODES);
#ifdef HAVE_NUMA_HAS_PREFERRED_MANY
- if (mode == MPOL_PREFERRED && numa_has_preferred_many() > 0) {
- /*
- * Replace with MPOL_PREFERRED_MANY otherwise the mbind() below
- * silently picks the first node.
- */
- mode = MPOL_PREFERRED_MANY;
- }
+ if (mode == MPOL_PREFERRED && numa_has_preferred_many() > 0) {
+ /*
+ * Replace with MPOL_PREFERRED_MANY otherwise the mbind() below
+ * silently picks the first node.
+ */
+ mode = MPOL_PREFERRED_MANY;
+ }
#endif
- if (maxnode &&
- mbind(ptr, sz, mode, backend->host_nodes, maxnode + 1, flags)) {
- if (backend->policy != MPOL_DEFAULT || errno != ENOSYS) {
- error_setg_errno(errp, errno,
- "cannot bind memory to host NUMA nodes");
- return;
- }
+ if (maxnode &&
+ mbind(ptr, sz, mode, backend->host_nodes, maxnode + 1, flags)) {
+ if (backend->policy != MPOL_DEFAULT || errno != ENOSYS) {
+ error_setg_errno(errp, errno,
+ "cannot bind memory to host NUMA nodes");
+ return;
}
+ }
#endif
- /* Preallocate memory after the NUMA policy has been instantiated.
- * This is necessary to guarantee memory is allocated with
- * specified NUMA policy in place.
- */
- if (backend->prealloc) {
- qemu_prealloc_mem(memory_region_get_fd(&backend->mr), ptr, sz,
- backend->prealloc_threads,
- backend->prealloc_context, &local_err);
- if (local_err) {
- goto out;
- }
+ /* Preallocate memory after the NUMA policy has been instantiated.
+ * This is necessary to guarantee memory is allocated with
+ * specified NUMA policy in place.
+ */
+ if (backend->prealloc) {
+ qemu_prealloc_mem(memory_region_get_fd(&backend->mr), ptr, sz,
+ backend->prealloc_threads,
+ backend->prealloc_context, &local_err);
+ if (local_err) {
+ goto out;
}
}
out:
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 59/71] backends: Have HostMemoryBackendClass::alloc() handler return a boolean
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (57 preceding siblings ...)
2024-01-05 15:42 ` [PULL 58/71] backends: Simplify host_memory_backend_memory_complete() Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 60/71] backends: Reduce variable scope in host_memory_backend_memory_complete Philippe Mathieu-Daudé
` (12 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Manos Pitsidianakis, Gavin Shan, David Hildenbrand, Igor Mammedov
Following the example documented since commit e3fe3988d7 ("error:
Document Error API usage rules"), have HostMemoryBackendClass::alloc
return a boolean indicating whether an error is set or not.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-17-philmd@linaro.org>
---
include/sysemu/hostmem.h | 10 +++++++++-
backends/hostmem-epc.c | 11 +++++------
backends/hostmem-file.c | 19 ++++++++++---------
backends/hostmem-memfd.c | 10 +++++-----
backends/hostmem-ram.c | 9 +++++----
backends/hostmem.c | 5 ++---
6 files changed, 36 insertions(+), 28 deletions(-)
diff --git a/include/sysemu/hostmem.h b/include/sysemu/hostmem.h
index 39326f1d4f..0e411aaa29 100644
--- a/include/sysemu/hostmem.h
+++ b/include/sysemu/hostmem.h
@@ -47,7 +47,15 @@ OBJECT_DECLARE_TYPE(HostMemoryBackend, HostMemoryBackendClass,
struct HostMemoryBackendClass {
ObjectClass parent_class;
- void (*alloc)(HostMemoryBackend *backend, Error **errp);
+ /**
+ * alloc: Allocate memory from backend.
+ *
+ * @backend: the #HostMemoryBackend.
+ * @errp: pointer to Error*, to store an error if it happens.
+ *
+ * Return: true on success, else false setting @errp with error.
+ */
+ bool (*alloc)(HostMemoryBackend *backend, Error **errp);
};
/**
diff --git a/backends/hostmem-epc.c b/backends/hostmem-epc.c
index 3ceb079f9e..735e2e1cf8 100644
--- a/backends/hostmem-epc.c
+++ b/backends/hostmem-epc.c
@@ -17,7 +17,7 @@
#include "sysemu/hostmem.h"
#include "hw/i386/hostmem-epc.h"
-static void
+static bool
sgx_epc_backend_memory_alloc(HostMemoryBackend *backend, Error **errp)
{
g_autofree char *name = NULL;
@@ -26,21 +26,20 @@ sgx_epc_backend_memory_alloc(HostMemoryBackend *backend, Error **errp)
if (!backend->size) {
error_setg(errp, "can't create backend with size 0");
- return;
+ return false;
}
fd = qemu_open_old("/dev/sgx_vepc", O_RDWR);
if (fd < 0) {
error_setg_errno(errp, errno,
"failed to open /dev/sgx_vepc to alloc SGX EPC");
- return;
+ return false;
}
name = object_get_canonical_path(OBJECT(backend));
ram_flags = (backend->share ? RAM_SHARED : 0) | RAM_PROTECTED;
- memory_region_init_ram_from_fd(&backend->mr, OBJECT(backend),
- name, backend->size, ram_flags,
- fd, 0, errp);
+ return memory_region_init_ram_from_fd(&backend->mr, OBJECT(backend), name,
+ backend->size, ram_flags, fd, 0, errp);
}
static void sgx_epc_backend_instance_init(Object *obj)
diff --git a/backends/hostmem-file.c b/backends/hostmem-file.c
index fe8c481f8f..ac3e433cbd 100644
--- a/backends/hostmem-file.c
+++ b/backends/hostmem-file.c
@@ -36,12 +36,13 @@ struct HostMemoryBackendFile {
OnOffAuto rom;
};
-static void
+static bool
file_backend_memory_alloc(HostMemoryBackend *backend, Error **errp)
{
#ifndef CONFIG_POSIX
error_setg(errp, "backend '%s' not supported on this host",
object_get_typename(OBJECT(backend)));
+ return false;
#else
HostMemoryBackendFile *fb = MEMORY_BACKEND_FILE(backend);
g_autofree gchar *name = NULL;
@@ -49,11 +50,11 @@ file_backend_memory_alloc(HostMemoryBackend *backend, Error **errp)
if (!backend->size) {
error_setg(errp, "can't create backend with size 0");
- return;
+ return false;
}
if (!fb->mem_path) {
error_setg(errp, "mem-path property not set");
- return;
+ return false;
}
switch (fb->rom) {
@@ -65,18 +66,18 @@ file_backend_memory_alloc(HostMemoryBackend *backend, Error **errp)
if (!fb->readonly) {
error_setg(errp, "property 'rom' = 'on' is not supported with"
" 'readonly' = 'off'");
- return;
+ return false;
}
break;
case ON_OFF_AUTO_OFF:
if (fb->readonly && backend->share) {
error_setg(errp, "property 'rom' = 'off' is incompatible with"
" 'readonly' = 'on' and 'share' = 'on'");
- return;
+ return false;
}
break;
default:
- assert(false);
+ g_assert_not_reached();
}
name = host_memory_backend_get_name(backend);
@@ -86,9 +87,9 @@ file_backend_memory_alloc(HostMemoryBackend *backend, Error **errp)
ram_flags |= backend->reserve ? 0 : RAM_NORESERVE;
ram_flags |= fb->is_pmem ? RAM_PMEM : 0;
ram_flags |= RAM_NAMED_FILE;
- memory_region_init_ram_from_file(&backend->mr, OBJECT(backend), name,
- backend->size, fb->align, ram_flags,
- fb->mem_path, fb->offset, errp);
+ return memory_region_init_ram_from_file(&backend->mr, OBJECT(backend), name,
+ backend->size, fb->align, ram_flags,
+ fb->mem_path, fb->offset, errp);
#endif
}
diff --git a/backends/hostmem-memfd.c b/backends/hostmem-memfd.c
index db28ab5a56..3923ea9364 100644
--- a/backends/hostmem-memfd.c
+++ b/backends/hostmem-memfd.c
@@ -31,7 +31,7 @@ struct HostMemoryBackendMemfd {
bool seal;
};
-static void
+static bool
memfd_backend_memory_alloc(HostMemoryBackend *backend, Error **errp)
{
HostMemoryBackendMemfd *m = MEMORY_BACKEND_MEMFD(backend);
@@ -41,7 +41,7 @@ memfd_backend_memory_alloc(HostMemoryBackend *backend, Error **errp)
if (!backend->size) {
error_setg(errp, "can't create backend with size 0");
- return;
+ return false;
}
fd = qemu_memfd_create(TYPE_MEMORY_BACKEND_MEMFD, backend->size,
@@ -49,14 +49,14 @@ memfd_backend_memory_alloc(HostMemoryBackend *backend, Error **errp)
F_SEAL_GROW | F_SEAL_SHRINK | F_SEAL_SEAL : 0,
errp);
if (fd == -1) {
- return;
+ return false;
}
name = host_memory_backend_get_name(backend);
ram_flags = backend->share ? RAM_SHARED : 0;
ram_flags |= backend->reserve ? 0 : RAM_NORESERVE;
- memory_region_init_ram_from_fd(&backend->mr, OBJECT(backend), name,
- backend->size, ram_flags, fd, 0, errp);
+ return memory_region_init_ram_from_fd(&backend->mr, OBJECT(backend), name,
+ backend->size, ram_flags, fd, 0, errp);
}
static bool
diff --git a/backends/hostmem-ram.c b/backends/hostmem-ram.c
index 0a670fc22a..d121249f0f 100644
--- a/backends/hostmem-ram.c
+++ b/backends/hostmem-ram.c
@@ -16,7 +16,7 @@
#include "qemu/module.h"
#include "qom/object_interfaces.h"
-static void
+static bool
ram_backend_memory_alloc(HostMemoryBackend *backend, Error **errp)
{
g_autofree char *name = NULL;
@@ -24,14 +24,15 @@ ram_backend_memory_alloc(HostMemoryBackend *backend, Error **errp)
if (!backend->size) {
error_setg(errp, "can't create backend with size 0");
- return;
+ return false;
}
name = host_memory_backend_get_name(backend);
ram_flags = backend->share ? RAM_SHARED : 0;
ram_flags |= backend->reserve ? 0 : RAM_NORESERVE;
- memory_region_init_ram_flags_nomigrate(&backend->mr, OBJECT(backend), name,
- backend->size, ram_flags, errp);
+ return memory_region_init_ram_flags_nomigrate(&backend->mr, OBJECT(backend),
+ name, backend->size,
+ ram_flags, errp);
}
static void
diff --git a/backends/hostmem.c b/backends/hostmem.c
index 1723c19165..3f8eb936d7 100644
--- a/backends/hostmem.c
+++ b/backends/hostmem.c
@@ -331,9 +331,8 @@ host_memory_backend_memory_complete(UserCreatable *uc, Error **errp)
if (!bc->alloc) {
return;
}
- bc->alloc(backend, &local_err);
- if (local_err) {
- goto out;
+ if (!bc->alloc(backend, errp)) {
+ return;
}
ptr = memory_region_get_ram_ptr(&backend->mr);
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 60/71] backends: Reduce variable scope in host_memory_backend_memory_complete
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (58 preceding siblings ...)
2024-01-05 15:42 ` [PULL 59/71] backends: Have HostMemoryBackendClass::alloc() handler return a boolean Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 61/71] util/oslib: Have qemu_prealloc_mem() handler return a boolean Philippe Mathieu-Daudé
` (11 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Manos Pitsidianakis, Gavin Shan, David Hildenbrand, Igor Mammedov
Reduce the &local_err variable use and remove the 'out:' label.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-18-philmd@linaro.org>
---
backends/hostmem.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/backends/hostmem.c b/backends/hostmem.c
index 3f8eb936d7..1b0043a0d9 100644
--- a/backends/hostmem.c
+++ b/backends/hostmem.c
@@ -324,7 +324,6 @@ host_memory_backend_memory_complete(UserCreatable *uc, Error **errp)
{
HostMemoryBackend *backend = MEMORY_BACKEND(uc);
HostMemoryBackendClass *bc = MEMORY_BACKEND_GET_CLASS(uc);
- Error *local_err = NULL;
void *ptr;
uint64_t sz;
@@ -400,15 +399,16 @@ host_memory_backend_memory_complete(UserCreatable *uc, Error **errp)
* specified NUMA policy in place.
*/
if (backend->prealloc) {
+ Error *local_err = NULL;
+
qemu_prealloc_mem(memory_region_get_fd(&backend->mr), ptr, sz,
backend->prealloc_threads,
backend->prealloc_context, &local_err);
if (local_err) {
- goto out;
+ error_propagate(errp, local_err);
+ return;
}
}
-out:
- error_propagate(errp, local_err);
}
static bool
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 61/71] util/oslib: Have qemu_prealloc_mem() handler return a boolean
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (59 preceding siblings ...)
2024-01-05 15:42 ` [PULL 60/71] backends: Reduce variable scope in host_memory_backend_memory_complete Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 62/71] misc: Simplify qemu_prealloc_mem() calls Philippe Mathieu-Daudé
` (10 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Peter Xu, Gavin Shan, Paolo Bonzini, Stefan Weil
Following the example documented since commit e3fe3988d7 ("error:
Document Error API usage rules"), have qemu_prealloc_mem()
return a boolean indicating whether an error is set or not.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-19-philmd@linaro.org>
---
include/qemu/osdep.h | 4 +++-
util/oslib-posix.c | 7 +++++--
util/oslib-win32.c | 4 +++-
3 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h
index d30ba73eda..db366d6796 100644
--- a/include/qemu/osdep.h
+++ b/include/qemu/osdep.h
@@ -678,8 +678,10 @@ typedef struct ThreadContext ThreadContext;
* memory area starting at @area with the size of @sz. After a successful call,
* each page in the area was faulted in writable at least once, for example,
* after allocating file blocks for mapped files.
+ *
+ * Return: true on success, else false setting @errp with error.
*/
-void qemu_prealloc_mem(int fd, char *area, size_t sz, int max_threads,
+bool qemu_prealloc_mem(int fd, char *area, size_t sz, int max_threads,
ThreadContext *tc, Error **errp);
/**
diff --git a/util/oslib-posix.c b/util/oslib-posix.c
index e86fd64e09..7c297003b9 100644
--- a/util/oslib-posix.c
+++ b/util/oslib-posix.c
@@ -497,7 +497,7 @@ static bool madv_populate_write_possible(char *area, size_t pagesize)
errno != EINVAL;
}
-void qemu_prealloc_mem(int fd, char *area, size_t sz, int max_threads,
+bool qemu_prealloc_mem(int fd, char *area, size_t sz, int max_threads,
ThreadContext *tc, Error **errp)
{
static gsize initialized;
@@ -506,6 +506,7 @@ void qemu_prealloc_mem(int fd, char *area, size_t sz, int max_threads,
size_t numpages = DIV_ROUND_UP(sz, hpagesize);
bool use_madv_populate_write;
struct sigaction act;
+ bool rv = true;
/*
* Sense on every invocation, as MADV_POPULATE_WRITE cannot be used for
@@ -534,7 +535,7 @@ void qemu_prealloc_mem(int fd, char *area, size_t sz, int max_threads,
qemu_mutex_unlock(&sigbus_mutex);
error_setg_errno(errp, errno,
"qemu_prealloc_mem: failed to install signal handler");
- return;
+ return false;
}
}
@@ -544,6 +545,7 @@ void qemu_prealloc_mem(int fd, char *area, size_t sz, int max_threads,
if (ret) {
error_setg_errno(errp, -ret,
"qemu_prealloc_mem: preallocating memory failed");
+ rv = false;
}
if (!use_madv_populate_write) {
@@ -555,6 +557,7 @@ void qemu_prealloc_mem(int fd, char *area, size_t sz, int max_threads,
}
qemu_mutex_unlock(&sigbus_mutex);
}
+ return rv;
}
char *qemu_get_pid_name(pid_t pid)
diff --git a/util/oslib-win32.c b/util/oslib-win32.c
index 55b0189dc3..c4a5f05a49 100644
--- a/util/oslib-win32.c
+++ b/util/oslib-win32.c
@@ -264,7 +264,7 @@ int getpagesize(void)
return system_info.dwPageSize;
}
-void qemu_prealloc_mem(int fd, char *area, size_t sz, int max_threads,
+bool qemu_prealloc_mem(int fd, char *area, size_t sz, int max_threads,
ThreadContext *tc, Error **errp)
{
int i;
@@ -274,6 +274,8 @@ void qemu_prealloc_mem(int fd, char *area, size_t sz, int max_threads,
for (i = 0; i < sz / pagesize; i++) {
memset(area + pagesize * i, 0, 1);
}
+
+ return true;
}
char *qemu_get_pid_name(pid_t pid)
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 62/71] misc: Simplify qemu_prealloc_mem() calls
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (60 preceding siblings ...)
2024-01-05 15:42 ` [PULL 61/71] util/oslib: Have qemu_prealloc_mem() handler return a boolean Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 63/71] hw: Simplify memory_region_init_ram() calls Philippe Mathieu-Daudé
` (9 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Manos Pitsidianakis, Gavin Shan, David Hildenbrand, Igor Mammedov,
Michael S. Tsirkin
Since qemu_prealloc_mem() returns whether or not an error
occured, we don't need to check the @errp pointer. Remove
local_err uses when we can return directly.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-20-philmd@linaro.org>
---
backends/hostmem.c | 22 +++++++---------------
hw/virtio/virtio-mem.c | 6 ++----
2 files changed, 9 insertions(+), 19 deletions(-)
diff --git a/backends/hostmem.c b/backends/hostmem.c
index 1b0043a0d9..30f69b2cb5 100644
--- a/backends/hostmem.c
+++ b/backends/hostmem.c
@@ -219,7 +219,6 @@ static bool host_memory_backend_get_prealloc(Object *obj, Error **errp)
static void host_memory_backend_set_prealloc(Object *obj, bool value,
Error **errp)
{
- Error *local_err = NULL;
HostMemoryBackend *backend = MEMORY_BACKEND(obj);
if (!backend->reserve && value) {
@@ -237,10 +236,8 @@ static void host_memory_backend_set_prealloc(Object *obj, bool value,
void *ptr = memory_region_get_ram_ptr(&backend->mr);
uint64_t sz = memory_region_size(&backend->mr);
- qemu_prealloc_mem(fd, ptr, sz, backend->prealloc_threads,
- backend->prealloc_context, &local_err);
- if (local_err) {
- error_propagate(errp, local_err);
+ if (!qemu_prealloc_mem(fd, ptr, sz, backend->prealloc_threads,
+ backend->prealloc_context, errp)) {
return;
}
backend->prealloc = true;
@@ -398,16 +395,11 @@ host_memory_backend_memory_complete(UserCreatable *uc, Error **errp)
* This is necessary to guarantee memory is allocated with
* specified NUMA policy in place.
*/
- if (backend->prealloc) {
- Error *local_err = NULL;
-
- qemu_prealloc_mem(memory_region_get_fd(&backend->mr), ptr, sz,
- backend->prealloc_threads,
- backend->prealloc_context, &local_err);
- if (local_err) {
- error_propagate(errp, local_err);
- return;
- }
+ if (backend->prealloc && !qemu_prealloc_mem(memory_region_get_fd(&backend->mr),
+ ptr, sz,
+ backend->prealloc_threads,
+ backend->prealloc_context, errp)) {
+ return;
}
}
diff --git a/hw/virtio/virtio-mem.c b/hw/virtio/virtio-mem.c
index dc4709790f..99ab989852 100644
--- a/hw/virtio/virtio-mem.c
+++ b/hw/virtio/virtio-mem.c
@@ -605,8 +605,7 @@ static int virtio_mem_set_block_state(VirtIOMEM *vmem, uint64_t start_gpa,
int fd = memory_region_get_fd(&vmem->memdev->mr);
Error *local_err = NULL;
- qemu_prealloc_mem(fd, area, size, 1, NULL, &local_err);
- if (local_err) {
+ if (!qemu_prealloc_mem(fd, area, size, 1, NULL, &local_err)) {
static bool warned;
/*
@@ -1249,8 +1248,7 @@ static int virtio_mem_prealloc_range_cb(VirtIOMEM *vmem, void *arg,
int fd = memory_region_get_fd(&vmem->memdev->mr);
Error *local_err = NULL;
- qemu_prealloc_mem(fd, area, size, 1, NULL, &local_err);
- if (local_err) {
+ if (!qemu_prealloc_mem(fd, area, size, 1, NULL, &local_err)) {
error_report_err(local_err);
return -ENOMEM;
}
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 63/71] hw: Simplify memory_region_init_ram() calls
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (61 preceding siblings ...)
2024-01-05 15:42 ` [PULL 62/71] misc: Simplify qemu_prealloc_mem() calls Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 64/71] hw/arm: Simplify memory_region_init_rom() calls Philippe Mathieu-Daudé
` (8 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Manos Pitsidianakis, Andrew Jeffery, Gavin Shan,
Cédric Le Goater, Peter Maydell, Joel Stanley,
Jean-Christophe Dubois, Hervé Poussineau
Mechanical change using the following coccinelle script:
@@
expression mr, owner, arg3, arg4, errp;
@@
- memory_region_init_ram(mr, owner, arg3, arg4, &errp);
if (
- errp
+ !memory_region_init_ram(mr, owner, arg3, arg4, &errp)
) {
...
return;
}
and removing the local Error variable.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au> # aspeed
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-21-philmd@linaro.org>
---
hw/arm/aspeed_ast2400.c | 6 ++----
hw/arm/aspeed_ast2600.c | 6 ++----
hw/arm/fsl-imx25.c | 6 ++----
hw/arm/fsl-imx31.c | 6 ++----
hw/arm/fsl-imx6.c | 6 ++----
hw/arm/integratorcp.c | 7 ++-----
hw/arm/nrf51_soc.c | 7 ++-----
hw/ppc/rs6000_mc.c | 7 ++-----
8 files changed, 16 insertions(+), 35 deletions(-)
diff --git a/hw/arm/aspeed_ast2400.c b/hw/arm/aspeed_ast2400.c
index a4334c81b8..0baa2ff96e 100644
--- a/hw/arm/aspeed_ast2400.c
+++ b/hw/arm/aspeed_ast2400.c
@@ -247,7 +247,6 @@ static void aspeed_ast2400_soc_realize(DeviceState *dev, Error **errp)
Aspeed2400SoCState *a = ASPEED2400_SOC(dev);
AspeedSoCState *s = ASPEED_SOC(dev);
AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s);
- Error *err = NULL;
g_autofree char *sram_name = NULL;
/* Default boot region (SPI memory or ROMs) */
@@ -276,9 +275,8 @@ static void aspeed_ast2400_soc_realize(DeviceState *dev, Error **errp)
/* SRAM */
sram_name = g_strdup_printf("aspeed.sram.%d", CPU(&a->cpu[0])->cpu_index);
- memory_region_init_ram(&s->sram, OBJECT(s), sram_name, sc->sram_size, &err);
- if (err) {
- error_propagate(errp, err);
+ if (!memory_region_init_ram(&s->sram, OBJECT(s), sram_name, sc->sram_size,
+ errp)) {
return;
}
memory_region_add_subregion(s->memory,
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
index b965fbab5e..3a9a303ab8 100644
--- a/hw/arm/aspeed_ast2600.c
+++ b/hw/arm/aspeed_ast2600.c
@@ -282,7 +282,6 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
Aspeed2600SoCState *a = ASPEED2600_SOC(dev);
AspeedSoCState *s = ASPEED_SOC(dev);
AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s);
- Error *err = NULL;
qemu_irq irq;
g_autofree char *sram_name = NULL;
@@ -355,9 +354,8 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
/* SRAM */
sram_name = g_strdup_printf("aspeed.sram.%d", CPU(&a->cpu[0])->cpu_index);
- memory_region_init_ram(&s->sram, OBJECT(s), sram_name, sc->sram_size, &err);
- if (err) {
- error_propagate(errp, err);
+ if (!memory_region_init_ram(&s->sram, OBJECT(s), sram_name, sc->sram_size,
+ errp)) {
return;
}
memory_region_add_subregion(s->memory,
diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c
index 9aabbf7f58..b15435ccaf 100644
--- a/hw/arm/fsl-imx25.c
+++ b/hw/arm/fsl-imx25.c
@@ -299,10 +299,8 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp)
&s->rom[1]);
/* initialize internal RAM (128 KB) */
- memory_region_init_ram(&s->iram, NULL, "imx25.iram", FSL_IMX25_IRAM_SIZE,
- &err);
- if (err) {
- error_propagate(errp, err);
+ if (!memory_region_init_ram(&s->iram, NULL, "imx25.iram",
+ FSL_IMX25_IRAM_SIZE, errp)) {
return;
}
memory_region_add_subregion(get_system_memory(), FSL_IMX25_IRAM_ADDR,
diff --git a/hw/arm/fsl-imx31.c b/hw/arm/fsl-imx31.c
index def27bb913..1d5dcd51e8 100644
--- a/hw/arm/fsl-imx31.c
+++ b/hw/arm/fsl-imx31.c
@@ -208,10 +208,8 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp)
&s->rom);
/* initialize internal RAM (16 KB) */
- memory_region_init_ram(&s->iram, NULL, "imx31.iram", FSL_IMX31_IRAM_SIZE,
- &err);
- if (err) {
- error_propagate(errp, err);
+ if (!memory_region_init_ram(&s->iram, NULL, "imx31.iram",
+ FSL_IMX31_IRAM_SIZE, errp)) {
return;
}
memory_region_add_subregion(get_system_memory(), FSL_IMX31_IRAM_ADDR,
diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c
index 7dc42cbfe6..58f37e7c11 100644
--- a/hw/arm/fsl-imx6.c
+++ b/hw/arm/fsl-imx6.c
@@ -443,10 +443,8 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
&s->caam);
/* OCRAM memory */
- memory_region_init_ram(&s->ocram, NULL, "imx6.ocram", FSL_IMX6_OCRAM_SIZE,
- &err);
- if (err) {
- error_propagate(errp, err);
+ if (!memory_region_init_ram(&s->ocram, NULL, "imx6.ocram",
+ FSL_IMX6_OCRAM_SIZE, errp)) {
return;
}
memory_region_add_subregion(get_system_memory(), FSL_IMX6_OCRAM_ADDR,
diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c
index e602ca5e14..1830e1d785 100644
--- a/hw/arm/integratorcp.c
+++ b/hw/arm/integratorcp.c
@@ -291,12 +291,9 @@ static void integratorcm_realize(DeviceState *d, Error **errp)
{
IntegratorCMState *s = INTEGRATOR_CM(d);
SysBusDevice *dev = SYS_BUS_DEVICE(d);
- Error *local_err = NULL;
- memory_region_init_ram(&s->flash, OBJECT(d), "integrator.flash", 0x100000,
- &local_err);
- if (local_err) {
- error_propagate(errp, local_err);
+ if (!memory_region_init_ram(&s->flash, OBJECT(d), "integrator.flash",
+ 0x100000, errp)) {
return;
}
diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c
index 34da0d62f0..ac53441630 100644
--- a/hw/arm/nrf51_soc.c
+++ b/hw/arm/nrf51_soc.c
@@ -58,7 +58,6 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp)
{
NRF51State *s = NRF51_SOC(dev_soc);
MemoryRegion *mr;
- Error *err = NULL;
uint8_t i = 0;
hwaddr base_addr = 0;
@@ -92,10 +91,8 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp)
memory_region_add_subregion_overlap(&s->container, 0, s->board_memory, -1);
- memory_region_init_ram(&s->sram, OBJECT(s), "nrf51.sram", s->sram_size,
- &err);
- if (err) {
- error_propagate(errp, err);
+ if (!memory_region_init_ram(&s->sram, OBJECT(s), "nrf51.sram", s->sram_size,
+ errp)) {
return;
}
memory_region_add_subregion(&s->container, NRF51_SRAM_BASE, &s->sram);
diff --git a/hw/ppc/rs6000_mc.c b/hw/ppc/rs6000_mc.c
index b35f8ba112..e6ec4b4c40 100644
--- a/hw/ppc/rs6000_mc.c
+++ b/hw/ppc/rs6000_mc.c
@@ -143,7 +143,6 @@ static void rs6000mc_realize(DeviceState *dev, Error **errp)
RS6000MCState *s = RS6000MC(dev);
int socket = 0;
unsigned int ram_size = s->ram_size / MiB;
- Error *local_err = NULL;
while (socket < 6) {
if (ram_size >= 64) {
@@ -165,10 +164,8 @@ static void rs6000mc_realize(DeviceState *dev, Error **errp)
if (s->simm_size[socket]) {
char name[] = "simm.?";
name[5] = socket + '0';
- memory_region_init_ram(&s->simm[socket], OBJECT(dev), name,
- s->simm_size[socket] * MiB, &local_err);
- if (local_err) {
- error_propagate(errp, local_err);
+ if (!memory_region_init_ram(&s->simm[socket], OBJECT(dev), name,
+ s->simm_size[socket] * MiB, errp)) {
return;
}
memory_region_add_subregion_overlap(get_system_memory(), 0,
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 64/71] hw/arm: Simplify memory_region_init_rom() calls
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (62 preceding siblings ...)
2024-01-05 15:42 ` [PULL 63/71] hw: Simplify memory_region_init_ram() calls Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 65/71] hw/sparc: Simplify memory_region_init_ram_nomigrate() calls Philippe Mathieu-Daudé
` (7 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Manos Pitsidianakis, Gavin Shan, Peter Maydell,
Jean-Christophe Dubois
Mechanical change using the following coccinelle script:
@@
expression mr, owner, arg3, arg4, errp;
@@
- memory_region_init_rom(mr, owner, arg3, arg4, &errp);
if (
- errp
+ !memory_region_init_rom(mr, owner, arg3, arg4, &errp)
) {
...
return;
}
and removing the local Error variable.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-22-philmd@linaro.org>
---
hw/arm/fsl-imx25.c | 13 ++++---------
hw/arm/fsl-imx31.c | 13 ++++---------
hw/arm/fsl-imx6.c | 13 ++++---------
3 files changed, 12 insertions(+), 27 deletions(-)
diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c
index b15435ccaf..9d2fb75a68 100644
--- a/hw/arm/fsl-imx25.c
+++ b/hw/arm/fsl-imx25.c
@@ -81,7 +81,6 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp)
{
FslIMX25State *s = FSL_IMX25(dev);
uint8_t i;
- Error *err = NULL;
if (!qdev_realize(DEVICE(&s->cpu), NULL, errp)) {
return;
@@ -281,18 +280,14 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp)
FSL_IMX25_WDT_IRQ));
/* initialize 2 x 16 KB ROM */
- memory_region_init_rom(&s->rom[0], OBJECT(dev), "imx25.rom0",
- FSL_IMX25_ROM0_SIZE, &err);
- if (err) {
- error_propagate(errp, err);
+ if (!memory_region_init_rom(&s->rom[0], OBJECT(dev), "imx25.rom0",
+ FSL_IMX25_ROM0_SIZE, errp)) {
return;
}
memory_region_add_subregion(get_system_memory(), FSL_IMX25_ROM0_ADDR,
&s->rom[0]);
- memory_region_init_rom(&s->rom[1], OBJECT(dev), "imx25.rom1",
- FSL_IMX25_ROM1_SIZE, &err);
- if (err) {
- error_propagate(errp, err);
+ if (!memory_region_init_rom(&s->rom[1], OBJECT(dev), "imx25.rom1",
+ FSL_IMX25_ROM1_SIZE, errp)) {
return;
}
memory_region_add_subregion(get_system_memory(), FSL_IMX25_ROM1_ADDR,
diff --git a/hw/arm/fsl-imx31.c b/hw/arm/fsl-imx31.c
index 1d5dcd51e8..c0584e4dfc 100644
--- a/hw/arm/fsl-imx31.c
+++ b/hw/arm/fsl-imx31.c
@@ -63,7 +63,6 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp)
{
FslIMX31State *s = FSL_IMX31(dev);
uint16_t i;
- Error *err = NULL;
if (!qdev_realize(DEVICE(&s->cpu), NULL, errp)) {
return;
@@ -188,20 +187,16 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp)
sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt), 0, FSL_IMX31_WDT_ADDR);
/* On a real system, the first 16k is a `secure boot rom' */
- memory_region_init_rom(&s->secure_rom, OBJECT(dev), "imx31.secure_rom",
- FSL_IMX31_SECURE_ROM_SIZE, &err);
- if (err) {
- error_propagate(errp, err);
+ if (!memory_region_init_rom(&s->secure_rom, OBJECT(dev), "imx31.secure_rom",
+ FSL_IMX31_SECURE_ROM_SIZE, errp)) {
return;
}
memory_region_add_subregion(get_system_memory(), FSL_IMX31_SECURE_ROM_ADDR,
&s->secure_rom);
/* There is also a 16k ROM */
- memory_region_init_rom(&s->rom, OBJECT(dev), "imx31.rom",
- FSL_IMX31_ROM_SIZE, &err);
- if (err) {
- error_propagate(errp, err);
+ if (!memory_region_init_rom(&s->rom, OBJECT(dev), "imx31.rom",
+ FSL_IMX31_ROM_SIZE, errp)) {
return;
}
memory_region_add_subregion(get_system_memory(), FSL_IMX31_ROM_ADDR,
diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c
index 58f37e7c11..b2153022c0 100644
--- a/hw/arm/fsl-imx6.c
+++ b/hw/arm/fsl-imx6.c
@@ -109,7 +109,6 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
MachineState *ms = MACHINE(qdev_get_machine());
FslIMX6State *s = FSL_IMX6(dev);
uint16_t i;
- Error *err = NULL;
unsigned int smp_cpus = ms->smp.cpus;
if (smp_cpus > FSL_IMX6_NUM_CPUS) {
@@ -423,20 +422,16 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
}
/* ROM memory */
- memory_region_init_rom(&s->rom, OBJECT(dev), "imx6.rom",
- FSL_IMX6_ROM_SIZE, &err);
- if (err) {
- error_propagate(errp, err);
+ if (!memory_region_init_rom(&s->rom, OBJECT(dev), "imx6.rom",
+ FSL_IMX6_ROM_SIZE, errp)) {
return;
}
memory_region_add_subregion(get_system_memory(), FSL_IMX6_ROM_ADDR,
&s->rom);
/* CAAM memory */
- memory_region_init_rom(&s->caam, OBJECT(dev), "imx6.caam",
- FSL_IMX6_CAAM_MEM_SIZE, &err);
- if (err) {
- error_propagate(errp, err);
+ if (!memory_region_init_rom(&s->caam, OBJECT(dev), "imx6.caam",
+ FSL_IMX6_CAAM_MEM_SIZE, errp)) {
return;
}
memory_region_add_subregion(get_system_memory(), FSL_IMX6_CAAM_MEM_ADDR,
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 65/71] hw/sparc: Simplify memory_region_init_ram_nomigrate() calls
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (63 preceding siblings ...)
2024-01-05 15:42 ` [PULL 64/71] hw/arm: Simplify memory_region_init_rom() calls Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 66/71] hw/misc: Simplify memory_region_init_ram_from_fd() calls Philippe Mathieu-Daudé
` (6 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Gavin Shan, Mark Cave-Ayland, Artyom Tarasenko
Mechanical change using the following coccinelle script:
@@
expression mr, owner, arg3, arg4, errp;
@@
- memory_region_init_ram_nomigrate(mr, owner, arg3, arg4, &errp);
if (
- errp
+ !memory_region_init_ram_nomigrate(mr, owner, arg3, arg4, &errp)
) {
...
return;
}
and removing the local Error variable.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-23-philmd@linaro.org>
---
hw/sparc/sun4m.c | 21 ++++++---------------
hw/sparc64/sun4u.c | 7 ++-----
2 files changed, 8 insertions(+), 20 deletions(-)
diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c
index 64895aebe3..550af01690 100644
--- a/hw/sparc/sun4m.c
+++ b/hw/sparc/sun4m.c
@@ -577,12 +577,9 @@ static void idreg_realize(DeviceState *ds, Error **errp)
{
IDRegState *s = MACIO_ID_REGISTER(ds);
SysBusDevice *dev = SYS_BUS_DEVICE(ds);
- Error *local_err = NULL;
- memory_region_init_ram_nomigrate(&s->mem, OBJECT(ds), "sun4m.idreg",
- sizeof(idreg_data), &local_err);
- if (local_err) {
- error_propagate(errp, local_err);
+ if (!memory_region_init_ram_nomigrate(&s->mem, OBJECT(ds), "sun4m.idreg",
+ sizeof(idreg_data), errp)) {
return;
}
@@ -631,12 +628,9 @@ static void afx_realize(DeviceState *ds, Error **errp)
{
AFXState *s = TCX_AFX(ds);
SysBusDevice *dev = SYS_BUS_DEVICE(ds);
- Error *local_err = NULL;
- memory_region_init_ram_nomigrate(&s->mem, OBJECT(ds), "sun4m.afx", 4,
- &local_err);
- if (local_err) {
- error_propagate(errp, local_err);
+ if (!memory_region_init_ram_nomigrate(&s->mem, OBJECT(ds), "sun4m.afx",
+ 4, errp)) {
return;
}
@@ -715,12 +709,9 @@ static void prom_realize(DeviceState *ds, Error **errp)
{
PROMState *s = OPENPROM(ds);
SysBusDevice *dev = SYS_BUS_DEVICE(ds);
- Error *local_err = NULL;
- memory_region_init_ram_nomigrate(&s->prom, OBJECT(ds), "sun4m.prom",
- PROM_SIZE_MAX, &local_err);
- if (local_err) {
- error_propagate(errp, local_err);
+ if (!memory_region_init_ram_nomigrate(&s->prom, OBJECT(ds), "sun4m.prom",
+ PROM_SIZE_MAX, errp)) {
return;
}
diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
index c871170378..24d53bf5fd 100644
--- a/hw/sparc64/sun4u.c
+++ b/hw/sparc64/sun4u.c
@@ -454,12 +454,9 @@ static void prom_realize(DeviceState *ds, Error **errp)
{
PROMState *s = OPENPROM(ds);
SysBusDevice *dev = SYS_BUS_DEVICE(ds);
- Error *local_err = NULL;
- memory_region_init_ram_nomigrate(&s->prom, OBJECT(ds), "sun4u.prom",
- PROM_SIZE_MAX, &local_err);
- if (local_err) {
- error_propagate(errp, local_err);
+ if (!memory_region_init_ram_nomigrate(&s->prom, OBJECT(ds), "sun4u.prom",
+ PROM_SIZE_MAX, errp)) {
return;
}
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 66/71] hw/misc: Simplify memory_region_init_ram_from_fd() calls
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (64 preceding siblings ...)
2024-01-05 15:42 ` [PULL 65/71] hw/sparc: Simplify memory_region_init_ram_nomigrate() calls Philippe Mathieu-Daudé
@ 2024-01-05 15:42 ` Philippe Mathieu-Daudé
2024-01-05 15:43 ` [PULL 67/71] hw/nvram: Simplify memory_region_init_rom_device() calls Philippe Mathieu-Daudé
` (5 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:42 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Manos Pitsidianakis, Gavin Shan
Mechanical change using the following coccinelle script:
@@
expression mr, owner, arg3, arg4, arg5, arg6, arg7, errp;
@@
- memory_region_init_ram_from_fd(mr, owner, arg3, arg4, arg5, arg6, arg7, &errp);
if (
- errp
+ !memory_region_init_ram_from_fd(mr, owner, arg3, arg4, arg5, arg6, arg7, &errp)
) {
...
return;
}
and removing the local Error variable.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-24-philmd@linaro.org>
---
hw/misc/ivshmem.c | 8 +++-----
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/hw/misc/ivshmem.c b/hw/misc/ivshmem.c
index 62af75e862..a2fd0bc365 100644
--- a/hw/misc/ivshmem.c
+++ b/hw/misc/ivshmem.c
@@ -476,7 +476,6 @@ static void setup_interrupt(IVShmemState *s, int vector, Error **errp)
static void process_msg_shmem(IVShmemState *s, int fd, Error **errp)
{
- Error *local_err = NULL;
struct stat buf;
size_t size;
@@ -496,10 +495,9 @@ static void process_msg_shmem(IVShmemState *s, int fd, Error **errp)
size = buf.st_size;
/* mmap the region and map into the BAR2 */
- memory_region_init_ram_from_fd(&s->server_bar2, OBJECT(s), "ivshmem.bar2",
- size, RAM_SHARED, fd, 0, &local_err);
- if (local_err) {
- error_propagate(errp, local_err);
+ if (!memory_region_init_ram_from_fd(&s->server_bar2, OBJECT(s),
+ "ivshmem.bar2", size, RAM_SHARED,
+ fd, 0, errp)) {
return;
}
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 67/71] hw/nvram: Simplify memory_region_init_rom_device() calls
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (65 preceding siblings ...)
2024-01-05 15:42 ` [PULL 66/71] hw/misc: Simplify memory_region_init_ram_from_fd() calls Philippe Mathieu-Daudé
@ 2024-01-05 15:43 ` Philippe Mathieu-Daudé
2024-01-05 15:43 ` [PULL 68/71] hw/pci-host/raven: Propagate error in raven_realize() Philippe Mathieu-Daudé
` (4 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:43 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Manos Pitsidianakis, Gavin Shan, Joel Stanley, Peter Maydell
Mechanical change using the following coccinelle script:
@@
expression mr, owner, arg3, arg4, arg5, arg6, errp;
@@
- memory_region_init_rom_device(mr, owner, arg3, arg4, arg5, arg6, &errp);
if (
- errp
+ !memory_region_init_rom_device(mr, owner, arg3, arg4, arg5, arg6, &errp)
) {
...
return;
}
and removing the local Error variable.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-25-philmd@linaro.org>
---
hw/nvram/nrf51_nvm.c | 7 ++-----
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/hw/nvram/nrf51_nvm.c b/hw/nvram/nrf51_nvm.c
index ed8b836074..73564f7e6e 100644
--- a/hw/nvram/nrf51_nvm.c
+++ b/hw/nvram/nrf51_nvm.c
@@ -336,12 +336,9 @@ static void nrf51_nvm_init(Object *obj)
static void nrf51_nvm_realize(DeviceState *dev, Error **errp)
{
NRF51NVMState *s = NRF51_NVM(dev);
- Error *err = NULL;
- memory_region_init_rom_device(&s->flash, OBJECT(dev), &flash_ops, s,
- "nrf51_soc.flash", s->flash_size, &err);
- if (err) {
- error_propagate(errp, err);
+ if (!memory_region_init_rom_device(&s->flash, OBJECT(dev), &flash_ops, s,
+ "nrf51_soc.flash", s->flash_size, errp)) {
return;
}
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 68/71] hw/pci-host/raven: Propagate error in raven_realize()
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (66 preceding siblings ...)
2024-01-05 15:43 ` [PULL 67/71] hw/nvram: Simplify memory_region_init_rom_device() calls Philippe Mathieu-Daudé
@ 2024-01-05 15:43 ` Philippe Mathieu-Daudé
2024-01-05 15:43 ` [PULL 69/71] hw/m68k/mcf5206: Embed m5206_timer_state in m5206_mbar_state Philippe Mathieu-Daudé
` (3 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:43 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Philippe Mathieu-Daudé,
Manos Pitsidianakis, Gavin Shan, Hervé Poussineau
When an Error** reference is available, it is better to
propagate local errors, rather then using generic ones,
which might terminate the whole QEMU process.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20231120213301.24349-26-philmd@linaro.org>
---
hw/pci-host/raven.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/hw/pci-host/raven.c b/hw/pci-host/raven.c
index f71d4872c8..c7a0a2878a 100644
--- a/hw/pci-host/raven.c
+++ b/hw/pci-host/raven.c
@@ -345,8 +345,10 @@ static void raven_realize(PCIDevice *d, Error **errp)
d->config[PCI_LATENCY_TIMER] = 0x10;
d->config[PCI_CAPABILITY_LIST] = 0x00;
- memory_region_init_rom_nomigrate(&s->bios, OBJECT(s), "bios", BIOS_SIZE,
- &error_fatal);
+ if (!memory_region_init_rom_nomigrate(&s->bios, OBJECT(s), "bios",
+ BIOS_SIZE, errp)) {
+ return;
+ }
memory_region_add_subregion(get_system_memory(), (uint32_t)(-BIOS_SIZE),
&s->bios);
if (s->bios_name) {
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 69/71] hw/m68k/mcf5206: Embed m5206_timer_state in m5206_mbar_state
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (67 preceding siblings ...)
2024-01-05 15:43 ` [PULL 68/71] hw/pci-host/raven: Propagate error in raven_realize() Philippe Mathieu-Daudé
@ 2024-01-05 15:43 ` Philippe Mathieu-Daudé
2024-01-05 15:43 ` [PULL 70/71] hw/net/can/sja1000: fix bug for single acceptance filter and standard frame Philippe Mathieu-Daudé
` (2 subsequent siblings)
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:43 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Thomas Huth, Mark Cave-Ayland,
Philippe Mathieu-Daudé
From: Thomas Huth <huth@tuxfamily.org>
There's no need to explicitely allocate the memory here, we can
simply embed it into the m5206_mbar_state instead.
Signed-off-by: Thomas Huth <huth@tuxfamily.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231221122939.11001-1-huth@tuxfamily.org>
---
hw/m68k/mcf5206.c | 20 ++++++++------------
1 file changed, 8 insertions(+), 12 deletions(-)
diff --git a/hw/m68k/mcf5206.c b/hw/m68k/mcf5206.c
index a46a23538d..183fd3cc08 100644
--- a/hw/m68k/mcf5206.c
+++ b/hw/m68k/mcf5206.c
@@ -148,15 +148,11 @@ static void m5206_timer_write(m5206_timer_state *s, uint32_t addr, uint32_t val)
m5206_timer_update(s);
}
-static m5206_timer_state *m5206_timer_init(qemu_irq irq)
+static void m5206_timer_init(m5206_timer_state *s, qemu_irq irq)
{
- m5206_timer_state *s;
-
- s = g_new0(m5206_timer_state, 1);
s->timer = ptimer_init(m5206_timer_trigger, s, PTIMER_POLICY_LEGACY);
s->irq = irq;
m5206_timer_reset(s);
- return s;
}
/* System Integration Module. */
@@ -167,7 +163,7 @@ typedef struct {
M68kCPU *cpu;
MemoryRegion iomem;
qemu_irq *pic;
- m5206_timer_state *timer[2];
+ m5206_timer_state timer[2];
DeviceState *uart[2];
uint8_t scr;
uint8_t icr[14];
@@ -293,9 +289,9 @@ static uint64_t m5206_mbar_read(m5206_mbar_state *s,
uint16_t offset, unsigned size)
{
if (offset >= 0x100 && offset < 0x120) {
- return m5206_timer_read(s->timer[0], offset - 0x100);
+ return m5206_timer_read(&s->timer[0], offset - 0x100);
} else if (offset >= 0x120 && offset < 0x140) {
- return m5206_timer_read(s->timer[1], offset - 0x120);
+ return m5206_timer_read(&s->timer[1], offset - 0x120);
} else if (offset >= 0x140 && offset < 0x160) {
return mcf_uart_read(s->uart[0], offset - 0x140, size);
} else if (offset >= 0x180 && offset < 0x1a0) {
@@ -333,10 +329,10 @@ static void m5206_mbar_write(m5206_mbar_state *s, uint16_t offset,
uint64_t value, unsigned size)
{
if (offset >= 0x100 && offset < 0x120) {
- m5206_timer_write(s->timer[0], offset - 0x100, value);
+ m5206_timer_write(&s->timer[0], offset - 0x100, value);
return;
} else if (offset >= 0x120 && offset < 0x140) {
- m5206_timer_write(s->timer[1], offset - 0x120, value);
+ m5206_timer_write(&s->timer[1], offset - 0x120, value);
return;
} else if (offset >= 0x140 && offset < 0x160) {
mcf_uart_write(s->uart[0], offset - 0x140, value, size);
@@ -598,8 +594,8 @@ static void mcf5206_mbar_realize(DeviceState *dev, Error **errp)
sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->iomem);
s->pic = qemu_allocate_irqs(m5206_mbar_set_irq, s, 14);
- s->timer[0] = m5206_timer_init(s->pic[9]);
- s->timer[1] = m5206_timer_init(s->pic[10]);
+ m5206_timer_init(&s->timer[0], s->pic[9]);
+ m5206_timer_init(&s->timer[1], s->pic[10]);
s->uart[0] = mcf_uart_create(s->pic[12], serial_hd(0));
s->uart[1] = mcf_uart_create(s->pic[13], serial_hd(1));
}
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 70/71] hw/net/can/sja1000: fix bug for single acceptance filter and standard frame
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (68 preceding siblings ...)
2024-01-05 15:43 ` [PULL 69/71] hw/m68k/mcf5206: Embed m5206_timer_state in m5206_mbar_state Philippe Mathieu-Daudé
@ 2024-01-05 15:43 ` Philippe Mathieu-Daudé
2024-01-05 15:43 ` [PULL 71/71] target/sparc: Simplify qemu_irq_ack Philippe Mathieu-Daudé
2024-01-05 17:05 ` [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:43 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Pavel Pisa, Grant Ramsay,
Vikram Garhwal, Jason Wang
From: Pavel Pisa <pisa@cmp.felk.cvut.cz>
A CAN sja1000 standard frame filter mask has been computed and applied
incorrectly for standard frames when single Acceptance Filter Mode
(MOD_AFM = 1) has been selected. The problem has not been found
by Linux kernel testing because it uses dual filter mode (MOD_AFM = 0)
and leaves falters fully open.
The problem has been noticed by Grant Ramsay when testing with Zephyr
RTOS which uses single filter mode.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Reported-by: Grant Ramsay <gramsay@enphaseenergy.com>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2028
Fixes: 733210e754 ("hw/net/can: SJA1000 chip register level emulation")
Message-ID: <20240103231426.5685-1-pisa@fel.cvut.cz>
---
hw/net/can/can_sja1000.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/net/can/can_sja1000.c b/hw/net/can/can_sja1000.c
index 1165d59824..6694d7bfd8 100644
--- a/hw/net/can/can_sja1000.c
+++ b/hw/net/can/can_sja1000.c
@@ -108,7 +108,7 @@ void can_sja_single_filter(struct qemu_can_filter *filter,
}
filter->can_mask = (uint32_t)amr[0] << 3;
- filter->can_mask |= (uint32_t)amr[1] << 5;
+ filter->can_mask |= (uint32_t)amr[1] >> 5;
filter->can_mask = ~filter->can_mask & QEMU_CAN_SFF_MASK;
if (!(amr[1] & 0x10)) {
filter->can_mask |= QEMU_CAN_RTR_FLAG;
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* [PULL 71/71] target/sparc: Simplify qemu_irq_ack
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (69 preceding siblings ...)
2024-01-05 15:43 ` [PULL 70/71] hw/net/can/sja1000: fix bug for single acceptance filter and standard frame Philippe Mathieu-Daudé
@ 2024-01-05 15:43 ` Philippe Mathieu-Daudé
2024-01-05 17:05 ` [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
71 siblings, 0 replies; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 15:43 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-ppc, qemu-arm, qemu-riscv, Clément Chigot,
Frederic Konrad, Philippe Mathieu-Daudé, Fabien Chouteau,
Mark Cave-Ayland, Artyom Tarasenko
From: Clément Chigot <chigot@adacore.com>
This is a simple cleanup, since env is passed to qemu_irq_ack it can be
accessed from inside qemu_irq_ack. Just drop this parameter.
Co-developed-by: Frederic Konrad <konrad.frederic@yahoo.fr>
Signed-off-by: Clément Chigot <chigot@adacore.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20240105102421.163554-7-chigot@adacore.com>
---
target/sparc/cpu.h | 2 +-
hw/sparc/leon3.c | 8 ++++----
target/sparc/int32_helper.c | 2 +-
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index 6999a10a40..12a11ecb26 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -549,7 +549,7 @@ struct CPUArchState {
sparc_def_t def;
void *irq_manager;
- void (*qemu_irq_ack)(CPUSPARCState *env, void *irq_manager, int intno);
+ void (*qemu_irq_ack)(CPUSPARCState *env, int intno);
/* Leon3 cache control */
uint32_t cache_control;
diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c
index 1e39d2e2d0..2dfb742566 100644
--- a/hw/sparc/leon3.c
+++ b/hw/sparc/leon3.c
@@ -164,9 +164,9 @@ static void leon3_cache_control_int(CPUSPARCState *env)
}
}
-static void leon3_irq_ack(void *irq_manager, int intno)
+static void leon3_irq_ack(CPUSPARCState *env, int intno)
{
- grlib_irqmp_ack((DeviceState *)irq_manager, intno);
+ grlib_irqmp_ack(env->irq_manager, intno);
}
/*
@@ -208,9 +208,9 @@ static void leon3_set_pil_in(void *opaque, int n, int level)
}
}
-static void leon3_irq_manager(CPUSPARCState *env, void *irq_manager, int intno)
+static void leon3_irq_manager(CPUSPARCState *env, int intno)
{
- leon3_irq_ack(irq_manager, intno);
+ leon3_irq_ack(env, intno);
leon3_cache_control_int(env);
}
diff --git a/target/sparc/int32_helper.c b/target/sparc/int32_helper.c
index 1563613582..8f4e08ed09 100644
--- a/target/sparc/int32_helper.c
+++ b/target/sparc/int32_helper.c
@@ -160,7 +160,7 @@ void sparc_cpu_do_interrupt(CPUState *cs)
#if !defined(CONFIG_USER_ONLY)
/* IRQ acknowledgment */
if ((intno & ~15) == TT_EXTINT && env->qemu_irq_ack != NULL) {
- env->qemu_irq_ack(env, env->irq_manager, intno);
+ env->qemu_irq_ack(env, intno);
}
#endif
}
--
2.41.0
^ permalink raw reply related [flat|nested] 76+ messages in thread
* Re: [PULL 00/71] HW core patches for 2024-01-05
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
` (70 preceding siblings ...)
2024-01-05 15:43 ` [PULL 71/71] target/sparc: Simplify qemu_irq_ack Philippe Mathieu-Daudé
@ 2024-01-05 17:05 ` Philippe Mathieu-Daudé
2024-01-05 18:43 ` Peter Maydell
71 siblings, 1 reply; 76+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-05 17:05 UTC (permalink / raw)
To: qemu-devel, Peter Maydell; +Cc: qemu-ppc, qemu-arm, qemu-riscv
On 5/1/24 16:41, Philippe Mathieu-Daudé wrote:
> The following changes since commit 05470c3979d5485003e129ff4b0c2ef98af91d86:
>
> Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging (2024-01-04 19:55:20 +0000)
>
> are available in the Git repository at:
>
> https://github.com/philmd/qemu.git tags/hw-cpus-20240105
>
> for you to fetch changes up to a318da6b3f6a88e6cfd6953c519def9457e8962f:
>
> target/sparc: Simplify qemu_irq_ack (2024-01-05 16:20:15 +0100)
>
> ----------------------------------------------------------------
> HW core patch queue
>
> - Unify CPU QOM type checks (Gavin)
> - Simplify uses of some CPU related property (Philippe)
> (start-powered-off, ARM reset-cbar and mp-affinity)
> - Header and documentation cleanups (Zhao, Philippe)
> - Have Memory API return boolean indicating possible error
> - Fix frame filter mask in CAN sja1000 model (Pavel)
> - QOM embed MCF5206 timer into SoC (Thomas)
> - Simplify LEON3 qemu_irq_ack handler (Clément)
>
> ----------------------------------------------------------------
> Philippe Mathieu-Daudé (37):
> backends: Simplify host_memory_backend_memory_complete()
I neglected to run checkpatch.pl on this patch, so it lacks:
-- >8 --
diff --git a/backends/hostmem.c b/backends/hostmem.c
index 30f69b2cb5..987f6f591e 100644
--- a/backends/hostmem.c
+++ b/backends/hostmem.c
@@ -346,5 +346,7 @@ host_memory_backend_memory_complete(UserCreatable
*uc, Error **errp)
unsigned long maxnode = (lastbit + 1) % (MAX_NODES + 1);
- /* ensure policy won't be ignored in case memory is preallocated
+ /*
+ * Ensure policy won't be ignored in case memory is preallocated
* before mbind(). note: MPOL_MF_STRICT is ignored on hugepages so
- * this doesn't catch hugepage case. */
+ * this doesn't catch hugepage case.
+ */
unsigned flags = MPOL_MF_STRICT | MPOL_MF_MOVE;
@@ -365,3 +367,4 @@ host_memory_backend_memory_complete(UserCreatable
*uc, Error **errp)
- /* We can have up to MAX_NODES nodes, but we need to pass maxnode+1
+ /*
+ * We can have up to MAX_NODES nodes, but we need to pass maxnode+1
* as argument to mbind() due to an old Linux bug (feature?) which
@@ -393,3 +396,4 @@ host_memory_backend_memory_complete(UserCreatable
*uc, Error **errp)
#endif
- /* Preallocate memory after the NUMA policy has been instantiated.
+ /*
+ * Preallocate memory after the NUMA policy has been instantiated.
* This is necessary to guarantee memory is allocated with
---
Since the PR is already in the testing pipeline:
- if it get merged, I'll send a cleanup patch
- otherwise if it fails I'll fix it.
Sorry for missing that.
Phil.
^ permalink raw reply related [flat|nested] 76+ messages in thread
* Re: [PULL 00/71] HW core patches for 2024-01-05
2024-01-05 17:05 ` [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
@ 2024-01-05 18:43 ` Peter Maydell
0 siblings, 0 replies; 76+ messages in thread
From: Peter Maydell @ 2024-01-05 18:43 UTC (permalink / raw)
To: Philippe Mathieu-Daudé; +Cc: qemu-devel, qemu-ppc, qemu-arm, qemu-riscv
On Fri, 5 Jan 2024 at 17:05, Philippe Mathieu-Daudé <philmd@linaro.org> wrote:
>
> On 5/1/24 16:41, Philippe Mathieu-Daudé wrote:
> > The following changes since commit 05470c3979d5485003e129ff4b0c2ef98af91d86:
> >
> > Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging (2024-01-04 19:55:20 +0000)
> >
> > are available in the Git repository at:
> >
> > https://github.com/philmd/qemu.git tags/hw-cpus-20240105
> >
> > for you to fetch changes up to a318da6b3f6a88e6cfd6953c519def9457e8962f:
> >
> > target/sparc: Simplify qemu_irq_ack (2024-01-05 16:20:15 +0100)
> >
> > ----------------------------------------------------------------
> > HW core patch queue
> >
> > - Unify CPU QOM type checks (Gavin)
> > - Simplify uses of some CPU related property (Philippe)
> > (start-powered-off, ARM reset-cbar and mp-affinity)
> > - Header and documentation cleanups (Zhao, Philippe)
> > - Have Memory API return boolean indicating possible error
> > - Fix frame filter mask in CAN sja1000 model (Pavel)
> > - QOM embed MCF5206 timer into SoC (Thomas)
> > - Simplify LEON3 qemu_irq_ack handler (Clément)
> >
> > ----------------------------------------------------------------
>
>
> > Philippe Mathieu-Daudé (37):
>
> > backends: Simplify host_memory_backend_memory_complete()
>
> I neglected to run checkpatch.pl on this patch, so it lacks:
>
> -- >8 --
> diff --git a/backends/hostmem.c b/backends/hostmem.c
> index 30f69b2cb5..987f6f591e 100644
> --- a/backends/hostmem.c
> +++ b/backends/hostmem.c
> @@ -346,5 +346,7 @@ host_memory_backend_memory_complete(UserCreatable
> *uc, Error **errp)
> unsigned long maxnode = (lastbit + 1) % (MAX_NODES + 1);
> - /* ensure policy won't be ignored in case memory is preallocated
> + /*
> + * Ensure policy won't be ignored in case memory is preallocated
> * before mbind(). note: MPOL_MF_STRICT is ignored on hugepages so
> - * this doesn't catch hugepage case. */
> + * this doesn't catch hugepage case.
> + */
> unsigned flags = MPOL_MF_STRICT | MPOL_MF_MOVE;
> @@ -365,3 +367,4 @@ host_memory_backend_memory_complete(UserCreatable
> *uc, Error **errp)
>
> - /* We can have up to MAX_NODES nodes, but we need to pass maxnode+1
> + /*
> + * We can have up to MAX_NODES nodes, but we need to pass maxnode+1
> * as argument to mbind() due to an old Linux bug (feature?) which
> @@ -393,3 +396,4 @@ host_memory_backend_memory_complete(UserCreatable
> *uc, Error **errp)
> #endif
> - /* Preallocate memory after the NUMA policy has been instantiated.
> + /*
> + * Preallocate memory after the NUMA policy has been instantiated.
> * This is necessary to guarantee memory is allocated with
> ---
>
> Since the PR is already in the testing pipeline:
> - if it get merged, I'll send a cleanup patch
> - otherwise if it fails I'll fix it.
It just passed the last CI job on a retry, so please send a
followup patch.
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/9.0
for any user-visible changes.
-- PMM
^ permalink raw reply [flat|nested] 76+ messages in thread
* Re: [PULL 29/71] hw/arm/virt: Check CPU type in machine_run_board_init()
2024-01-05 15:42 ` [PULL 29/71] hw/arm/virt: Check CPU type in machine_run_board_init() Philippe Mathieu-Daudé
@ 2024-01-09 14:33 ` Peter Maydell
2024-01-11 6:02 ` Gavin Shan
0 siblings, 1 reply; 76+ messages in thread
From: Peter Maydell @ 2024-01-09 14:33 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, qemu-ppc, qemu-arm, qemu-riscv, Gavin Shan,
Richard Henderson
On Fri, 5 Jan 2024 at 15:46, Philippe Mathieu-Daudé <philmd@linaro.org> wrote:
>
> From: Gavin Shan <gshan@redhat.com>
>
> Set mc->valid_cpu_types so that the user specified CPU type can be
> validated in machine_run_board_init(). We needn't to do the check
> by ourselves.
Hi; after this change if you try to use the 'virt' board from
qemu-system-arm with an invalid CPU type you get an odd
error message full of "(null)"s:
$ ./build/x86/qemu-system-arm -machine virt -cpu cortex-a9
qemu-system-arm: Invalid CPU model: cortex-a9
The valid models are: cortex-a7, cortex-a15, (null), (null), (null),
(null), (null), (null), (null), (null), (null), (null), (null), max
This seems to be because we print a "(null)" for every 64-bit
only CPU in the list, instead of either ignoring them or not
compiling them into the list in the first place.
https://gitlab.com/qemu-project/qemu/-/issues/2084
thanks
-- PMM
^ permalink raw reply [flat|nested] 76+ messages in thread
* Re: [PULL 29/71] hw/arm/virt: Check CPU type in machine_run_board_init()
2024-01-09 14:33 ` Peter Maydell
@ 2024-01-11 6:02 ` Gavin Shan
0 siblings, 0 replies; 76+ messages in thread
From: Gavin Shan @ 2024-01-11 6:02 UTC (permalink / raw)
To: Peter Maydell, Philippe Mathieu-Daudé
Cc: qemu-devel, qemu-ppc, qemu-arm, qemu-riscv, Richard Henderson
Hi Peter,
On 1/10/24 00:33, Peter Maydell wrote:
> On Fri, 5 Jan 2024 at 15:46, Philippe Mathieu-Daudé <philmd@linaro.org> wrote:
>>
>> From: Gavin Shan <gshan@redhat.com>
>>
>> Set mc->valid_cpu_types so that the user specified CPU type can be
>> validated in machine_run_board_init(). We needn't to do the check
>> by ourselves.
>
> Hi; after this change if you try to use the 'virt' board from
> qemu-system-arm with an invalid CPU type you get an odd
> error message full of "(null)"s:
>
> $ ./build/x86/qemu-system-arm -machine virt -cpu cortex-a9
> qemu-system-arm: Invalid CPU model: cortex-a9
> The valid models are: cortex-a7, cortex-a15, (null), (null), (null),
> (null), (null), (null), (null), (null), (null), (null), (null), max
>
> This seems to be because we print a "(null)" for every 64-bit
> only CPU in the list, instead of either ignoring them or not
> compiling them into the list in the first place.
>
> https://gitlab.com/qemu-project/qemu/-/issues/2084
>
Yes, it's because all 64-bits CPUs aren't available to 'qemu-system-arm'.
I've sent a fix for it. Please take a look when getting a chance.
https://lists.nongnu.org/archive/html/qemu-arm/2024-01/msg00531.html
Thanks,
Gavin
^ permalink raw reply [flat|nested] 76+ messages in thread
end of thread, other threads:[~2024-01-11 6:03 UTC | newest]
Thread overview: 76+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-01-05 15:41 [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
2024-01-05 15:41 ` [PULL 01/71] meson: Allow building binary with no target-specific files in hw/ Philippe Mathieu-Daudé
2024-01-05 15:41 ` [PULL 02/71] target/alpha: Remove fallback to ev67 cpu class Philippe Mathieu-Daudé
2024-01-05 15:41 ` [PULL 03/71] target/hppa: Remove object_class_is_abstract() Philippe Mathieu-Daudé
2024-01-05 15:41 ` [PULL 04/71] cpu: Call object_class_dynamic_cast() once in cpu_class_by_name() Philippe Mathieu-Daudé
2024-01-05 15:41 ` [PULL 05/71] cpu: Add helper cpu_model_from_type() Philippe Mathieu-Daudé
2024-01-05 15:41 ` [PULL 06/71] cpu: Add generic cpu_list() Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 07/71] target/alpha: Use " Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 08/71] target/arm: " Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 09/71] target/avr: " Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 10/71] target/cris: " Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 11/71] target/hexagon: " Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 12/71] target/hppa: " Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 13/71] target/loongarch: " Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 14/71] target/m68k: " Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 15/71] target/mips: " Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 16/71] target/openrisc: " Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 17/71] target/riscv: " Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 18/71] target/rx: " Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 19/71] target/sh4: " Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 20/71] target/tricore: " Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 21/71] target/xtensa: " Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 22/71] target: Use generic cpu_model_from_type() Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 23/71] hw/core: Add machine_class_default_cpu_type() Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 24/71] machine: Use error handling when CPU type is checked Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 25/71] machine: Introduce helper is_cpu_type_supported() Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 26/71] machine: Improve is_cpu_type_supported() Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 27/71] machine: Print CPU model name instead of CPU type Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 28/71] hw/arm/virt: Hide host CPU model for tcg Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 29/71] hw/arm/virt: Check CPU type in machine_run_board_init() Philippe Mathieu-Daudé
2024-01-09 14:33 ` Peter Maydell
2024-01-11 6:02 ` Gavin Shan
2024-01-05 15:42 ` [PULL 30/71] hw/arm/sbsa-ref: " Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 31/71] hw/arm: " Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 32/71] hw/riscv/shakti_c: " Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 33/71] hw/core/cpu: Remove final vestiges of dynamic state tracing Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 34/71] hw/core/cpu: Update description of CPUState::node Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 35/71] hw/cpu/core: Cleanup unused included header in core.c Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 36/71] hw/cpu/cluster: Cleanup unused included header in cluster.c Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 37/71] hw/audio/sb16: Do not migrate qdev properties Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 38/71] hw/arm/bcm2836: Simplify use of 'reset-cbar' property Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 39/71] hw/arm/bcm2836: Use ARM_CPU 'mp-affinity' property Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 40/71] hw/ppc/spapr_cpu_core: Access QDev properties with proper API Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 41/71] hw: Simplify accesses to the CPUState::'start-powered-off' property Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 42/71] hw/ppc/xive2_regs: Remove unnecessary 'cpu.h' inclusion Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 43/71] hw/mips: Inline 'bios.h' definitions Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 44/71] memory: Have memory_region_init_ram_flags_nomigrate() return a boolean Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 45/71] memory: Have memory_region_init_ram_nomigrate() handler " Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 46/71] memory: Have memory_region_init_rom_nomigrate() " Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 47/71] memory: Simplify memory_region_init_rom_nomigrate() calls Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 48/71] memory: Simplify memory_region_init_ram_from_fd() calls Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 49/71] memory: Have memory_region_init_ram() handler return a boolean Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 50/71] memory: Have memory_region_init_rom() " Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 51/71] memory: Have memory_region_init_rom_device_nomigrate() " Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 52/71] memory: Simplify memory_region_init_rom_device_nomigrate() calls Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 53/71] memory: Have memory_region_init_rom_device() handler return a boolean Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 54/71] memory: Have memory_region_init_resizeable_ram() " Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 55/71] memory: Have memory_region_init_ram_from_file() handler " Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 56/71] memory: Have memory_region_init_ram_from_fd() " Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 57/71] backends: Use g_autofree in HostMemoryBackendClass::alloc() handlers Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 58/71] backends: Simplify host_memory_backend_memory_complete() Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 59/71] backends: Have HostMemoryBackendClass::alloc() handler return a boolean Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 60/71] backends: Reduce variable scope in host_memory_backend_memory_complete Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 61/71] util/oslib: Have qemu_prealloc_mem() handler return a boolean Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 62/71] misc: Simplify qemu_prealloc_mem() calls Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 63/71] hw: Simplify memory_region_init_ram() calls Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 64/71] hw/arm: Simplify memory_region_init_rom() calls Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 65/71] hw/sparc: Simplify memory_region_init_ram_nomigrate() calls Philippe Mathieu-Daudé
2024-01-05 15:42 ` [PULL 66/71] hw/misc: Simplify memory_region_init_ram_from_fd() calls Philippe Mathieu-Daudé
2024-01-05 15:43 ` [PULL 67/71] hw/nvram: Simplify memory_region_init_rom_device() calls Philippe Mathieu-Daudé
2024-01-05 15:43 ` [PULL 68/71] hw/pci-host/raven: Propagate error in raven_realize() Philippe Mathieu-Daudé
2024-01-05 15:43 ` [PULL 69/71] hw/m68k/mcf5206: Embed m5206_timer_state in m5206_mbar_state Philippe Mathieu-Daudé
2024-01-05 15:43 ` [PULL 70/71] hw/net/can/sja1000: fix bug for single acceptance filter and standard frame Philippe Mathieu-Daudé
2024-01-05 15:43 ` [PULL 71/71] target/sparc: Simplify qemu_irq_ack Philippe Mathieu-Daudé
2024-01-05 17:05 ` [PULL 00/71] HW core patches for 2024-01-05 Philippe Mathieu-Daudé
2024-01-05 18:43 ` Peter Maydell
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