From: Bernhard Beschow <shentey@gmail.com>
To: qemu-devel@nongnu.org
Cc: "Michael S. Tsirkin" <mst@redhat.com>,
"Eduardo Habkost" <eduardo@habkost.net>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Bernhard Beschow" <shentey@gmail.com>,
"Alex Bennée" <alex.bennee@linaro.org>
Subject: [PATCH v2 3/3] target/i386/cpu: Fix typo in comment
Date: Sat, 6 Jan 2024 14:25:46 +0100 [thread overview]
Message-ID: <20240106132546.21248-4-shentey@gmail.com> (raw)
In-Reply-To: <20240106132546.21248-1-shentey@gmail.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
---
target/i386/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 2524881ce2..7d11edf4fa 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -2178,7 +2178,7 @@ static const CPUCaches epyc_genoa_cache_info = {
* Conceal VM entries from PT
* Enable ENCLS exiting
* Mode-based execute control (XS/XU)
- s TSC scaling (Skylake Server and newer)
+ * TSC scaling (Skylake Server and newer)
* GPA translation for PT (IceLake and newer)
* User wait and pause
* ENCLV exiting
--
2.43.0
next prev parent reply other threads:[~2024-01-06 13:27 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-06 13:25 [PATCH v2 0/3] Fix PIC interrupt handling of x86 CPUs if APIC is globally disabled Bernhard Beschow
2024-01-06 13:25 ` [PATCH v2 1/3] hw/i386/x86: Reverse if statement Bernhard Beschow
2024-01-06 13:25 ` [PATCH v2 2/3] hw/i386/x86: Fix PIC interrupt handling if APIC is globally disabled Bernhard Beschow
2024-01-06 13:25 ` Bernhard Beschow [this message]
2024-01-14 10:52 ` [PATCH v2 0/3] Fix PIC interrupt handling of x86 CPUs " Bernhard Beschow
2024-01-14 10:55 ` Michael S. Tsirkin
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