* [PATCH 0/2] acpi/tests/avocado/bits: disable smilatency tests @ 2024-01-08 10:36 Ani Sinha 2024-01-08 10:36 ` [PATCH 1/2] acpi/tests/avocado/bits: import smilatency test from bits in order to disable it Ani Sinha ` (2 more replies) 0 siblings, 3 replies; 7+ messages in thread From: Ani Sinha @ 2024-01-08 10:36 UTC (permalink / raw) Cc: Ani Sinha, peter.maydell, crosa, philmd, bleal, mst, wainersm, qemu-devel Import smilatency test from bios-bits and disable it. It is causing some flakyness and occassional failures in bios-bits avocado tests. Please see ticket https://gitlab.com/qemu-project/qemu/-/issues/2077 CC: peter.maydell@linaro.org CC: crosa@redhat.com CC: philmd@linaro.org CC: bleal@redhat.com CC: mst@redhat.com CC: wainersm@redhat.com CC: qemu-devel@nongnu.org Ani Sinha (2): acpi/tests/avocado/bits: import smilatency test from bits in order to disable it acpi/tests/avocado/bits: disable smilatency tests .../acpi-bits/bits-tests/smilatency.py2 | 107 ++++++++++++++++++ 1 file changed, 107 insertions(+) create mode 100644 tests/avocado/acpi-bits/bits-tests/smilatency.py2 -- 2.42.0 ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 1/2] acpi/tests/avocado/bits: import smilatency test from bits in order to disable it 2024-01-08 10:36 [PATCH 0/2] acpi/tests/avocado/bits: disable smilatency tests Ani Sinha @ 2024-01-08 10:36 ` Ani Sinha 2024-01-08 10:36 ` [PATCH 2/2] acpi/tests/avocado/bits: disable smilatency tests Ani Sinha 2024-01-09 14:26 ` [PATCH 0/2] " Peter Maydell 2 siblings, 0 replies; 7+ messages in thread From: Ani Sinha @ 2024-01-08 10:36 UTC (permalink / raw) To: Cleber Rosa, Philippe Mathieu-Daudé, Wainer dos Santos Moschetta, Beraldo Leal Cc: Ani Sinha, peter.maydell, mst, qemu-devel Add smilatency test script in the bits avocado tests from bios-bits. No changes have been made to the original test script. The test will be disabled in the subsequent patch. CC: peter.maydell@linaro.org CC: crosa@redhat.com CC: philmd@linaro.org CC: bleal@redhat.com CC: mst@redhat.com CC: wainersm@redhat.com Signed-off-by: Ani Sinha <anisinha@redhat.com> --- .../acpi-bits/bits-tests/smilatency.py2 | 106 ++++++++++++++++++ 1 file changed, 106 insertions(+) create mode 100644 tests/avocado/acpi-bits/bits-tests/smilatency.py2 diff --git a/tests/avocado/acpi-bits/bits-tests/smilatency.py2 b/tests/avocado/acpi-bits/bits-tests/smilatency.py2 new file mode 100644 index 0000000000..48083bfb0d --- /dev/null +++ b/tests/avocado/acpi-bits/bits-tests/smilatency.py2 @@ -0,0 +1,106 @@ +# Copyright (c) 2015, Intel Corporation +# All rights reserved. +# +# SPDX-License-Identifier: BSD-3-Clause + +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# +# * Redistributions of source code must retain the above copyright notice, +# this list of conditions and the following disclaimer. +# * Redistributions in binary form must reproduce the above copyright notice, +# this list of conditions and the following disclaimer in the documentation +# and/or other materials provided with the distribution. +# * Neither the name of Intel Corporation nor the names of its contributors +# may be used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +# ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +# ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +# This script runs only from the biosbits VM. + +"""SMI latency test.""" + +import bits +from collections import namedtuple +import testsuite +import time +import usb + +def register_tests(): + testsuite.add_test("SMI latency test", smi_latency); + testsuite.add_test("SMI latency test with USB disabled via BIOS handoff", test_with_usb_disabled, runall=False); + +def smi_latency(): + MSR_SMI_COUNT = 0x34 + + print "Warning: touching the keyboard can affect the results of this test." + + tsc_per_sec = bits.tsc_per_sec() + tsc_per_usec = tsc_per_sec / (1000 * 1000) + bins = [long(tsc_per_usec * 10**i) for i in range(9)] + bin_descs = [ + "0 < t <= 1us", + "1us < t <= 10us", + "10us < t <= 100us", + "100us < t <= 1ms", + "1ms < t <= 10ms", + "10ms < t <= 100ms", + "100ms < t <= 1s ", + "1s < t <= 10s ", + "10s < t <= 100s ", + "100s < t ", + ] + + print "Starting test. Wait here, I will be back in 15 seconds." + (max_latency, smi_count_delta, bins) = bits.smi_latency(long(15 * tsc_per_sec), bins) + BinType = namedtuple('BinType', ("max", "total", "count", "times")) + bins = [BinType(*b) for b in bins] + + testsuite.test("SMI latency < 150us to minimize risk of OS timeouts", max_latency / tsc_per_usec <= 150) + if not testsuite.show_detail(): + return + + for bin, desc in zip(bins, bin_descs): + if bin.count == 0: + continue + testsuite.print_detail("{}; average = {}; count = {}".format(desc, bits.format_tsc(bin.total/bin.count), bin.count)) + deltas = (bits.format_tsc(t2 - t1) for t1,t2 in zip(bin.times, bin.times[1:])) + testsuite.print_detail(" Times between first few observations: {}".format(" ".join("{:>6}".format(delta) for delta in deltas))) + + if smi_count_delta is not None: + testsuite.print_detail("{} SMI detected using MSR_SMI_COUNT (MSR {:#x})".format(smi_count_delta, MSR_SMI_COUNT)) + + testsuite.print_detail("Summary of impact: observed maximum latency = {}".format(bits.format_tsc(max_latency))) + +def test_with_usb_disabled(): + if usb.handoff_to_os(): + smi_latency() + +def average_io_smi(port, value, count): + def f(): + tsc_start = bits.rdtsc() + bits.outb(port, value) + return bits.rdtsc() - tsc_start + counts = [f() for i in range(count)] + return sum(counts)/len(counts) + +def time_io_smi(port=0xb2, value=0, count=1000): + count_for_estimate = 10 + start = time.time() + average_io_smi(port, value, count_for_estimate) + avg10 = time.time() - start + estimate = avg10 * count/count_for_estimate + if estimate > 1: + print "Running test, estimated time: {}s".format(int(estimate)) + average = average_io_smi(port, value, count) + print "Average of {} SMIs (via outb, port={:#x}, value={:#x}): {}".format(count, port, value, bits.format_tsc(average)) -- 2.42.0 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 2/2] acpi/tests/avocado/bits: disable smilatency tests 2024-01-08 10:36 [PATCH 0/2] acpi/tests/avocado/bits: disable smilatency tests Ani Sinha 2024-01-08 10:36 ` [PATCH 1/2] acpi/tests/avocado/bits: import smilatency test from bits in order to disable it Ani Sinha @ 2024-01-08 10:36 ` Ani Sinha 2024-01-09 14:26 ` [PATCH 0/2] " Peter Maydell 2 siblings, 0 replies; 7+ messages in thread From: Ani Sinha @ 2024-01-08 10:36 UTC (permalink / raw) To: Cleber Rosa, Philippe Mathieu-Daudé, Wainer dos Santos Moschetta, Beraldo Leal Cc: Ani Sinha, peter.maydell, mst, qemu-devel smilatncy tests in bios bits seems to generate some flakyness in running the bits avocado tests. Disable them for now. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2077 CC: peter.maydell@linaro.org CC: crosa@redhat.com CC: philmd@linaro.org CC: bleal@redhat.com CC: mst@redhat.com CC: wainersm@redhat.com Signed-off-by: Ani Sinha <anisinha@redhat.com> --- tests/avocado/acpi-bits/bits-tests/smilatency.py2 | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/tests/avocado/acpi-bits/bits-tests/smilatency.py2 b/tests/avocado/acpi-bits/bits-tests/smilatency.py2 index 48083bfb0d..405af67e19 100644 --- a/tests/avocado/acpi-bits/bits-tests/smilatency.py2 +++ b/tests/avocado/acpi-bits/bits-tests/smilatency.py2 @@ -37,8 +37,9 @@ import time import usb def register_tests(): - testsuite.add_test("SMI latency test", smi_latency); - testsuite.add_test("SMI latency test with USB disabled via BIOS handoff", test_with_usb_disabled, runall=False); + pass +# testsuite.add_test("SMI latency test", smi_latency); +# testsuite.add_test("SMI latency test with USB disabled via BIOS handoff", test_with_usb_disabled, runall=False); def smi_latency(): MSR_SMI_COUNT = 0x34 -- 2.42.0 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 0/2] acpi/tests/avocado/bits: disable smilatency tests 2024-01-08 10:36 [PATCH 0/2] acpi/tests/avocado/bits: disable smilatency tests Ani Sinha 2024-01-08 10:36 ` [PATCH 1/2] acpi/tests/avocado/bits: import smilatency test from bits in order to disable it Ani Sinha 2024-01-08 10:36 ` [PATCH 2/2] acpi/tests/avocado/bits: disable smilatency tests Ani Sinha @ 2024-01-09 14:26 ` Peter Maydell 2 siblings, 0 replies; 7+ messages in thread From: Peter Maydell @ 2024-01-09 14:26 UTC (permalink / raw) To: Ani Sinha; +Cc: crosa, philmd, bleal, mst, wainersm, qemu-devel On Mon, 8 Jan 2024 at 10:36, Ani Sinha <anisinha@redhat.com> wrote: > > Import smilatency test from bios-bits and disable it. It is causing some > flakyness and occassional failures in bios-bits avocado tests. > Please see ticket https://gitlab.com/qemu-project/qemu/-/issues/2077 Thanks, I've applied these directly to master in the hope of fixing the CI flakiness. This test seemed to be failing on almost every pullreq, so the fact I didn't see an issue with it when applying these is a promising sign. I'll keep an eye out for whether it still turns up as a failure in future. -- PMM ^ permalink raw reply [flat|nested] 7+ messages in thread
[parent not found: <20240108103439.4369-1-anisinha@redhat.com>]
* [PATCH 1/2] acpi/tests/avocado/bits: import smilatency test from bits in order to disable it [not found] <20240108103439.4369-1-anisinha@redhat.com> @ 2024-01-08 10:34 ` Ani Sinha 2024-01-08 10:58 ` Peter Maydell 0 siblings, 1 reply; 7+ messages in thread From: Ani Sinha @ 2024-01-08 10:34 UTC (permalink / raw) To: Cleber Rosa, Philippe Mathieu-Daudé, Wainer dos Santos Moschetta, Beraldo Leal Cc: Ani Sinha, peter.maydell, mst, qemu-devel Add smilatency test script in the bits avocado tests from bios-bits. No changes have been made to the original test script. The test will be disabled in the subsequent patch. CC: peter.maydell@linaro.org CC: crosa@redhat.com CC: philmd@linaro.org CC: bleal@redhat.com CC: mst@redhat.com CC: wainersm@redhat.com Signed-off-by: Ani Sinha <anisinha@redhat.com> --- .../acpi-bits/bits-tests/smilatency.py2 | 106 ++++++++++++++++++ 1 file changed, 106 insertions(+) create mode 100644 tests/avocado/acpi-bits/bits-tests/smilatency.py2 diff --git a/tests/avocado/acpi-bits/bits-tests/smilatency.py2 b/tests/avocado/acpi-bits/bits-tests/smilatency.py2 new file mode 100644 index 0000000000..48083bfb0d --- /dev/null +++ b/tests/avocado/acpi-bits/bits-tests/smilatency.py2 @@ -0,0 +1,106 @@ +# Copyright (c) 2015, Intel Corporation +# All rights reserved. +# +# SPDX-License-Identifier: BSD-3-Clause + +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# +# * Redistributions of source code must retain the above copyright notice, +# this list of conditions and the following disclaimer. +# * Redistributions in binary form must reproduce the above copyright notice, +# this list of conditions and the following disclaimer in the documentation +# and/or other materials provided with the distribution. +# * Neither the name of Intel Corporation nor the names of its contributors +# may be used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +# ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +# ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +# This script runs only from the biosbits VM. + +"""SMI latency test.""" + +import bits +from collections import namedtuple +import testsuite +import time +import usb + +def register_tests(): + testsuite.add_test("SMI latency test", smi_latency); + testsuite.add_test("SMI latency test with USB disabled via BIOS handoff", test_with_usb_disabled, runall=False); + +def smi_latency(): + MSR_SMI_COUNT = 0x34 + + print "Warning: touching the keyboard can affect the results of this test." + + tsc_per_sec = bits.tsc_per_sec() + tsc_per_usec = tsc_per_sec / (1000 * 1000) + bins = [long(tsc_per_usec * 10**i) for i in range(9)] + bin_descs = [ + "0 < t <= 1us", + "1us < t <= 10us", + "10us < t <= 100us", + "100us < t <= 1ms", + "1ms < t <= 10ms", + "10ms < t <= 100ms", + "100ms < t <= 1s ", + "1s < t <= 10s ", + "10s < t <= 100s ", + "100s < t ", + ] + + print "Starting test. Wait here, I will be back in 15 seconds." + (max_latency, smi_count_delta, bins) = bits.smi_latency(long(15 * tsc_per_sec), bins) + BinType = namedtuple('BinType', ("max", "total", "count", "times")) + bins = [BinType(*b) for b in bins] + + testsuite.test("SMI latency < 150us to minimize risk of OS timeouts", max_latency / tsc_per_usec <= 150) + if not testsuite.show_detail(): + return + + for bin, desc in zip(bins, bin_descs): + if bin.count == 0: + continue + testsuite.print_detail("{}; average = {}; count = {}".format(desc, bits.format_tsc(bin.total/bin.count), bin.count)) + deltas = (bits.format_tsc(t2 - t1) for t1,t2 in zip(bin.times, bin.times[1:])) + testsuite.print_detail(" Times between first few observations: {}".format(" ".join("{:>6}".format(delta) for delta in deltas))) + + if smi_count_delta is not None: + testsuite.print_detail("{} SMI detected using MSR_SMI_COUNT (MSR {:#x})".format(smi_count_delta, MSR_SMI_COUNT)) + + testsuite.print_detail("Summary of impact: observed maximum latency = {}".format(bits.format_tsc(max_latency))) + +def test_with_usb_disabled(): + if usb.handoff_to_os(): + smi_latency() + +def average_io_smi(port, value, count): + def f(): + tsc_start = bits.rdtsc() + bits.outb(port, value) + return bits.rdtsc() - tsc_start + counts = [f() for i in range(count)] + return sum(counts)/len(counts) + +def time_io_smi(port=0xb2, value=0, count=1000): + count_for_estimate = 10 + start = time.time() + average_io_smi(port, value, count_for_estimate) + avg10 = time.time() - start + estimate = avg10 * count/count_for_estimate + if estimate > 1: + print "Running test, estimated time: {}s".format(int(estimate)) + average = average_io_smi(port, value, count) + print "Average of {} SMIs (via outb, port={:#x}, value={:#x}): {}".format(count, port, value, bits.format_tsc(average)) -- 2.42.0 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] acpi/tests/avocado/bits: import smilatency test from bits in order to disable it 2024-01-08 10:34 ` [PATCH 1/2] acpi/tests/avocado/bits: import smilatency test from bits in order to disable it Ani Sinha @ 2024-01-08 10:58 ` Peter Maydell 2024-01-08 11:04 ` Ani Sinha 0 siblings, 1 reply; 7+ messages in thread From: Peter Maydell @ 2024-01-08 10:58 UTC (permalink / raw) To: Ani Sinha Cc: Cleber Rosa, Philippe Mathieu-Daudé, Wainer dos Santos Moschetta, Beraldo Leal, mst, qemu-devel On Mon, 8 Jan 2024 at 10:35, Ani Sinha <anisinha@redhat.com> wrote: > > Add smilatency test script in the bits avocado tests from bios-bits. No changes > have been made to the original test script. The test will be disabled in the > subsequent patch. > > CC: peter.maydell@linaro.org > CC: crosa@redhat.com > CC: philmd@linaro.org > CC: bleal@redhat.com > CC: mst@redhat.com > CC: wainersm@redhat.com > Signed-off-by: Ani Sinha <anisinha@redhat.com> > --- > .../acpi-bits/bits-tests/smilatency.py2 | 106 ++++++++++++++++++ > 1 file changed, 106 insertions(+) > create mode 100644 tests/avocado/acpi-bits/bits-tests/smilatency.py2 I'm confused -- why do we need to *add* the test? This test already exists somewhere, because we're running it. So why isn't the patch "disable that existing test"? thanks -- PMM ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] acpi/tests/avocado/bits: import smilatency test from bits in order to disable it 2024-01-08 10:58 ` Peter Maydell @ 2024-01-08 11:04 ` Ani Sinha 0 siblings, 0 replies; 7+ messages in thread From: Ani Sinha @ 2024-01-08 11:04 UTC (permalink / raw) To: Peter Maydell Cc: Cleber Rosa, Philippe Mathieu-Daudé, Wainer dos Santos Moschetta, Beraldo Leal, mst, qemu-devel > On 08-Jan-2024, at 4:28 PM, Peter Maydell <peter.maydell@linaro.org> wrote: > > On Mon, 8 Jan 2024 at 10:35, Ani Sinha <anisinha@redhat.com> wrote: >> >> Add smilatency test script in the bits avocado tests from bios-bits. No changes >> have been made to the original test script. The test will be disabled in the >> subsequent patch. >> >> CC: peter.maydell@linaro.org >> CC: crosa@redhat.com >> CC: philmd@linaro.org >> CC: bleal@redhat.com >> CC: mst@redhat.com >> CC: wainersm@redhat.com >> Signed-off-by: Ani Sinha <anisinha@redhat.com> >> --- >> .../acpi-bits/bits-tests/smilatency.py2 | 106 ++++++++++++++++++ >> 1 file changed, 106 insertions(+) >> create mode 100644 tests/avocado/acpi-bits/bits-tests/smilatency.py2 > > I'm confused -- why do we need to *add* the test? This > test already exists somewhere, That “somewhere" is within the bios-bits image. See https://www.qemu.org/docs/master/devel/acpi-bits.html See "tests/avocado/acpi-bits/bits-tests” section. > because we're running it. > So why isn't the patch "disable that existing test"? > > thanks > -- PMM ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2024-01-09 14:27 UTC | newest] Thread overview: 7+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2024-01-08 10:36 [PATCH 0/2] acpi/tests/avocado/bits: disable smilatency tests Ani Sinha 2024-01-08 10:36 ` [PATCH 1/2] acpi/tests/avocado/bits: import smilatency test from bits in order to disable it Ani Sinha 2024-01-08 10:36 ` [PATCH 2/2] acpi/tests/avocado/bits: disable smilatency tests Ani Sinha 2024-01-09 14:26 ` [PATCH 0/2] " Peter Maydell [not found] <20240108103439.4369-1-anisinha@redhat.com> 2024-01-08 10:34 ` [PATCH 1/2] acpi/tests/avocado/bits: import smilatency test from bits in order to disable it Ani Sinha 2024-01-08 10:58 ` Peter Maydell 2024-01-08 11:04 ` Ani Sinha
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for NNTP newsgroup(s).