From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Song Gao" <gaosong@loongson.cn>,
"Tianrui Zhao" <zhaotianrui@loongson.cn>,
"xianglai li" <lixianglai@loongson.cn>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH v4 8/9a] target/loongarch: Restrict TCG-specific code
Date: Wed, 10 Jan 2024 10:41:51 +0100 [thread overview]
Message-ID: <20240110094152.52138-1-philmd@linaro.org> (raw)
In-Reply-To: <20240105075804.1228596-9-zhaotianrui@loongson.cn>
From: Tianrui Zhao <zhaotianrui@loongson.cn>
In preparation of supporting KVM in the next commit.
Signed-off-by: Tianrui Zhao <zhaotianrui@loongson.cn>
Signed-off-by: xianglai li <lixianglai@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-ID: <20240105075804.1228596-9-zhaotianrui@loongson.cn>
[PMD: Split from bigger patch, part 1]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/loongarch/cpu.c | 30 +++++++++++++++++++++---------
1 file changed, 21 insertions(+), 9 deletions(-)
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index 6614a094c8..d9f8661cfd 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -11,7 +11,7 @@
#include "qapi/error.h"
#include "qemu/module.h"
#include "sysemu/qtest.h"
-#include "exec/cpu_ldst.h"
+#include "sysemu/tcg.h"
#include "exec/exec-all.h"
#include "cpu.h"
#include "internals.h"
@@ -20,8 +20,11 @@
#ifndef CONFIG_USER_ONLY
#include "sysemu/reset.h"
#endif
-#include "tcg/tcg.h"
#include "vec.h"
+#ifdef CONFIG_TCG
+#include "exec/cpu_ldst.h"
+#include "tcg/tcg.h"
+#endif
const char * const regnames[32] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
@@ -110,12 +113,13 @@ void loongarch_cpu_set_irq(void *opaque, int irq, int level)
return;
}
- env->CSR_ESTAT = deposit64(env->CSR_ESTAT, irq, 1, level != 0);
-
- if (FIELD_EX64(env->CSR_ESTAT, CSR_ESTAT, IS)) {
- cpu_interrupt(cs, CPU_INTERRUPT_HARD);
- } else {
- cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
+ if (tcg_enabled()) {
+ env->CSR_ESTAT = deposit64(env->CSR_ESTAT, irq, 1, level != 0);
+ if (FIELD_EX64(env->CSR_ESTAT, CSR_ESTAT, IS)) {
+ cpu_interrupt(cs, CPU_INTERRUPT_HARD);
+ } else {
+ cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
+ }
}
}
@@ -140,7 +144,10 @@ static inline bool cpu_loongarch_hw_interrupts_pending(CPULoongArchState *env)
return (pending & status) != 0;
}
+#endif
+#ifdef CONFIG_TCG
+#ifndef CONFIG_USER_ONLY
static void loongarch_cpu_do_interrupt(CPUState *cs)
{
LoongArchCPU *cpu = LOONGARCH_CPU(cs);
@@ -322,7 +329,6 @@ static bool loongarch_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
}
#endif
-#ifdef CONFIG_TCG
static void loongarch_cpu_synchronize_from_tb(CPUState *cs,
const TranslationBlock *tb)
{
@@ -560,7 +566,9 @@ static void loongarch_cpu_reset_hold(Object *obj)
}
#endif
+#ifdef CONFIG_TCG
restore_fp_status(env);
+#endif
cs->exception_index = -1;
}
@@ -703,8 +711,10 @@ static void loongarch_cpu_init(Object *obj)
CPULoongArchState *env = &cpu->env;
qdev_init_gpio_in(DEVICE(cpu), loongarch_cpu_set_irq, N_IRQS);
+#ifdef CONFIG_TCG
timer_init_ns(&cpu->timer, QEMU_CLOCK_VIRTUAL,
&loongarch_constant_timer_cb, cpu);
+#endif
memory_region_init_io(&env->system_iocsr, OBJECT(cpu), NULL,
env, "iocsr", UINT64_MAX);
address_space_init(&env->address_space_iocsr, &env->system_iocsr, "IOCSR");
@@ -804,7 +814,9 @@ static struct TCGCPUOps loongarch_tcg_ops = {
#include "hw/core/sysemu-cpu-ops.h"
static const struct SysemuCPUOps loongarch_sysemu_ops = {
+#ifdef CONFIG_TCG
.get_phys_page_debug = loongarch_cpu_get_phys_page_debug,
+#endif
};
static int64_t loongarch_cpu_get_arch_id(CPUState *cs)
--
2.41.0
next prev parent reply other threads:[~2024-01-10 9:42 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-05 7:57 [PATCH v4 0/9] Add loongarch kvm accel support Tianrui Zhao
2024-01-05 7:57 ` [PATCH v4 1/9] linux-headers: Synchronize linux headers from linux v6.7.0-rc8 Tianrui Zhao
2024-01-05 7:57 ` [PATCH v4 2/9] target/loongarch: Define some kvm_arch interfaces Tianrui Zhao
2024-01-05 7:57 ` [PATCH v4 3/9] target/loongarch: Supplement vcpu env initial when vcpu reset Tianrui Zhao
2024-01-05 7:57 ` [PATCH v4 4/9] target/loongarch: Implement kvm get/set registers Tianrui Zhao
2024-01-05 7:58 ` [PATCH v4 5/9] target/loongarch: Implement kvm_arch_init function Tianrui Zhao
2024-01-05 7:58 ` [PATCH v4 6/9] target/loongarch: Implement kvm_arch_init_vcpu Tianrui Zhao
2024-01-05 7:58 ` [PATCH v4 7/9] target/loongarch: Implement kvm_arch_handle_exit Tianrui Zhao
2024-01-05 7:58 ` [PATCH v4 8/9] target/loongarch: Implement set vcpu intr for kvm Tianrui Zhao
2024-01-10 9:20 ` Philippe Mathieu-Daudé
2024-01-10 9:41 ` Philippe Mathieu-Daudé [this message]
2024-01-10 9:41 ` [PATCH v4 8/9b] " Philippe Mathieu-Daudé
2024-01-11 2:29 ` gaosong
2024-01-11 8:24 ` Philippe Mathieu-Daudé
2024-01-05 7:58 ` [PATCH v4 9/9] target/loongarch: Add loongarch kvm into meson build Tianrui Zhao
2024-01-10 2:36 ` gaosong
2024-01-10 2:46 ` [PATCH v4 0/9] Add loongarch kvm accel support gaosong
2024-01-10 9:42 ` Philippe Mathieu-Daudé
2024-01-10 10:05 ` gaosong
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