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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: philmd@linaro.org, pbonzini@redhat.com
Subject: [PATCH v3 27/38] tcg/sparc64: Hoist read of tcg_cond_to_rcond
Date: Thu, 11 Jan 2024 09:43:57 +1100	[thread overview]
Message-ID: <20240110224408.10444-28-richard.henderson@linaro.org> (raw)
In-Reply-To: <20240110224408.10444-1-richard.henderson@linaro.org>

Use a non-zero value here (an illegal encoding) as a better
condition than is_unsigned_cond for when MOVR/BPR is usable.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/sparc64/tcg-target.c.inc | 25 ++++++++++++++-----------
 1 file changed, 14 insertions(+), 11 deletions(-)

diff --git a/tcg/sparc64/tcg-target.c.inc b/tcg/sparc64/tcg-target.c.inc
index ac86b92b75..e16b25e309 100644
--- a/tcg/sparc64/tcg-target.c.inc
+++ b/tcg/sparc64/tcg-target.c.inc
@@ -620,7 +620,7 @@ static const uint8_t tcg_cond_to_bcond[] = {
     [TCG_COND_GTU] = COND_GU,
 };
 
-static const uint8_t tcg_cond_to_rcond[] = {
+static const uint8_t tcg_cond_to_rcond[16] = {
     [TCG_COND_EQ] = RCOND_Z,
     [TCG_COND_NE] = RCOND_NZ,
     [TCG_COND_LT] = RCOND_LZ,
@@ -679,7 +679,8 @@ static void tcg_out_brcond_i64(TCGContext *s, TCGCond cond, TCGReg arg1,
                                int32_t arg2, int const_arg2, TCGLabel *l)
 {
     /* For 64-bit signed comparisons vs zero, we can avoid the compare.  */
-    if (arg2 == 0 && !is_unsigned_cond(cond)) {
+    int rcond = tcg_cond_to_rcond[cond];
+    if (arg2 == 0 && rcond) {
         int off16 = 0;
 
         if (l->has_value) {
@@ -688,7 +689,7 @@ static void tcg_out_brcond_i64(TCGContext *s, TCGCond cond, TCGReg arg1,
             tcg_out_reloc(s, s->code_ptr, R_SPARC_WDISP16, l, 0);
         }
         tcg_out32(s, INSN_OP(0) | INSN_OP2(3) | BPR_PT | INSN_RS1(arg1)
-                  | INSN_COND(tcg_cond_to_rcond[cond]) | off16);
+                  | INSN_COND(rcond) | off16);
     } else {
         tcg_out_cmp(s, arg1, arg2, const_arg2);
         tcg_out_bpcc(s, tcg_cond_to_bcond[cond], BPCC_XCC | BPCC_PT, l);
@@ -696,11 +697,10 @@ static void tcg_out_brcond_i64(TCGContext *s, TCGCond cond, TCGReg arg1,
     tcg_out_nop(s);
 }
 
-static void tcg_out_movr(TCGContext *s, TCGCond cond, TCGReg ret, TCGReg c1,
+static void tcg_out_movr(TCGContext *s, int rcond, TCGReg ret, TCGReg c1,
                          int32_t v1, int v1const)
 {
-    tcg_out32(s, ARITH_MOVR | INSN_RD(ret) | INSN_RS1(c1)
-              | (tcg_cond_to_rcond[cond] << 10)
+    tcg_out32(s, ARITH_MOVR | INSN_RD(ret) | INSN_RS1(c1) | (rcond << 10)
               | (v1const ? INSN_IMM10(v1) : INSN_RS2(v1)));
 }
 
@@ -711,9 +711,9 @@ static void tcg_out_movcond_i64(TCGContext *s, TCGCond cond, TCGReg ret,
     /* For 64-bit signed comparisons vs zero, we can avoid the compare.
        Note that the immediate range is one bit smaller, so we must check
        for that as well.  */
-    if (c2 == 0 && !is_unsigned_cond(cond)
-        && (!v1const || check_fit_i32(v1, 10))) {
-        tcg_out_movr(s, cond, ret, c1, v1, v1const);
+    int rcond = tcg_cond_to_rcond[cond];
+    if (c2 == 0 && rcond && (!v1const || check_fit_i32(v1, 10))) {
+        tcg_out_movr(s, rcond, ret, c1, v1, v1const);
     } else {
         tcg_out_cmp(s, c1, c2, c2const);
         tcg_out_movcc(s, cond, MOVCC_XCC, ret, v1, v1const);
@@ -788,6 +788,8 @@ static void tcg_out_setcond_i32(TCGContext *s, TCGCond cond, TCGReg ret,
 static void tcg_out_setcond_i64(TCGContext *s, TCGCond cond, TCGReg ret,
                                 TCGReg c1, int32_t c2, int c2const, bool neg)
 {
+    int rcond;
+
     if (use_vis3_instructions && !neg) {
         switch (cond) {
         case TCG_COND_NE:
@@ -807,9 +809,10 @@ static void tcg_out_setcond_i64(TCGContext *s, TCGCond cond, TCGReg ret,
 
     /* For 64-bit signed comparisons vs zero, we can avoid the compare
        if the input does not overlap the output.  */
-    if (c2 == 0 && !is_unsigned_cond(cond) && c1 != ret) {
+    rcond = tcg_cond_to_rcond[cond];
+    if (c2 == 0 && rcond && c1 != ret) {
         tcg_out_movi_s13(s, ret, 0);
-        tcg_out_movr(s, cond, ret, c1, neg ? -1 : 1, 1);
+        tcg_out_movr(s, rcond, ret, c1, neg ? -1 : 1, 1);
     } else {
         tcg_out_cmp(s, c1, c2, c2const);
         tcg_out_movi_s13(s, ret, 0);
-- 
2.34.1



  parent reply	other threads:[~2024-01-10 22:49 UTC|newest]

Thread overview: 70+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-10 22:43 [PATCH v3 00/38] tcg: Introduce TCG_COND_TST{EQ,NE} Richard Henderson
2024-01-10 22:43 ` [PATCH v3 01/38] " Richard Henderson
2024-01-10 22:43 ` [PATCH v3 02/38] tcg: Introduce TCG_TARGET_HAS_tst Richard Henderson
2024-01-16 21:42   ` Philippe Mathieu-Daudé
2024-01-10 22:43 ` [PATCH v3 03/38] tcg/optimize: Split out arg_is_const_val Richard Henderson
2024-01-10 22:43 ` [PATCH v3 04/38] tcg/optimize: Split out do_constant_folding_cond1 Richard Henderson
2024-01-10 22:43 ` [PATCH v3 05/38] tcg/optimize: Do swap_commutative2 in do_constant_folding_cond2 Richard Henderson
2024-01-10 22:43 ` [PATCH v3 06/38] tcg/optimize: Handle TCG_COND_TST{EQ,NE} Richard Henderson
2024-01-10 22:43 ` [PATCH v3 07/38] tcg/optimize: Lower TCG_COND_TST{EQ, NE} if unsupported Richard Henderson
2024-01-16 22:02   ` [PATCH v3 07/38] tcg/optimize: Lower TCG_COND_TST{EQ,NE} " Philippe Mathieu-Daudé
2024-01-10 22:43 ` [PATCH v3 08/38] target/alpha: Pass immediate value to gen_bcond_internal() Richard Henderson
2024-01-16 22:02   ` Philippe Mathieu-Daudé
2024-01-10 22:43 ` [PATCH v3 09/38] target/alpha: Use TCG_COND_TST{EQ,NE} for BLB{C,S} Richard Henderson
2024-01-16 22:03   ` Philippe Mathieu-Daudé
2024-01-10 22:43 ` [PATCH v3 10/38] target/alpha: Use TCG_COND_TST{EQ, NE} for CMOVLB{C, S} Richard Henderson
2024-01-10 22:43 ` [PATCH v3 11/38] target/alpha: Use TCG_COND_TSTNE for gen_fold_mzero Richard Henderson
2024-01-10 22:43 ` [PATCH v3 12/38] target/m68k: Use TCG_COND_TST{EQ, NE} in gen_fcc_cond Richard Henderson
2024-01-16 22:06   ` [PATCH v3 12/38] target/m68k: Use TCG_COND_TST{EQ,NE} " Philippe Mathieu-Daudé
2024-01-10 22:43 ` [PATCH v3 13/38] target/sparc: Use TCG_COND_TSTEQ in gen_op_mulscc Richard Henderson
2024-01-16 21:44   ` Philippe Mathieu-Daudé
2024-01-10 22:43 ` [PATCH v3 14/38] target/s390x: Use TCG_COND_TSTNE for CC_OP_{TM,ICM} Richard Henderson
2024-01-19 21:59   ` Philippe Mathieu-Daudé
2024-01-10 22:43 ` [PATCH v3 15/38] target/s390x: Improve general case of disas_jcc Richard Henderson
2024-01-16 22:19   ` Philippe Mathieu-Daudé
2024-01-17  3:19     ` Richard Henderson
2024-01-19 23:27       ` Philippe Mathieu-Daudé
2024-01-19 23:22   ` [PATCH v3 15/38 1/6] target/s390x: Reorder CC_OP_STATIC switch case in disas_jcc (1/5) Philippe Mathieu-Daudé
2024-01-19 23:22   ` [PATCH v3 15/38 2/6] target/s390x: Reorder CC_OP_STATIC switch case in disas_jcc (2/5) Philippe Mathieu-Daudé
2024-01-19 23:22   ` [PATCH v3 15/38 3/6] target/s390x: Reorder CC_OP_STATIC switch case in disas_jcc (3/5) Philippe Mathieu-Daudé
2024-01-19 23:23   ` [PATCH v3 15/38 4/6] target/s390x: Reorder CC_OP_STATIC switch case in disas_jcc (4/5) Philippe Mathieu-Daudé
2024-01-19 23:23   ` [PATCH v3 15/38 5/6] target/s390x: Reorder CC_OP_STATIC switch case in disas_jcc (5/5) Philippe Mathieu-Daudé
2024-01-19 23:23   ` [PATCH v3 15/38 6/6] target/s390x: Improve general case of disas_jcc Philippe Mathieu-Daudé
2024-01-19 23:27     ` Philippe Mathieu-Daudé
2024-01-22 21:38     ` Ilya Leoshkevich
2024-01-10 22:43 ` [PATCH v3 16/38] tcg: Add TCGConst argument to tcg_target_const_match Richard Henderson
2024-01-10 22:43 ` [PATCH v3 17/38] tcg/aarch64: Support TCG_COND_TST{EQ,NE} Richard Henderson
2024-01-19 22:09   ` Philippe Mathieu-Daudé
2024-01-10 22:43 ` [PATCH v3 18/38] tcg/aarch64: Generate TBZ, TBNZ Richard Henderson
2024-01-19 22:47   ` [PATCH v3 18/38 1/2] tcg/aarch64: Massage tcg_out_brcond() Philippe Mathieu-Daudé
2024-01-19 22:47   ` [PATCH v3 18/38 2/2] tcg/aarch64: Generate TBZ, TBNZ Philippe Mathieu-Daudé
2024-01-10 22:43 ` [PATCH v3 19/38] tcg/aarch64: Generate CBNZ for TSTNE of UINT32_MAX Richard Henderson
2024-01-22 14:20   ` Philippe Mathieu-Daudé
2024-01-10 22:43 ` [PATCH v3 20/38] tcg/arm: Factor tcg_out_cmp() out Richard Henderson
2024-01-16 22:22   ` Philippe Mathieu-Daudé
2024-01-10 22:43 ` [PATCH v3 21/38] tcg/arm: Support TCG_COND_TST{EQ,NE} Richard Henderson
2024-01-16 22:26   ` Philippe Mathieu-Daudé
2024-01-10 22:43 ` [PATCH v3 22/38] tcg/i386: Pass x86 condition codes to tcg_out_cmov Richard Henderson
2024-01-10 22:43 ` [PATCH v3 23/38] tcg/i386: Move tcg_cond_to_jcc[] into tcg_out_cmp Richard Henderson
2024-01-10 22:43 ` [PATCH v3 24/38] tcg/i386: Support TCG_COND_TST{EQ,NE} Richard Henderson
2024-01-10 22:43 ` [PATCH v3 25/38] tcg/i386: Improve TSTNE/TESTEQ vs powers of two Richard Henderson
2024-01-10 22:43 ` [PATCH v3 26/38] tcg/i386: Use TEST r,r to test 8/16/32 bits Richard Henderson
2024-01-20 11:02   ` Philippe Mathieu-Daudé
2024-01-10 22:43 ` Richard Henderson [this message]
2024-01-10 22:43 ` [PATCH v3 28/38] tcg/sparc64: Pass TCGCond to tcg_out_cmp Richard Henderson
2024-01-10 22:43 ` [PATCH v3 29/38] tcg/sparc64: Support TCG_COND_TST{EQ,NE} Richard Henderson
2024-01-10 22:44 ` [PATCH v3 30/38] tcg/ppc: Sink tcg_to_bc usage into tcg_out_bc Richard Henderson
2024-01-10 22:44 ` [PATCH v3 31/38] tcg/ppc: Use cr0 in tcg_to_bc and tcg_to_isel Richard Henderson
2024-01-16 21:51   ` Philippe Mathieu-Daudé
2024-01-10 22:44 ` [PATCH v3 32/38] tcg/ppc: Tidy up tcg_target_const_match Richard Henderson
2024-01-10 22:44 ` [PATCH v3 33/38] tcg/ppc: Add TCG_CT_CONST_CMP Richard Henderson
2024-01-19 22:12   ` Philippe Mathieu-Daudé
2024-01-10 22:44 ` [PATCH v3 34/38] tcg/ppc: Support TCG_COND_TST{EQ,NE} Richard Henderson
2024-01-19 22:20   ` Philippe Mathieu-Daudé
2024-01-10 22:44 ` [PATCH v3 35/38] tcg/s390x: Split constraint A into J+U Richard Henderson
2024-01-16 21:55   ` Philippe Mathieu-Daudé
2024-01-10 22:44 ` [PATCH v3 36/38] tcg/s390x: Add TCG_CT_CONST_CMP Richard Henderson
2024-01-16 21:57   ` Philippe Mathieu-Daudé
2024-01-10 22:44 ` [PATCH v3 37/38] tcg/s390x: Support TCG_COND_TST{EQ,NE} Richard Henderson
2024-01-23  5:36   ` Philippe Mathieu-Daudé
2024-01-10 22:44 ` [PATCH v3 38/38] tcg/tci: " Richard Henderson

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