Re: [PATCH v2 0/3] Fix PIC interrupt handling of x86 CPUs if APIC is globally disabled

["Michael S. Tsirkin" <mst@redhat.com>]

On Sun, Jan 14, 2024 at 10:52:28AM +0000, Bernhard Beschow wrote:
> 
> 
> Am 6. Januar 2024 13:25:43 UTC schrieb Bernhard Beschow <shentey@gmail.com>:
> >This series is part of my work emulating the VIA Apollo Pro 133T chipset in QEMU
> >
> >[1] and testing it by running real-world BIOSes on it. The first two patches fix
> >
> >an issue regarding PIC interrupt handling, the third one just fixes a typo in a
> >
> >comment.
> >
> >
> >
> >During testing, I've found that the boot process gets stuck for some BIOSes that
> >
> >disable the LAPIC globally (by disabling the enable bit in the base address
> >
> >register). QEMU seems to emulate PIC interrupt handling only if a CPU doesn't
> >
> >have a LAPIC, and always emulates LAPIC interrupt handling if one is present.
> >
> >According to the Intel documentation, a CPU should resort to PIC interrupt
> >
> >handling if its LAPIC is globally didabled. This series fixes this corner case
> >
> >which makes the boot process succeed. More details can be found in the commit
> >
> >message.
> >
> >
> >
> >Testing done:
> >
> >* `make check`
> >
> >* `make check-avocado`
> >
> >
> >
> >v2:
> >
> >* Pick up R-b tag
> >
> >* Split and rework interrupt handling patch to consider i486 SMP systems. This
> >
> >    required dropping Alex' R-b tag.
> >
> 
> Ping


Tagged now. Thanks!

> >
> >
> >[1] https://github.com/shentok/qemu/tree/via-apollo-pro-133t
> >
> >
> >
> >Bernhard Beschow (3):
> >
> >  hw/i386/x86: Reverse if statement
> >
> >  hw/i386/x86: Fix PIC interrupt handling if APIC is globally disabled
> >
> >  target/i386/cpu: Fix typo in comment
> >
> >
> >
> > include/hw/i386/apic.h |  1 +
> >
> > hw/i386/x86.c          |  8 ++++----
> >
> > hw/intc/apic_common.c  | 13 +++++++++++++
> >
> > target/i386/cpu.c      |  2 +-
> >
> > 4 files changed, 19 insertions(+), 5 deletions(-)
> >
> >
> >
> >-- >
> >2.43.0
> >
> >
> >