From: Akihiko Odaki <akihiko.odaki@daynix.com>
To: "Palmer Dabbelt" <palmer@dabbelt.com>,
"Alistair Francis" <alistair.francis@wdc.com>,
"Bin Meng" <bin.meng@windriver.com>,
"Weiwei Li" <liwei1518@gmail.com>,
"Daniel Henrique Barboza" <dbarboza@ventanamicro.com>,
"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
"Alex Bennée" <alex.bennee@linaro.org>,
"Mikhail Tyutin" <m.tyutin@yadro.com>,
"Aleksandr Anenkov" <a.anenkov@yadro.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Fabiano Rosas" <farosas@suse.de>
Cc: qemu-riscv@nongnu.org, qemu-devel@nongnu.org,
Akihiko Odaki <akihiko.odaki@daynix.com>
Subject: [PATCH v9 2/4] target/riscv: Remove misa_mxl validation
Date: Mon, 15 Jan 2024 15:31:27 +0900 [thread overview]
Message-ID: <20240115-riscv-v9-2-ff171e1aedc8@daynix.com> (raw)
In-Reply-To: <20240115-riscv-v9-0-ff171e1aedc8@daynix.com>
It is initialized with a simple assignment and there is little room for
error. In fact, the validation is even more complex.
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Acked-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/tcg/tcg-cpu.c | 15 +++------------
1 file changed, 3 insertions(+), 12 deletions(-)
diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c
index 14133ff66568..b85b0d036a61 100644
--- a/target/riscv/tcg/tcg-cpu.c
+++ b/target/riscv/tcg/tcg-cpu.c
@@ -268,7 +268,7 @@ static void riscv_cpu_validate_misa_priv(CPURISCVState *env, Error **errp)
}
}
-static void riscv_cpu_validate_misa_mxl(RISCVCPU *cpu, Error **errp)
+static void riscv_cpu_validate_misa_mxl(RISCVCPU *cpu)
{
RISCVCPUClass *mcc = RISCV_CPU_GET_CLASS(cpu);
CPUClass *cc = CPU_CLASS(mcc);
@@ -288,11 +288,6 @@ static void riscv_cpu_validate_misa_mxl(RISCVCPU *cpu, Error **errp)
default:
g_assert_not_reached();
}
-
- if (env->misa_mxl_max != env->misa_mxl) {
- error_setg(errp, "misa_mxl_max must be equal to misa_mxl");
- return;
- }
}
static void riscv_cpu_validate_priv_spec(RISCVCPU *cpu, Error **errp)
@@ -932,7 +927,6 @@ static bool riscv_cpu_is_vendor(Object *cpu_obj)
static bool tcg_cpu_realize(CPUState *cs, Error **errp)
{
RISCVCPU *cpu = RISCV_CPU(cs);
- Error *local_err = NULL;
if (!riscv_cpu_tcg_compatible(cpu)) {
g_autofree char *name = riscv_cpu_get_name(cpu);
@@ -941,14 +935,11 @@ static bool tcg_cpu_realize(CPUState *cs, Error **errp)
return false;
}
- riscv_cpu_validate_misa_mxl(cpu, &local_err);
- if (local_err != NULL) {
- error_propagate(errp, local_err);
- return false;
- }
+ riscv_cpu_validate_misa_mxl(cpu);
#ifndef CONFIG_USER_ONLY
CPURISCVState *env = &cpu->env;
+ Error *local_err = NULL;
CPU(cs)->tcg_cflags |= CF_PCREL;
--
2.43.0
next prev parent reply other threads:[~2024-01-15 6:32 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-15 6:31 [PATCH v9 0/4] gdbstub and TCG plugin improvements Akihiko Odaki
2024-01-15 6:31 ` [PATCH v9 1/4] hw/riscv: Use misa_mxl instead of misa_mxl_max Akihiko Odaki
2024-01-15 6:31 ` Akihiko Odaki [this message]
2024-01-15 6:31 ` [PATCH v9 3/4] target/riscv: Move misa_mxl_max to class Akihiko Odaki
2024-01-15 6:31 ` [PATCH v9 4/4] target/riscv: Validate misa_mxl_max only once Akihiko Odaki
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