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From: Nicholas Piggin <npiggin@gmail.com>
To: qemu-ppc@nongnu.org
Cc: "Nicholas Piggin" <npiggin@gmail.com>,
	"Daniel Henrique Barboza" <danielhb413@gmail.com>,
	"Cédric Le Goater" <clg@kaod.org>,
	"Harsh Prateek Bora" <harshpb@linux.ibm.com>,
	"BALATON Zoltan" <balaton@eik.bme.hu>,
	qemu-devel@nongnu.org
Subject: [PATCH 3/6] target/ppc: 4xx don't flush TLB for a newly written software TLB entry
Date: Thu, 18 Jan 2024 01:12:35 +1000	[thread overview]
Message-ID: <20240117151238.93323-3-npiggin@gmail.com> (raw)
In-Reply-To: <20240117151238.93323-1-npiggin@gmail.com>

BookE software TLB is implemented by flushing old translations from the
relevant TCG TLB whenever software TLB entries change. This means a new
software TLB entry should not have any corresponding cached TCG TLB
translations, so there is nothing to flush. The exception is multiple
software TLBs that cover the same address and address space, but that
is a programming error and results in undefined behaviour, and flushing
does not give an obviously better outcome in that case either.

Remove the unnecessary flush of a newly written software TLB entry.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
 target/ppc/mmu_helper.c | 7 -------
 1 file changed, 7 deletions(-)

diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c
index 949ae87f4f..68632bf54e 100644
--- a/target/ppc/mmu_helper.c
+++ b/target/ppc/mmu_helper.c
@@ -808,13 +808,6 @@ void helper_4xx_tlbwe_hi(CPUPPCState *env, target_ulong entry,
                   tlb->prot & PAGE_WRITE ? 'w' : '-',
                   tlb->prot & PAGE_EXEC ? 'x' : '-',
                   tlb->prot & PAGE_VALID ? 'v' : '-', (int)tlb->PID);
-    /* Invalidate new TLB (if valid) */
-    if (tlb->prot & PAGE_VALID) {
-        qemu_log_mask(CPU_LOG_MMU, "%s: invalidate TLB %d start "
-                      TARGET_FMT_lx " end " TARGET_FMT_lx "\n", __func__,
-                      (int)entry, tlb->EPN, tlb->EPN + tlb->size);
-        ppcemb_tlb_flush(cs, tlb);
-    }
 }
 
 void helper_4xx_tlbwe_lo(CPUPPCState *env, target_ulong entry,
-- 
2.42.0



  parent reply	other threads:[~2024-01-17 15:13 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-17 15:12 [PATCH 1/6] target/ppc: Fix 440 tlbwe TLB invalidation gaps Nicholas Piggin
2024-01-17 15:12 ` [PATCH 2/6] target/ppc: Factor out 4xx ppcemb_tlb_t flushing Nicholas Piggin
2024-01-25 10:39   ` Cédric Le Goater
2024-01-17 15:12 ` Nicholas Piggin [this message]
2024-01-25 10:44   ` [PATCH 3/6] target/ppc: 4xx don't flush TLB for a newly written software TLB entry Cédric Le Goater
2024-01-17 15:12 ` [PATCH 4/6] target/ppc: 4xx optimise tlbwe_lo TLB flushing Nicholas Piggin
2024-01-25 10:44   ` Cédric Le Goater
2024-01-17 15:12 ` [PATCH 5/6] target/ppc: 440 optimise tlbwe " Nicholas Piggin
2024-01-25 10:44   ` Cédric Le Goater
2024-01-17 15:12 ` [PATCH 6/6] target/ppc: optimise ppcemb_tlb_t flushing Nicholas Piggin
2024-01-25 10:45   ` Cédric Le Goater
2024-01-25 10:38 ` [PATCH 1/6] target/ppc: Fix 440 tlbwe TLB invalidation gaps Cédric Le Goater
2024-02-16 13:28 ` BALATON Zoltan

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