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From: Nicholas Piggin <npiggin@gmail.com>
To: qemu-ppc@nongnu.org
Cc: "Nicholas Piggin" <npiggin@gmail.com>,
	"Daniel Henrique Barboza" <danielhb413@gmail.com>,
	"Cédric Le Goater" <clg@kaod.org>,
	"Harsh Prateek Bora" <harshpb@linux.ibm.com>,
	"BALATON Zoltan" <balaton@eik.bme.hu>,
	qemu-devel@nongnu.org
Subject: [PATCH 5/6] target/ppc: 440 optimise tlbwe TLB flushing
Date: Thu, 18 Jan 2024 01:12:37 +1000	[thread overview]
Message-ID: <20240117151238.93323-5-npiggin@gmail.com> (raw)
In-Reply-To: <20240117151238.93323-1-npiggin@gmail.com>

Have 440 tlbwe flush only the range corresponding to the addresses
covered by the software TLB entry being modified rather than the
entire TLB. This matches what 4xx does.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
 target/ppc/mmu_helper.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c
index 923779d052..ba965f1779 100644
--- a/target/ppc/mmu_helper.c
+++ b/target/ppc/mmu_helper.c
@@ -864,7 +864,7 @@ void helper_440_tlbwe(CPUPPCState *env, uint32_t word, target_ulong entry,
 
     /* Invalidate previous TLB (if it's valid) */
     if (tlb->prot & PAGE_VALID) {
-        tlb_flush(env_cpu(env));
+        ppcemb_tlb_flush(env_cpu(env), tlb);
     }
 
     switch (word) {
-- 
2.42.0



  parent reply	other threads:[~2024-01-17 15:13 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-17 15:12 [PATCH 1/6] target/ppc: Fix 440 tlbwe TLB invalidation gaps Nicholas Piggin
2024-01-17 15:12 ` [PATCH 2/6] target/ppc: Factor out 4xx ppcemb_tlb_t flushing Nicholas Piggin
2024-01-25 10:39   ` Cédric Le Goater
2024-01-17 15:12 ` [PATCH 3/6] target/ppc: 4xx don't flush TLB for a newly written software TLB entry Nicholas Piggin
2024-01-25 10:44   ` Cédric Le Goater
2024-01-17 15:12 ` [PATCH 4/6] target/ppc: 4xx optimise tlbwe_lo TLB flushing Nicholas Piggin
2024-01-25 10:44   ` Cédric Le Goater
2024-01-17 15:12 ` Nicholas Piggin [this message]
2024-01-25 10:44   ` [PATCH 5/6] target/ppc: 440 optimise tlbwe " Cédric Le Goater
2024-01-17 15:12 ` [PATCH 6/6] target/ppc: optimise ppcemb_tlb_t flushing Nicholas Piggin
2024-01-25 10:45   ` Cédric Le Goater
2024-01-25 10:38 ` [PATCH 1/6] target/ppc: Fix 440 tlbwe TLB invalidation gaps Cédric Le Goater
2024-02-16 13:28 ` BALATON Zoltan

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