From: Nicholas Piggin <npiggin@gmail.com>
To: qemu-ppc@nongnu.org
Cc: "Nicholas Piggin" <npiggin@gmail.com>,
"Cédric Le Goater" <clg@kaod.org>,
"Frédéric Barrat" <fbarrat@linux.ibm.com>,
"Daniel Henrique Barboza" <danielhb413@gmail.com>,
"David Gibson" <david@gibson.dropbear.id.au>,
"Harsh Prateek Bora" <harshpb@linux.ibm.com>,
qemu-devel@nongnu.org
Subject: [PATCH 19/26] target/ppc: Wire up BookE ATB registers for e500 family
Date: Fri, 19 Jan 2024 01:06:37 +1000 [thread overview]
Message-ID: <20240118150644.177371-20-npiggin@gmail.com> (raw)
In-Reply-To: <20240118150644.177371-1-npiggin@gmail.com>
From the Freescale PowerPC Architecture Primer:
Alternate time base APU. This APU, implemented on the e500v2, defines
a 64-bit time base counter that differs from the PowerPC defined time
base in that it is not writable and counts at a different, and
typically much higher, frequency. The alternate time base always
counts up, wrapping when the 64-bit count overflows.
This implementation of ATB uses the same frequency as the TB. The
existing spr_read_atbu/l functions are unused without this patch
to wire them into the SPR.
RTEMS uses this SPR on the r6500 (not yet tested).
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
target/ppc/cpu_init.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 8287494c39..b732a1b06e 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -920,6 +920,18 @@ static void register_BookE206_sprs(CPUPPCState *env, uint32_t mas_mask,
#endif
}
+static void register_atb_sprs(CPUPPCState *env)
+{
+ spr_register(env, SPR_ATBL, "ATBL",
+ &spr_read_atbl, SPR_NOACCESS,
+ &spr_read_atbl, SPR_NOACCESS,
+ 0x00000000);
+ spr_register(env, SPR_ATBU, "ATBU",
+ &spr_read_atbu, SPR_NOACCESS,
+ &spr_read_atbu, SPR_NOACCESS,
+ 0x00000000);
+}
+
/* SPR specific to PowerPC 440 implementation */
static void register_440_sprs(CPUPPCState *env)
{
@@ -2896,6 +2908,11 @@ static void init_proc_e500(CPUPPCState *env, int version)
register_BookE206_sprs(env, 0x000000DF, tlbncfg, mmucfg);
register_usprgh_sprs(env);
+ if (version != fsl_e500v1) {
+ /* e500v1 has no support for alternate timebase */
+ register_atb_sprs(env);
+ }
+
spr_register(env, SPR_HID0, "HID0",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
--
2.42.0
next prev parent reply other threads:[~2024-01-18 15:09 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-18 15:06 [PATCH 00/26] target/ppc: TCG improvements and fixes Nicholas Piggin
2024-01-18 15:06 ` [PATCH 01/26] target/ppc: Fix crash on machine check caused by ifetch Nicholas Piggin
2024-01-18 15:06 ` [PATCH 02/26] target/ppc: Prevent supervisor from modifying MSR[ME] Nicholas Piggin
2024-01-18 15:06 ` [PATCH 03/26] spapr: set MSR[ME] and MSR[FP] on client entry Nicholas Piggin
2024-01-18 15:06 ` [PATCH 04/26] target/ppc: Rename registers to match ISA Nicholas Piggin
2024-01-18 15:06 ` [PATCH 05/26] target/ppc: Update gdbstub to read SPR's CFAR, DEC, HDEC, TB-L/U Nicholas Piggin
2024-01-18 15:06 ` [PATCH 06/26] target/ppc: Rename TBL to TB on 64-bit Nicholas Piggin
2024-01-18 15:06 ` [PATCH 07/26] target/ppc: Improve timebase register defines naming Nicholas Piggin
2024-01-18 15:06 ` [PATCH 08/26] target/ppc: Fix move-to timebase SPR access permissions Nicholas Piggin
2024-01-18 15:06 ` [PATCH 09/26] pnv/chiptod: Add POWER9/10 chiptod model Nicholas Piggin
2024-01-18 15:06 ` [PATCH 10/26] ppc/pnv: Wire ChipTOD model to powernv9 and powernv10 machines Nicholas Piggin
2024-01-18 15:06 ` [PATCH 11/26] pnv/chiptod: Implement the ChipTOD to Core transfer Nicholas Piggin
2024-01-18 15:06 ` [PATCH 12/26] target/ppc: Implement core timebase state machine and TFMR Nicholas Piggin
2024-01-18 15:06 ` [PATCH 13/26] target/ppc: Add SMT support to time facilities Nicholas Piggin
2024-01-18 15:06 ` [PATCH 14/26] target/ppc: Add new hflags to support BHRB Nicholas Piggin
2024-01-18 15:06 ` [PATCH 15/26] target/ppc: Add recording of taken branches to BHRB Nicholas Piggin
2024-01-18 15:06 ` [PATCH 16/26] target/ppc: Add clrbhrb and mfbhrbe instructions Nicholas Piggin
2024-01-18 15:06 ` [PATCH 17/26] target/ppc: Add migration support for BHRB Nicholas Piggin
2024-01-18 15:06 ` [PATCH 18/26] target/ppc: BookE DECAR SPR is 32-bit Nicholas Piggin
2024-01-18 15:06 ` Nicholas Piggin [this message]
2024-01-18 15:06 ` [PATCH 20/26] target/ppc: Add PPR32 SPR Nicholas Piggin
2024-01-18 15:06 ` [PATCH 21/26] target/ppc: add helper to write per-LPAR SPRs Nicholas Piggin
2024-01-18 15:06 ` [PATCH 22/26] target/ppc: Add SMT support to simple SPRs Nicholas Piggin
2024-01-18 15:06 ` [PATCH 23/26] target/ppc: Add SMT support to PTCR SPR Nicholas Piggin
2024-01-18 15:06 ` [PATCH 24/26] target/ppc: Implement LDBAR, TTR SPRs Nicholas Piggin
2024-01-18 15:06 ` [PATCH 25/26] target/ppc: Implement SPRC/SPRD SPRs Nicholas Piggin
2024-01-18 15:06 ` [PATCH 26/26] target/ppc: add SMT support to msgsnd broadcast Nicholas Piggin
2024-01-19 8:58 ` [PATCH 00/26] target/ppc: TCG improvements and fixes Cédric Le Goater
2024-01-23 1:53 ` Nicholas Piggin
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