qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Igor Mitsyanko" <i.mitsyanko@gmail.com>,
	qemu-arm@nongnu.org,
	"Strahinja Jankovic" <strahinja.p.jankovic@gmail.com>,
	"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
	"Igor Mammedov" <imammedo@redhat.com>,
	"Cédric Le Goater" <clg@kaod.org>,
	"Eric Auger" <eric.auger@redhat.com>,
	"Niek Linnenbank" <nieklinnenbank@gmail.com>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	"Jan Kiszka" <jan.kiszka@web.de>,
	"Marcin Juszkiewicz" <marcin.juszkiewicz@linaro.org>,
	"Alistair Francis" <alistair@alistair23.me>,
	"Radoslaw Biernacki" <rad@semihalf.com>,
	"Andrew Jeffery" <andrew@codeconstruct.com.au>,
	"Andrey Smirnov" <andrew.smirnov@gmail.com>,
	"Rob Herring" <robh@kernel.org>,
	"Shannon Zhao" <shannon.zhaosl@gmail.com>,
	"Tyrone Ting" <kfting@nuvoton.com>,
	"Beniamino Galvani" <b.galvani@gmail.com>,
	"Alexander Graf" <agraf@csgraf.de>,
	"Leif Lindholm" <quic_llindhol@quicinc.com>,
	"Ani Sinha" <anisinha@redhat.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Jean-Christophe Dubois" <jcd@tribudubois.net>,
	"Joel Stanley" <joel@jms.id.au>, "Hao Wu" <wuhaotsh@google.com>,
	kvm@vger.kernel.org,
	"Richard Henderson" <richard.henderson@linaro.org>
Subject: [PATCH 19/20] target/arm: Move GTimer definitions to new 'gtimer.h' header
Date: Thu, 18 Jan 2024 21:06:40 +0100	[thread overview]
Message-ID: <20240118200643.29037-20-philmd@linaro.org> (raw)
In-Reply-To: <20240118200643.29037-1-philmd@linaro.org>

Move Arm A-class Generic Timer definitions to the new
"target/arm/gtimer.h" header so units in hw/ which don't
need access to ARMCPU internals can use them without
having to include the huge "cpu.h".

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/arm/cpu.h       |  8 +-------
 target/arm/gtimer.h    | 21 +++++++++++++++++++++
 hw/arm/allwinner-h3.c  |  1 +
 hw/arm/allwinner-r40.c |  1 +
 hw/arm/bcm2836.c       |  1 +
 hw/arm/sbsa-ref.c      |  1 +
 hw/arm/virt.c          |  1 +
 hw/arm/xlnx-versal.c   |  1 +
 hw/arm/xlnx-zynqmp.c   |  1 +
 hw/cpu/a15mpcore.c     |  1 +
 target/arm/cpu.c       |  1 +
 target/arm/helper.c    |  1 +
 target/arm/hvf/hvf.c   |  1 +
 target/arm/kvm.c       |  1 +
 target/arm/machine.c   |  1 +
 15 files changed, 35 insertions(+), 7 deletions(-)
 create mode 100644 target/arm/gtimer.h

diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index e8df41d642..d3477b1601 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -27,6 +27,7 @@
 #include "exec/cpu-defs.h"
 #include "qapi/qapi-types-common.h"
 #include "target/arm/multiprocessing.h"
+#include "target/arm/gtimer.h"
 
 /* ARM processors have a weak memory model */
 #define TCG_GUEST_DEFAULT_MO      (0)
@@ -140,13 +141,6 @@ typedef struct ARMGenericTimer {
     uint64_t ctl; /* Timer Control register */
 } ARMGenericTimer;
 
-#define GTIMER_PHYS     0
-#define GTIMER_VIRT     1
-#define GTIMER_HYP      2
-#define GTIMER_SEC      3
-#define GTIMER_HYPVIRT  4
-#define NUM_GTIMERS     5
-
 #define VTCR_NSW (1u << 29)
 #define VTCR_NSA (1u << 30)
 #define VSTCR_SW VTCR_NSW
diff --git a/target/arm/gtimer.h b/target/arm/gtimer.h
new file mode 100644
index 0000000000..b992941bef
--- /dev/null
+++ b/target/arm/gtimer.h
@@ -0,0 +1,21 @@
+/*
+ * ARM generic timer definitions for Arm A-class CPU
+ *
+ *  Copyright (c) 2003 Fabrice Bellard
+ *
+ * SPDX-License-Identifier: LGPL-2.1-or-later
+ */
+
+#ifndef TARGET_ARM_GTIMER_H
+#define TARGET_ARM_GTIMER_H
+
+enum {
+    GTIMER_PHYS     = 0,
+    GTIMER_VIRT     = 1,
+    GTIMER_HYP      = 2,
+    GTIMER_SEC      = 3,
+    GTIMER_HYPVIRT  = 4,
+#define NUM_GTIMERS   5
+};
+
+#endif
diff --git a/hw/arm/allwinner-h3.c b/hw/arm/allwinner-h3.c
index 2d684b5287..380e0ec11d 100644
--- a/hw/arm/allwinner-h3.c
+++ b/hw/arm/allwinner-h3.c
@@ -31,6 +31,7 @@
 #include "sysemu/sysemu.h"
 #include "hw/arm/allwinner-h3.h"
 #include "target/arm/cpu-qom.h"
+#include "target/arm/gtimer.h"
 
 /* Memory map */
 const hwaddr allwinner_h3_memmap[] = {
diff --git a/hw/arm/allwinner-r40.c b/hw/arm/allwinner-r40.c
index 65392dbc23..898bef9d93 100644
--- a/hw/arm/allwinner-r40.c
+++ b/hw/arm/allwinner-r40.c
@@ -33,6 +33,7 @@
 #include "hw/arm/allwinner-r40.h"
 #include "hw/misc/allwinner-r40-dramc.h"
 #include "target/arm/cpu-qom.h"
+#include "target/arm/gtimer.h"
 
 /* Memory map */
 const hwaddr allwinner_r40_memmap[] = {
diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
index 58a78780d2..e3ba18a8ec 100644
--- a/hw/arm/bcm2836.c
+++ b/hw/arm/bcm2836.c
@@ -16,6 +16,7 @@
 #include "hw/arm/raspi_platform.h"
 #include "hw/sysbus.h"
 #include "target/arm/cpu-qom.h"
+#include "target/arm/gtimer.h"
 
 struct BCM283XClass {
     /*< private >*/
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index d6081bfc41..85cb68d546 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -51,6 +51,7 @@
 #include "qapi/qmp/qlist.h"
 #include "qom/object.h"
 #include "target/arm/cpu-qom.h"
+#include "target/arm/gtimer.h"
 
 #define RAMLIMIT_GB 8192
 #define RAMLIMIT_BYTES (RAMLIMIT_GB * GiB)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 0ab5fd9477..bdfcf028a0 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -76,6 +76,7 @@
 #include "target/arm/cpu-qom.h"
 #include "target/arm/internals.h"
 #include "target/arm/multiprocessing.h"
+#include "target/arm/gtimer.h"
 #include "hw/mem/pc-dimm.h"
 #include "hw/mem/nvdimm.h"
 #include "hw/acpi/generic_event_device.h"
diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
index 87fdb39d43..2798df3730 100644
--- a/hw/arm/xlnx-versal.c
+++ b/hw/arm/xlnx-versal.c
@@ -24,6 +24,7 @@
 #include "hw/arm/xlnx-versal.h"
 #include "qemu/log.h"
 #include "target/arm/cpu-qom.h"
+#include "target/arm/gtimer.h"
 
 #define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72")
 #define XLNX_VERSAL_RCPU_TYPE ARM_CPU_TYPE_NAME("cortex-r5f")
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index 38cb34942f..65901c6e74 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx-zynqmp.c
@@ -26,6 +26,7 @@
 #include "sysemu/sysemu.h"
 #include "kvm_arm.h"
 #include "target/arm/cpu-qom.h"
+#include "target/arm/gtimer.h"
 
 #define GIC_NUM_SPI_INTR 160
 
diff --git a/hw/cpu/a15mpcore.c b/hw/cpu/a15mpcore.c
index bfd8aa5644..967d8d3dd5 100644
--- a/hw/cpu/a15mpcore.c
+++ b/hw/cpu/a15mpcore.c
@@ -26,6 +26,7 @@
 #include "hw/qdev-properties.h"
 #include "sysemu/kvm.h"
 #include "kvm_arm.h"
+#include "target/arm/gtimer.h"
 
 static void a15mp_priv_set_irq(void *opaque, int irq, int level)
 {
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 07357daabe..4c57b9c3b8 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -49,6 +49,7 @@
 #include "fpu/softfloat.h"
 #include "cpregs.h"
 #include "target/arm/cpu-qom.h"
+#include "target/arm/gtimer.h"
 
 static void arm_cpu_set_pc(CPUState *cs, vaddr value)
 {
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 1ef00e50e4..39e2ba25c8 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -30,6 +30,7 @@
 #include "semihosting/common-semi.h"
 #endif
 #include "cpregs.h"
+#include "target/arm/gtimer.h"
 
 #define ARM_CPU_FREQ 1000000000 /* FIXME: 1 GHz, should be configurable */
 
diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c
index 71a26db188..e5f0f60093 100644
--- a/target/arm/hvf/hvf.c
+++ b/target/arm/hvf/hvf.c
@@ -29,6 +29,7 @@
 #include "target/arm/cpu.h"
 #include "target/arm/internals.h"
 #include "target/arm/multiprocessing.h"
+#include "target/arm/gtimer.h"
 #include "trace/trace-target_arm_hvf.h"
 #include "migration/vmstate.h"
 
diff --git a/target/arm/kvm.c b/target/arm/kvm.c
index 8f52b211f9..81813030a5 100644
--- a/target/arm/kvm.c
+++ b/target/arm/kvm.c
@@ -38,6 +38,7 @@
 #include "qemu/log.h"
 #include "hw/acpi/acpi.h"
 #include "hw/acpi/ghes.h"
+#include "target/arm/gtimer.h"
 
 const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
     KVM_CAP_LAST_INFO
diff --git a/target/arm/machine.c b/target/arm/machine.c
index 542be14bec..9d7dbaea54 100644
--- a/target/arm/machine.c
+++ b/target/arm/machine.c
@@ -7,6 +7,7 @@
 #include "internals.h"
 #include "cpu-features.h"
 #include "migration/cpu.h"
+#include "target/arm/gtimer.h"
 
 static bool vfp_needed(void *opaque)
 {
-- 
2.41.0



  parent reply	other threads:[~2024-01-18 20:11 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-18 20:06 [PATCH 00/20] arm: Rework target/ headers to build various hw/ files once Philippe Mathieu-Daudé
2024-01-18 20:06 ` [PATCH 01/20] hw/arm/exynos4210: Include missing 'exec/tswap.h' header Philippe Mathieu-Daudé
2024-01-18 20:06 ` [PATCH 02/20] hw/arm/xilinx_zynq: " Philippe Mathieu-Daudé
2024-01-18 20:06 ` [PATCH 03/20] hw/arm/smmuv3: Include missing 'hw/registerfields.h' header Philippe Mathieu-Daudé
2024-01-18 20:06 ` [PATCH 04/20] hw/arm/xlnx-versal: Include missing 'cpu.h' header Philippe Mathieu-Daudé
2024-01-18 20:06 ` [PATCH 05/20] target/arm/cpu-features: Include missing 'hw/registerfields.h' header Philippe Mathieu-Daudé
2024-01-18 20:06 ` [PATCH 06/20] target/arm/cpregs: " Philippe Mathieu-Daudé
2024-01-18 20:06 ` [PATCH 07/20] target/arm/cpregs: Include missing 'kvm-consts.h' header Philippe Mathieu-Daudé
2024-01-18 20:06 ` [PATCH 08/20] target/arm: Rename arm_cpu_mp_affinity Philippe Mathieu-Daudé
2024-04-15 12:51   ` Peter Maydell
2024-01-18 20:06 ` [PATCH 09/20] target/arm: Create arm_cpu_mp_affinity Philippe Mathieu-Daudé
2024-01-18 20:06 ` [PATCH 10/20] target/arm: Expose arm_cpu_mp_affinity() in 'multiprocessing.h' header Philippe Mathieu-Daudé
2024-01-18 20:06 ` [PATCH 11/20] target/arm: Declare ARM_CPU_TYPE_NAME/SUFFIX in 'cpu-qom.h' Philippe Mathieu-Daudé
2024-01-18 20:06 ` [PATCH 12/20] hw/cpu/a9mpcore: Build it only once Philippe Mathieu-Daudé
2024-01-18 20:06 ` [PATCH 13/20] hw/misc/xlnx-versal-crl: Include generic 'cpu-qom.h' instead of 'cpu.h' Philippe Mathieu-Daudé
2024-01-18 20:06 ` [PATCH 14/20] hw/misc/xlnx-versal-crl: Build it only once Philippe Mathieu-Daudé
2024-01-18 20:06 ` [PATCH 15/20] target/arm: Expose M-profile register bank index definitions Philippe Mathieu-Daudé
2024-01-18 20:06 ` [PATCH 16/20] hw/arm/armv7m: Make 'hw/intc/armv7m_nvic.h' a target agnostic header Philippe Mathieu-Daudé
2024-01-18 20:06 ` [PATCH 17/20] target/arm: Move ARM_CPU_IRQ/FIQ definitions to 'cpu-qom.h' header Philippe Mathieu-Daudé
2024-01-18 20:06 ` [PATCH 18/20] target/arm: Move e2h_access() helper around Philippe Mathieu-Daudé
2024-01-18 20:06 ` Philippe Mathieu-Daudé [this message]
2024-01-18 20:06 ` [PATCH 20/20] hw/arm: Build various units only once Philippe Mathieu-Daudé
2024-01-18 20:08 ` [PATCH 00/20] arm: Rework target/ headers to build various hw/ files once Philippe Mathieu-Daudé
2024-01-18 22:20 ` Richard Henderson
2024-01-19 18:09 ` Peter Maydell

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20240118200643.29037-20-philmd@linaro.org \
    --to=philmd@linaro.org \
    --cc=agraf@csgraf.de \
    --cc=alistair@alistair23.me \
    --cc=andrew.smirnov@gmail.com \
    --cc=andrew@codeconstruct.com.au \
    --cc=anisinha@redhat.com \
    --cc=b.galvani@gmail.com \
    --cc=clg@kaod.org \
    --cc=edgar.iglesias@gmail.com \
    --cc=eric.auger@redhat.com \
    --cc=i.mitsyanko@gmail.com \
    --cc=imammedo@redhat.com \
    --cc=jan.kiszka@web.de \
    --cc=jcd@tribudubois.net \
    --cc=joel@jms.id.au \
    --cc=kfting@nuvoton.com \
    --cc=kvm@vger.kernel.org \
    --cc=marcin.juszkiewicz@linaro.org \
    --cc=mst@redhat.com \
    --cc=nieklinnenbank@gmail.com \
    --cc=pbonzini@redhat.com \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    --cc=quic_llindhol@quicinc.com \
    --cc=rad@semihalf.com \
    --cc=richard.henderson@linaro.org \
    --cc=robh@kernel.org \
    --cc=shannon.zhaosl@gmail.com \
    --cc=strahinja.p.jankovic@gmail.com \
    --cc=wuhaotsh@google.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).