From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, qemu-s390x@nongnu.org,
qemu-block@nongnu.org, qemu-arm@nongnu.org,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Michael Tokarev" <mjt@tls.msk.ru>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Eduardo Habkost" <eduardo@habkost.net>
Subject: [PULL 27/36] target/i386: Rename tcg_cpu_FOO() to include 'x86'
Date: Fri, 19 Jan 2024 12:34:56 +0100 [thread overview]
Message-ID: <20240119113507.31951-28-philmd@linaro.org> (raw)
In-Reply-To: <20240119113507.31951-1-philmd@linaro.org>
The tcg_cpu_FOO() names are x86 specific, so rename
them as x86_tcg_cpu_FOO() (as other names in this file)
to ease navigating the code.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael Tokarev <mjt@tls.msk.ru>
Message-ID: <20240111120221.35072-5-philmd@linaro.org>
---
target/i386/tcg/tcg-cpu.c | 32 ++++++++++++++++----------------
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/target/i386/tcg/tcg-cpu.c b/target/i386/tcg/tcg-cpu.c
index 6e881e9e27..e56489caea 100644
--- a/target/i386/tcg/tcg-cpu.c
+++ b/target/i386/tcg/tcg-cpu.c
@@ -114,18 +114,18 @@ static const struct TCGCPUOps x86_tcg_ops = {
#endif /* !CONFIG_USER_ONLY */
};
-static void tcg_cpu_init_ops(AccelCPUClass *accel_cpu, CPUClass *cc)
+static void x86_tcg_cpu_init_ops(AccelCPUClass *accel_cpu, CPUClass *cc)
{
/* for x86, all cpus use the same set of operations */
cc->tcg_ops = &x86_tcg_ops;
}
-static void tcg_cpu_class_init(CPUClass *cc)
+static void x86_tcg_cpu_class_init(CPUClass *cc)
{
- cc->init_accel_cpu = tcg_cpu_init_ops;
+ cc->init_accel_cpu = x86_tcg_cpu_init_ops;
}
-static void tcg_cpu_xsave_init(void)
+static void x86_tcg_cpu_xsave_init(void)
{
#define XO(bit, field) \
x86_ext_save_areas[bit].offset = offsetof(X86XSaveArea, field);
@@ -147,25 +147,25 @@ static void tcg_cpu_xsave_init(void)
* TCG-specific defaults that override cpudef models when using TCG.
* Only for builtin_x86_defs models initialized with x86_register_cpudef_types.
*/
-static PropValue tcg_default_props[] = {
+static PropValue x86_tcg_default_props[] = {
{ "vme", "off" },
{ NULL, NULL },
};
-static void tcg_cpu_instance_init(CPUState *cs)
+static void x86_tcg_cpu_instance_init(CPUState *cs)
{
X86CPU *cpu = X86_CPU(cs);
X86CPUClass *xcc = X86_CPU_GET_CLASS(cpu);
if (xcc->model) {
/* Special cases not set in the X86CPUDefinition structs: */
- x86_cpu_apply_props(cpu, tcg_default_props);
+ x86_cpu_apply_props(cpu, x86_tcg_default_props);
}
- tcg_cpu_xsave_init();
+ x86_tcg_cpu_xsave_init();
}
-static void tcg_cpu_accel_class_init(ObjectClass *oc, void *data)
+static void x86_tcg_cpu_accel_class_init(ObjectClass *oc, void *data)
{
AccelCPUClass *acc = ACCEL_CPU_CLASS(oc);
@@ -173,18 +173,18 @@ static void tcg_cpu_accel_class_init(ObjectClass *oc, void *data)
acc->cpu_target_realize = tcg_cpu_realizefn;
#endif /* CONFIG_USER_ONLY */
- acc->cpu_class_init = tcg_cpu_class_init;
- acc->cpu_instance_init = tcg_cpu_instance_init;
+ acc->cpu_class_init = x86_tcg_cpu_class_init;
+ acc->cpu_instance_init = x86_tcg_cpu_instance_init;
}
-static const TypeInfo tcg_cpu_accel_type_info = {
+static const TypeInfo x86_tcg_cpu_accel_type_info = {
.name = ACCEL_CPU_NAME("tcg"),
.parent = TYPE_ACCEL_CPU,
- .class_init = tcg_cpu_accel_class_init,
+ .class_init = x86_tcg_cpu_accel_class_init,
.abstract = true,
};
-static void tcg_cpu_accel_register_types(void)
+static void x86_tcg_cpu_accel_register_types(void)
{
- type_register_static(&tcg_cpu_accel_type_info);
+ type_register_static(&x86_tcg_cpu_accel_type_info);
}
-type_init(tcg_cpu_accel_register_types);
+type_init(x86_tcg_cpu_accel_register_types);
--
2.41.0
next prev parent reply other threads:[~2024-01-19 11:44 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-19 11:34 [PULL 00/36] HW core patches for 2024-01-19 Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 01/36] hw/timer/hpet: Convert DPRINTF to trace events Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 02/36] backends/cryptodev: Do not ignore throttle/backends Errors Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 03/36] accel: Do not set CPUState::tcg_cflags in non-TCG accels Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 04/36] accel: Do not set CPUState::can_do_io " Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 05/36] target/xtensa: use generic instruction breakpoint infrastructure Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 06/36] tests/tcg/xtensa: add icount/ibreak priority test Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 07/36] accel/tcg: Remove unused tb_invalidate_phys_addr() Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 08/36] accel/tcg: Remove tb_invalidate_phys_page() from system emulation Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 09/36] target/alpha: Extract clk_helper.c from sys_helper.c Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 10/36] target/alpha: Only build sys_helper.c on system emulation Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 11/36] system/cpu-timers: Have icount_configure() return a boolean Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 12/36] system/cpu-timers: Introduce ICountMode enumerator Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 13/36] target/arm: Ensure icount is enabled when emulating INST_RETIRED Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 14/36] util/async: Only call icount_notify_exit() if icount is enabled Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 15/36] target/sh4: Deprecate the shix machine Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 16/36] hw/block: Deprecate the TC58128 block device Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 17/36] hw/i386/pc_piix: Make piix_intx_routing_notifier_xen() more device independent Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 18/36] hw/pflash: refactor pflash_data_write() Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 19/36] hw/pflash: use ldn_{be,le}_p and stn_{be,le}_p Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 20/36] hw/pflash: implement update buffer for block writes Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 21/36] system/replay: Restrict icount to system emulation Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 22/36] system/watchpoint: Move TCG specific code to accel/tcg/ Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 23/36] cpus: Restrict 'start-powered-off' property to system emulation Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 24/36] accel: Rename accel_init_ops_interfaces() to include 'system' Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 25/36] hw/core/cpu: Rename cpu_class_init() to include 'common' Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 26/36] hw/s390x: Rename cpu_class_init() to include 'sclp' Philippe Mathieu-Daudé
2024-01-19 11:34 ` Philippe Mathieu-Daudé [this message]
2024-01-19 11:34 ` [PULL 28/36] target/riscv: Rename tcg_cpu_FOO() to include 'riscv' Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 29/36] hw/scsi/esp-pci: use correct address register for PCI DMA transfers Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 30/36] hw/scsi/esp-pci: generate PCI interrupt from separate ESP and PCI sources Philippe Mathieu-Daudé
2024-01-19 11:35 ` [PULL 31/36] hw/scsi/esp-pci: synchronise setting of DMA_STAT_DONE with ESP completion interrupt Philippe Mathieu-Daudé
2024-01-19 11:35 ` [PULL 32/36] hw/scsi/esp-pci: set DMA_STAT_BCMBLT when BLAST command issued Philippe Mathieu-Daudé
2024-01-19 11:35 ` [PULL 33/36] hw/elf_ops: Ignore loadable segments with zero size Philippe Mathieu-Daudé
2024-01-24 20:48 ` Alex Bennée
2024-01-19 11:35 ` [PULL 34/36] MAINTAINERS: Update Raphael Norwitz email Philippe Mathieu-Daudé
2024-01-19 11:35 ` [PULL 35/36] MAINTAINERS: Update hw/core/cpu.c entry Philippe Mathieu-Daudé
2024-01-19 11:35 ` [PULL 36/36] configure: Add linux header compile support for LoongArch Philippe Mathieu-Daudé
2024-01-19 16:41 ` [PULL 00/36] HW core patches for 2024-01-19 Peter Maydell
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