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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, qemu-s390x@nongnu.org,
	qemu-block@nongnu.org, qemu-arm@nongnu.org,
	"Mark Cave-Ayland" <mark.cave-ayland@ilande.co.uk>,
	"Guenter Roeck" <linux@roeck-us.net>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Fam Zheng" <fam@euphon.net>
Subject: [PULL 29/36] hw/scsi/esp-pci: use correct address register for PCI DMA transfers
Date: Fri, 19 Jan 2024 12:34:58 +0100	[thread overview]
Message-ID: <20240119113507.31951-30-philmd@linaro.org> (raw)
In-Reply-To: <20240119113507.31951-1-philmd@linaro.org>

From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>

The current code in esp_pci_dma_memory_rw() sets the DMA address to the value
of the DMA_SPA (Starting Physical Address) register which is incorrect: this
means that for each callback from the SCSI layer the DMA address is set back
to the starting address.

In the case where only a single SCSI callback occurs (currently for transfer
lengths < 128kB) this works fine, however for larger transfers the DMA address
wraps back to the initial starting address, corrupting the buffer holding the
data transferred to the guest.

Fix esp_pci_dma_memory_rw() to use the DMA_WAC (Working Address Counter) for
the DMA address which is correctly incremented across multiple SCSI layer
transfers.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Message-ID: <20240112131529.515642-2-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 hw/scsi/esp-pci.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/scsi/esp-pci.c b/hw/scsi/esp-pci.c
index 93b3429e0f..7117725371 100644
--- a/hw/scsi/esp-pci.c
+++ b/hw/scsi/esp-pci.c
@@ -275,7 +275,7 @@ static void esp_pci_dma_memory_rw(PCIESPState *pci, uint8_t *buf, int len,
         qemu_log_mask(LOG_UNIMP, "am53c974: MDL transfer not implemented\n");
     }
 
-    addr = pci->dma_regs[DMA_SPA];
+    addr = pci->dma_regs[DMA_WAC];
     if (pci->dma_regs[DMA_WBC] < len) {
         len = pci->dma_regs[DMA_WBC];
     }
-- 
2.41.0



  parent reply	other threads:[~2024-01-19 11:43 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-19 11:34 [PULL 00/36] HW core patches for 2024-01-19 Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 01/36] hw/timer/hpet: Convert DPRINTF to trace events Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 02/36] backends/cryptodev: Do not ignore throttle/backends Errors Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 03/36] accel: Do not set CPUState::tcg_cflags in non-TCG accels Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 04/36] accel: Do not set CPUState::can_do_io " Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 05/36] target/xtensa: use generic instruction breakpoint infrastructure Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 06/36] tests/tcg/xtensa: add icount/ibreak priority test Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 07/36] accel/tcg: Remove unused tb_invalidate_phys_addr() Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 08/36] accel/tcg: Remove tb_invalidate_phys_page() from system emulation Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 09/36] target/alpha: Extract clk_helper.c from sys_helper.c Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 10/36] target/alpha: Only build sys_helper.c on system emulation Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 11/36] system/cpu-timers: Have icount_configure() return a boolean Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 12/36] system/cpu-timers: Introduce ICountMode enumerator Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 13/36] target/arm: Ensure icount is enabled when emulating INST_RETIRED Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 14/36] util/async: Only call icount_notify_exit() if icount is enabled Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 15/36] target/sh4: Deprecate the shix machine Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 16/36] hw/block: Deprecate the TC58128 block device Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 17/36] hw/i386/pc_piix: Make piix_intx_routing_notifier_xen() more device independent Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 18/36] hw/pflash: refactor pflash_data_write() Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 19/36] hw/pflash: use ldn_{be,le}_p and stn_{be,le}_p Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 20/36] hw/pflash: implement update buffer for block writes Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 21/36] system/replay: Restrict icount to system emulation Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 22/36] system/watchpoint: Move TCG specific code to accel/tcg/ Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 23/36] cpus: Restrict 'start-powered-off' property to system emulation Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 24/36] accel: Rename accel_init_ops_interfaces() to include 'system' Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 25/36] hw/core/cpu: Rename cpu_class_init() to include 'common' Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 26/36] hw/s390x: Rename cpu_class_init() to include 'sclp' Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 27/36] target/i386: Rename tcg_cpu_FOO() to include 'x86' Philippe Mathieu-Daudé
2024-01-19 11:34 ` [PULL 28/36] target/riscv: Rename tcg_cpu_FOO() to include 'riscv' Philippe Mathieu-Daudé
2024-01-19 11:34 ` Philippe Mathieu-Daudé [this message]
2024-01-19 11:34 ` [PULL 30/36] hw/scsi/esp-pci: generate PCI interrupt from separate ESP and PCI sources Philippe Mathieu-Daudé
2024-01-19 11:35 ` [PULL 31/36] hw/scsi/esp-pci: synchronise setting of DMA_STAT_DONE with ESP completion interrupt Philippe Mathieu-Daudé
2024-01-19 11:35 ` [PULL 32/36] hw/scsi/esp-pci: set DMA_STAT_BCMBLT when BLAST command issued Philippe Mathieu-Daudé
2024-01-19 11:35 ` [PULL 33/36] hw/elf_ops: Ignore loadable segments with zero size Philippe Mathieu-Daudé
2024-01-24 20:48   ` Alex Bennée
2024-01-19 11:35 ` [PULL 34/36] MAINTAINERS: Update Raphael Norwitz email Philippe Mathieu-Daudé
2024-01-19 11:35 ` [PULL 35/36] MAINTAINERS: Update hw/core/cpu.c entry Philippe Mathieu-Daudé
2024-01-19 11:35 ` [PULL 36/36] configure: Add linux header compile support for LoongArch Philippe Mathieu-Daudé
2024-01-19 16:41 ` [PULL 00/36] HW core patches for 2024-01-19 Peter Maydell

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