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From: Andrew Jones <ajones@ventanamicro.com>
To: Akihiko Odaki <akihiko.odaki@daynix.com>
Cc: "Alex Bennée" <alex.bennee@linaro.org>,
	qemu-devel@nongnu.org,
	"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
	"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Michael Rolnik" <mrolnik@gmail.com>,
	"Marc-André Lureau" <marcandre.lureau@redhat.com>,
	"Laurent Vivier" <lvivier@redhat.com>,
	kvm@vger.kernel.org,
	"Yoshinori Sato" <ysato@users.sourceforge.jp>,
	"Pierrick Bouvier" <pierrick.bouvier@linaro.org>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
	"Laurent Vivier" <laurent@vivier.eu>,
	"Yanan Wang" <wangyanan55@huawei.com>,
	qemu-ppc@nongnu.org, "Weiwei Li" <liwei1518@gmail.com>,
	qemu-s390x@nongnu.org, "Cédric Le Goater" <clg@kaod.org>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Alexandre Iooss" <erdnaxe@crans.org>,
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	"Wainer dos Santos Moschetta" <wainersm@redhat.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Ilya Leoshkevich" <iii@linux.ibm.com>,
	"Alistair Francis" <alistair.francis@wdc.com>,
	"David Woodhouse" <dwmw2@infradead.org>,
	"Cleber Rosa" <crosa@redhat.com>,
	"Beraldo Leal" <bleal@redhat.com>,
	"Bin Meng" <bin.meng@windriver.com>,
	"Nicholas Piggin" <npiggin@gmail.com>,
	"Aurelien Jarno" <aurelien@aurel32.net>,
	"Daniel Henrique Barboza" <danielhb413@gmail.com>,
	"Daniel Henrique Barboza" <dbarboza@ventanamicro.com>,
	"Thomas Huth" <thuth@redhat.com>,
	"David Hildenbrand" <david@redhat.com>,
	qemu-riscv@nongnu.org, qemu-arm@nongnu.org,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Song Gao" <gaosong@loongson.cn>,
	"Eduardo Habkost" <eduardo@habkost.net>,
	"Brian Cain" <bcain@quicinc.com>, "Paul Durrant" <paul@xen.org>
Subject: Re: Re: [PATCH v3 01/21] hw/riscv: Use misa_mxl instead of misa_mxl_max
Date: Wed, 24 Jan 2024 09:16:51 +0100	[thread overview]
Message-ID: <20240124-3d9bec68bff7ab0057b902b6@orel> (raw)
In-Reply-To: <15d2f958-a51e-4b87-9a70-28edf3b55491@daynix.com>

On Wed, Jan 24, 2024 at 12:08:33PM +0900, Akihiko Odaki wrote:
> On 2024/01/23 17:20, Andrew Jones wrote:
> > On Mon, Jan 22, 2024 at 02:55:50PM +0000, Alex Bennée wrote:
> > > From: Akihiko Odaki <akihiko.odaki@daynix.com>
> > > 
> > > The effective MXL value matters when booting.
> > 
> > I'd prefer this commit message get some elaboration. riscv_is_32bit()
> > is used in a variety of contexts, some where it should be reporting
> > the max misa.mxl. However, when used for booting an S-mode kernel it
> > should indeed report the effective mxl. I think we're fine with the
> > change, though, because at init and on reset the effective mxl is set
> > to the max mxl, so, in those contexts, where riscv_is_32bit() should
> > be reporting the max, it does.
> > 
> > > 
> > > Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
> > > Message-Id: <20240103173349.398526-23-alex.bennee@linaro.org>
> > > Message-Id: <20231213-riscv-v7-1-a760156a337f@daynix.com>
> > > Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> > > ---
> > >   hw/riscv/boot.c | 2 +-
> > >   1 file changed, 1 insertion(+), 1 deletion(-)
> > > 
> > > diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c
> > > index 0ffca05189f..bc67c0bd189 100644
> > > --- a/hw/riscv/boot.c
> > > +++ b/hw/riscv/boot.c
> > > @@ -36,7 +36,7 @@
> > >   bool riscv_is_32bit(RISCVHartArrayState *harts)
> > >   {
> > > -    return harts->harts[0].env.misa_mxl_max == MXL_RV32;
> > > +    return harts->harts[0].env.misa_mxl == MXL_RV32;
> > >   }
> > 
> > Assuming everyone agrees with what I've written above, then maybe we
> > should write something similar in a comment above this function.
> > 
> > Thanks,
> > drew
> 
> The corresponding commit in my series has a more elaborated message:
> https://patchew.org/QEMU/20240115-riscv-v9-0-ff171e1aedc8@daynix.com/20240115-riscv-v9-1-ff171e1aedc8@daynix.com/

I've pulled the message from that link and quoted it below

> A later commit requires one extra step to retrieve misa_mxl_max. As
> misa_mxl is semantically more correct and does not need such a extra
> step, refer to misa_mxl instead. Below is the explanation why misa_mxl
> is more semantically correct to refer to than misa_mxl_max in this case.
> 
> Currently misa_mxl always equals to misa_mxl_max so it does not matter

That's true, but I think that's due to a bug in write_misa(), which
shouldn't be masking val with the extension mask until mxl has been
extracted.

> which of misa_mxl or misa_mxl_max to refer to. However, it is possible
> to have different values for misa_mxl and misa_mxl_max if QEMU gains a
> new feature to load a RV32 kernel on a RV64 system, for example. For
> such a behavior, the real system will need the firmware to switch MXL to
> RV32, and if QEMU implements the same behavior, mxl will represent the
> MXL that corresponds to the kernel being loaded. Therefore, it is more
> appropriate to refer to mxl instead of misa_mxl_max when
> misa_mxl != misa_mxl_max.

Right, but that doesn't say anything more than the original one line,
"The effective MXL value matters when booting."

What I'm looking for is a code comment explaining how riscv_is_32bit()
is always safe to use. Something like

 /*
  * Checking the effective mxl is always correct, because the effective
  * mxl will be equal to the max mxl at initialization and also on reset,
  * which are the times when it should check the maximum mxl. Later, if
  * firmware writes misa with a smaller mxl, then that mxl should be
  * used in checks.
  */

Thanks,
drew


  reply	other threads:[~2024-01-24  8:18 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-22 14:55 [PATCH v3 00/21] plugin updates (register access) for 9.0 (pre-PR?) Alex Bennée
2024-01-22 14:55 ` [PATCH v3 01/21] hw/riscv: Use misa_mxl instead of misa_mxl_max Alex Bennée
2024-01-23  5:48   ` Alistair Francis
2024-01-23  8:20   ` Andrew Jones
2024-01-24  3:08     ` Akihiko Odaki
2024-01-24  8:16       ` Andrew Jones [this message]
2024-01-25  8:23         ` Akihiko Odaki
2024-01-25 11:41           ` Andrew Jones
2024-01-22 14:55 ` [PATCH v3 02/21] target/riscv: Remove misa_mxl validation Alex Bennée
2024-01-22 14:55 ` [PATCH v3 03/21] target/riscv: Move misa_mxl_max to class Alex Bennée
2024-01-22 14:55 ` [PATCH v3 04/21] target/riscv: Validate misa_mxl_max only once Alex Bennée
2024-01-22 14:55 ` [PATCH v3 05/21] target/arm: Use GDBFeature for dynamic XML Alex Bennée
2024-01-22 14:55 ` [PATCH v3 06/21] target/ppc: " Alex Bennée
2024-01-22 14:55 ` [PATCH v3 07/21] target/riscv: " Alex Bennée
2024-01-22 14:55 ` [PATCH v3 08/21] gdbstub: Use GDBFeature for gdb_register_coprocessor Alex Bennée
2024-01-22 14:55 ` [PATCH v3 09/21] gdbstub: Use GDBFeature for GDBRegisterState Alex Bennée
2024-01-22 14:55 ` [PATCH v3 10/21] gdbstub: Change gdb_get_reg_cb and gdb_set_reg_cb Alex Bennée
2024-01-22 14:56 ` [PATCH v3 11/21] gdbstub: Simplify XML lookup Alex Bennée
2024-01-22 14:56 ` [PATCH v3 12/21] gdbstub: Infer number of core registers from XML Alex Bennée
2024-01-22 14:56 ` [PATCH v3 13/21] hw/core/cpu: Remove gdb_get_dynamic_xml member Alex Bennée
2024-01-22 14:56 ` [PATCH v3 14/21] gdbstub: Add members to identify registers to GDBFeature Alex Bennée
2024-01-22 14:56 ` [PATCH v3 15/21] plugins: Use different helpers when reading registers Alex Bennée
2024-01-22 14:56 ` [PATCH v3 16/21] gdbstub: expose api to find registers Alex Bennée
2024-02-03 11:23   ` Akihiko Odaki
2024-02-03 11:44     ` Alex Bennée
2024-02-03 11:56       ` Akihiko Odaki
2024-01-22 14:56 ` [PATCH v3 17/21] plugins: add an API to read registers Alex Bennée
2024-01-22 14:56 ` [PATCH v3 18/21] contrib/plugins: fix imatch Alex Bennée
2024-01-22 14:56 ` [PATCH v3 19/21] contrib/plugins: extend execlog to track register changes Alex Bennée
2024-01-24  5:54   ` Pierrick Bouvier
2024-01-22 14:56 ` [PATCH v3 20/21] docs/devel: lift example and plugin API sections up Alex Bennée
2024-01-22 14:56 ` [PATCH v3 21/21] docs/devel: document some plugin assumptions Alex Bennée
2024-02-01 12:13 ` [PATCH v3 00/21] plugin updates (register access) for 9.0 (pre-PR?) Alex Bennée

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