From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: philmd@linaro.org, anjo@rev.ng
Subject: [PATCH 15/33] target/mips: Pass ptw_mmu_idx down from mips_cpu_tlb_fill
Date: Tue, 30 Jan 2024 09:30:25 +1000 [thread overview]
Message-ID: <20240129233043.34558-16-richard.henderson@linaro.org> (raw)
In-Reply-To: <20240129233043.34558-1-richard.henderson@linaro.org>
Rather than adjust env->hflags so that the value computed
by cpu_mmu_index() changes, compute the mmu_idx that we
want directly and pass it down.
Introduce symbolic constants for MMU_{KERNEL,ERL}_IDX.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/mips/cpu.h | 4 +++-
target/mips/tcg/sysemu/tlb_helper.c | 32 ++++++++++++-----------------
2 files changed, 16 insertions(+), 20 deletions(-)
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 1163a71f3c..3ba8dccd2d 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -1242,12 +1242,14 @@ uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState *env);
* MMU modes definitions. We carefully match the indices with our
* hflags layout.
*/
+#define MMU_KERNEL_IDX 0
#define MMU_USER_IDX 2
+#define MMU_ERL_IDX 3
static inline int hflags_mmu_index(uint32_t hflags)
{
if (hflags & MIPS_HFLAG_ERL) {
- return 3; /* ERL */
+ return MMU_ERL_IDX;
} else {
return hflags & MIPS_HFLAG_KSU;
}
diff --git a/target/mips/tcg/sysemu/tlb_helper.c b/target/mips/tcg/sysemu/tlb_helper.c
index 4ede904800..b715449114 100644
--- a/target/mips/tcg/sysemu/tlb_helper.c
+++ b/target/mips/tcg/sysemu/tlb_helper.c
@@ -623,7 +623,7 @@ static uint64_t get_tlb_entry_layout(CPUMIPSState *env, uint64_t entry,
static int walk_directory(CPUMIPSState *env, uint64_t *vaddr,
int directory_index, bool *huge_page, bool *hgpg_directory_hit,
uint64_t *pw_entrylo0, uint64_t *pw_entrylo1,
- unsigned directory_shift, unsigned leaf_shift)
+ unsigned directory_shift, unsigned leaf_shift, int ptw_mmu_idx)
{
int dph = (env->CP0_PWCtl >> CP0PC_DPH) & 0x1;
int psn = (env->CP0_PWCtl >> CP0PC_PSN) & 0x3F;
@@ -638,8 +638,7 @@ static int walk_directory(CPUMIPSState *env, uint64_t *vaddr,
uint64_t w = 0;
if (get_physical_address(env, &paddr, &prot, *vaddr, MMU_DATA_LOAD,
- cpu_mmu_index(env, false)) !=
- TLBRET_MATCH) {
+ ptw_mmu_idx) != TLBRET_MATCH) {
/* wrong base address */
return 0;
}
@@ -666,8 +665,7 @@ static int walk_directory(CPUMIPSState *env, uint64_t *vaddr,
*pw_entrylo0 = entry;
}
if (get_physical_address(env, &paddr, &prot, vaddr2, MMU_DATA_LOAD,
- cpu_mmu_index(env, false)) !=
- TLBRET_MATCH) {
+ ptw_mmu_idx) != TLBRET_MATCH) {
return 0;
}
if (!get_pte(env, vaddr2, leafentry_size, &entry)) {
@@ -690,7 +688,7 @@ static int walk_directory(CPUMIPSState *env, uint64_t *vaddr,
}
static bool page_table_walk_refill(CPUMIPSState *env, vaddr address,
- int mmu_idx)
+ int ptw_mmu_idx)
{
int gdw = (env->CP0_PWSize >> CP0PS_GDW) & 0x3F;
int udw = (env->CP0_PWSize >> CP0PS_UDW) & 0x3F;
@@ -776,7 +774,7 @@ static bool page_table_walk_refill(CPUMIPSState *env, vaddr address,
vaddr |= goffset;
switch (walk_directory(env, &vaddr, pf_gdw, &huge_page, &hgpg_gdhit,
&pw_entrylo0, &pw_entrylo1,
- directory_shift, leaf_shift))
+ directory_shift, leaf_shift, ptw_mmu_idx))
{
case 0:
return false;
@@ -793,7 +791,7 @@ static bool page_table_walk_refill(CPUMIPSState *env, vaddr address,
vaddr |= uoffset;
switch (walk_directory(env, &vaddr, pf_udw, &huge_page, &hgpg_udhit,
&pw_entrylo0, &pw_entrylo1,
- directory_shift, leaf_shift))
+ directory_shift, leaf_shift, ptw_mmu_idx))
{
case 0:
return false;
@@ -810,7 +808,7 @@ static bool page_table_walk_refill(CPUMIPSState *env, vaddr address,
vaddr |= moffset;
switch (walk_directory(env, &vaddr, pf_mdw, &huge_page, &hgpg_mdhit,
&pw_entrylo0, &pw_entrylo1,
- directory_shift, leaf_shift))
+ directory_shift, leaf_shift, ptw_mmu_idx))
{
case 0:
return false;
@@ -825,8 +823,7 @@ static bool page_table_walk_refill(CPUMIPSState *env, vaddr address,
/* Leaf Level Page Table - First half of PTE pair */
vaddr |= ptoffset0;
if (get_physical_address(env, &paddr, &prot, vaddr, MMU_DATA_LOAD,
- cpu_mmu_index(env, false)) !=
- TLBRET_MATCH) {
+ ptw_mmu_idx) != TLBRET_MATCH) {
return false;
}
if (!get_pte(env, vaddr, leafentry_size, &dir_entry)) {
@@ -838,8 +835,7 @@ static bool page_table_walk_refill(CPUMIPSState *env, vaddr address,
/* Leaf Level Page Table - Second half of PTE pair */
vaddr |= ptoffset1;
if (get_physical_address(env, &paddr, &prot, vaddr, MMU_DATA_LOAD,
- cpu_mmu_index(env, false)) !=
- TLBRET_MATCH) {
+ ptw_mmu_idx) != TLBRET_MATCH) {
return false;
}
if (!get_pte(env, vaddr, leafentry_size, &dir_entry)) {
@@ -944,12 +940,10 @@ bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
* Memory reads during hardware page table walking are performed
* as if they were kernel-mode load instructions.
*/
- int mode = (env->hflags & MIPS_HFLAG_KSU);
- bool ret_walker;
- env->hflags &= ~MIPS_HFLAG_KSU;
- ret_walker = page_table_walk_refill(env, address, mmu_idx);
- env->hflags |= mode;
- if (ret_walker) {
+ int ptw_mmu_idx = (env->hflags & MIPS_HFLAG_ERL ?
+ MMU_ERL_IDX : MMU_KERNEL_IDX);
+
+ if (page_table_walk_refill(env, address, ptw_mmu_idx)) {
ret = get_physical_address(env, &physical, &prot, address,
access_type, mmu_idx);
if (ret == TLBRET_MATCH) {
--
2.34.1
next prev parent reply other threads:[~2024-01-29 23:35 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-29 23:30 [PATCH 00/33] hw/core: Introduce CPUClass hook for mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 01/33] include/hw/core: Add mmu_index to CPUClass Richard Henderson
2024-01-30 7:46 ` Philippe Mathieu-Daudé
2024-01-30 7:51 ` Richard Henderson
2024-01-30 8:20 ` Philippe Mathieu-Daudé
2024-01-30 11:02 ` Richard Henderson
2024-01-30 11:26 ` Philippe Mathieu-Daudé
2024-01-29 23:30 ` [PATCH 02/33] target/alpha: Split out alpha_env_mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 03/33] target/alpha: Populate CPUClass.mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 04/33] target/arm: Split out arm_env_mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 05/33] target/arm: Populate CPUClass.mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 06/33] target/avr: " Richard Henderson
2024-01-29 23:30 ` [PATCH 07/33] target/cris: Cache mem_index in DisasContext Richard Henderson
2024-01-29 23:30 ` [PATCH 08/33] target/cris: Populate CPUClass.mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 09/33] target/hppa: " Richard Henderson
2024-01-30 7:39 ` Helge Deller
2024-01-29 23:30 ` [PATCH 10/33] target/i386: " Richard Henderson
2024-01-29 23:30 ` [PATCH 11/33] target/loongarch: " Richard Henderson
2024-01-29 23:30 ` [PATCH 12/33] target/loongarch: Rename MMU_IDX_* Richard Henderson
2024-01-29 23:30 ` [PATCH 13/33] target/m68k: Populate CPUClass.mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 14/33] target/microblaze: " Richard Henderson
2024-01-29 23:30 ` Richard Henderson [this message]
2024-01-29 23:30 ` [PATCH 16/33] target/mips: Split out mips_env_mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 17/33] target/mips: Populate CPUClass.mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 18/33] target/nios2: " Richard Henderson
2024-01-29 23:30 ` [PATCH 19/33] target/openrisc: " Richard Henderson
2024-01-29 23:30 ` [PATCH 20/33] target/ppc: Split out ppc_env_mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 21/33] target/ppc: Populate CPUClass.mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 22/33] target/riscv: Rename riscv_cpu_mmu_index to riscv_env_mmu_index Richard Henderson
2024-01-30 0:40 ` Alistair Francis
2024-01-29 23:30 ` [PATCH 23/33] target/riscv: Replace cpu_mmu_index with riscv_env_mmu_index Richard Henderson
2024-01-30 0:41 ` Alistair Francis
2024-01-29 23:30 ` [PATCH 24/33] target/riscv: Populate CPUClass.mmu_index Richard Henderson
2024-01-30 0:41 ` Alistair Francis
2024-01-29 23:30 ` [PATCH 25/33] target/rx: " Richard Henderson
2024-01-29 23:30 ` [PATCH 26/33] target/s390x: Split out s390x_env_mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 27/33] target/s390x: Populate CPUClass.mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 28/33] target/sh4: " Richard Henderson
2024-01-29 23:30 ` [PATCH 29/33] target/sparc: " Richard Henderson
2024-01-29 23:30 ` [PATCH 30/33] target/tricore: " Richard Henderson
2024-02-03 6:29 ` Bastian Koppelmann
2024-01-29 23:30 ` [PATCH 31/33] target/xtensa: " Richard Henderson
2024-01-29 23:30 ` [PATCH 32/33] include/exec: Implement cpu_mmu_index generically Richard Henderson
2024-01-30 8:23 ` Philippe Mathieu-Daudé
2024-01-29 23:30 ` [PATCH 33/33] include/exec: Change cpu_mmu_index argument to CPUState Richard Henderson
2024-01-30 8:26 ` Philippe Mathieu-Daudé
2024-01-30 11:05 ` Richard Henderson
2024-01-30 11:29 ` Philippe Mathieu-Daudé
2024-01-30 8:26 ` [PATCH 00/33] hw/core: Introduce CPUClass hook for mmu_index Philippe Mathieu-Daudé
2024-01-30 13:11 ` Anton Johansson via
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