From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: philmd@linaro.org, anjo@rev.ng
Subject: [PATCH 16/33] target/mips: Split out mips_env_mmu_index
Date: Tue, 30 Jan 2024 09:30:26 +1000 [thread overview]
Message-ID: <20240129233043.34558-17-richard.henderson@linaro.org> (raw)
In-Reply-To: <20240129233043.34558-1-richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/mips/cpu.h | 7 ++++++-
target/mips/sysemu/physaddr.c | 2 +-
target/mips/tcg/msa_helper.c | 10 +++++-----
target/mips/tcg/sysemu/cp0_helper.c | 2 +-
target/mips/tcg/sysemu/special_helper.c | 2 +-
target/mips/tcg/sysemu/tlb_helper.c | 2 +-
6 files changed, 15 insertions(+), 10 deletions(-)
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 3ba8dccd2d..4c15e76781 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -1255,11 +1255,16 @@ static inline int hflags_mmu_index(uint32_t hflags)
}
}
-static inline int cpu_mmu_index(CPUMIPSState *env, bool ifetch)
+static inline int mips_env_mmu_index(CPUMIPSState *env)
{
return hflags_mmu_index(env->hflags);
}
+static inline int cpu_mmu_index(CPUMIPSState *env, bool ifetch)
+{
+ return mips_env_mmu_index(env);
+}
+
#include "exec/cpu-all.h"
/* Exceptions */
diff --git a/target/mips/sysemu/physaddr.c b/target/mips/sysemu/physaddr.c
index 05990aa5bb..13c8bc8f47 100644
--- a/target/mips/sysemu/physaddr.c
+++ b/target/mips/sysemu/physaddr.c
@@ -236,7 +236,7 @@ hwaddr mips_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
int prot;
if (get_physical_address(env, &phys_addr, &prot, addr, MMU_DATA_LOAD,
- cpu_mmu_index(env, false)) != 0) {
+ mips_env_mmu_index(env)) != 0) {
return -1;
}
return phys_addr;
diff --git a/target/mips/tcg/msa_helper.c b/target/mips/tcg/msa_helper.c
index 7a8dbada5d..d2181763e7 100644
--- a/target/mips/tcg/msa_helper.c
+++ b/target/mips/tcg/msa_helper.c
@@ -8214,7 +8214,7 @@ void helper_msa_ffint_u_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
#if !defined(CONFIG_USER_ONLY)
#define MEMOP_IDX(DF) \
MemOpIdx oi = make_memop_idx(MO_TE | DF | MO_UNALN, \
- cpu_mmu_index(env, false));
+ mips_env_mmu_index(env));
#else
#define MEMOP_IDX(DF)
#endif
@@ -8323,7 +8323,7 @@ void helper_msa_st_b(CPUMIPSState *env, uint32_t wd,
target_ulong addr)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
- int mmu_idx = cpu_mmu_index(env, false);
+ int mmu_idx = mips_env_mmu_index(env);
uintptr_t ra = GETPC();
ensure_writable_pages(env, addr, mmu_idx, ra);
@@ -8337,7 +8337,7 @@ void helper_msa_st_h(CPUMIPSState *env, uint32_t wd,
target_ulong addr)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
- int mmu_idx = cpu_mmu_index(env, false);
+ int mmu_idx = mips_env_mmu_index(env);
uintptr_t ra = GETPC();
uint64_t d0, d1;
@@ -8358,7 +8358,7 @@ void helper_msa_st_w(CPUMIPSState *env, uint32_t wd,
target_ulong addr)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
- int mmu_idx = cpu_mmu_index(env, false);
+ int mmu_idx = mips_env_mmu_index(env);
uintptr_t ra = GETPC();
uint64_t d0, d1;
@@ -8379,7 +8379,7 @@ void helper_msa_st_d(CPUMIPSState *env, uint32_t wd,
target_ulong addr)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
- int mmu_idx = cpu_mmu_index(env, false);
+ int mmu_idx = mips_env_mmu_index(env);
uintptr_t ra = GETPC();
ensure_writable_pages(env, addr, mmu_idx, GETPC());
diff --git a/target/mips/tcg/sysemu/cp0_helper.c b/target/mips/tcg/sysemu/cp0_helper.c
index cc545aed9c..62f6fb4bf6 100644
--- a/target/mips/tcg/sysemu/cp0_helper.c
+++ b/target/mips/tcg/sysemu/cp0_helper.c
@@ -1202,7 +1202,7 @@ void helper_mtc0_status(CPUMIPSState *env, target_ulong arg1)
old, old & env->CP0_Cause & CP0Ca_IP_mask,
val, val & env->CP0_Cause & CP0Ca_IP_mask,
env->CP0_Cause);
- switch (cpu_mmu_index(env, false)) {
+ switch (mips_env_mmu_index(env)) {
case 3:
qemu_log(", ERL\n");
break;
diff --git a/target/mips/tcg/sysemu/special_helper.c b/target/mips/tcg/sysemu/special_helper.c
index 93276f789d..518d3fbc34 100644
--- a/target/mips/tcg/sysemu/special_helper.c
+++ b/target/mips/tcg/sysemu/special_helper.c
@@ -68,7 +68,7 @@ static void debug_post_eret(CPUMIPSState *env)
if (env->hflags & MIPS_HFLAG_DM) {
qemu_log(" DEPC " TARGET_FMT_lx, env->CP0_DEPC);
}
- switch (cpu_mmu_index(env, false)) {
+ switch (mips_env_mmu_index(env)) {
case 3:
qemu_log(", ERL\n");
break;
diff --git a/target/mips/tcg/sysemu/tlb_helper.c b/target/mips/tcg/sysemu/tlb_helper.c
index b715449114..cdae42ffdd 100644
--- a/target/mips/tcg/sysemu/tlb_helper.c
+++ b/target/mips/tcg/sysemu/tlb_helper.c
@@ -973,7 +973,7 @@ hwaddr cpu_mips_translate_address(CPUMIPSState *env, target_ulong address,
/* data access */
ret = get_physical_address(env, &physical, &prot, address, access_type,
- cpu_mmu_index(env, false));
+ mips_env_mmu_index(env));
if (ret == TLBRET_MATCH) {
return physical;
}
--
2.34.1
next prev parent reply other threads:[~2024-01-29 23:34 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-29 23:30 [PATCH 00/33] hw/core: Introduce CPUClass hook for mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 01/33] include/hw/core: Add mmu_index to CPUClass Richard Henderson
2024-01-30 7:46 ` Philippe Mathieu-Daudé
2024-01-30 7:51 ` Richard Henderson
2024-01-30 8:20 ` Philippe Mathieu-Daudé
2024-01-30 11:02 ` Richard Henderson
2024-01-30 11:26 ` Philippe Mathieu-Daudé
2024-01-29 23:30 ` [PATCH 02/33] target/alpha: Split out alpha_env_mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 03/33] target/alpha: Populate CPUClass.mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 04/33] target/arm: Split out arm_env_mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 05/33] target/arm: Populate CPUClass.mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 06/33] target/avr: " Richard Henderson
2024-01-29 23:30 ` [PATCH 07/33] target/cris: Cache mem_index in DisasContext Richard Henderson
2024-01-29 23:30 ` [PATCH 08/33] target/cris: Populate CPUClass.mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 09/33] target/hppa: " Richard Henderson
2024-01-30 7:39 ` Helge Deller
2024-01-29 23:30 ` [PATCH 10/33] target/i386: " Richard Henderson
2024-01-29 23:30 ` [PATCH 11/33] target/loongarch: " Richard Henderson
2024-01-29 23:30 ` [PATCH 12/33] target/loongarch: Rename MMU_IDX_* Richard Henderson
2024-01-29 23:30 ` [PATCH 13/33] target/m68k: Populate CPUClass.mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 14/33] target/microblaze: " Richard Henderson
2024-01-29 23:30 ` [PATCH 15/33] target/mips: Pass ptw_mmu_idx down from mips_cpu_tlb_fill Richard Henderson
2024-01-29 23:30 ` Richard Henderson [this message]
2024-01-29 23:30 ` [PATCH 17/33] target/mips: Populate CPUClass.mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 18/33] target/nios2: " Richard Henderson
2024-01-29 23:30 ` [PATCH 19/33] target/openrisc: " Richard Henderson
2024-01-29 23:30 ` [PATCH 20/33] target/ppc: Split out ppc_env_mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 21/33] target/ppc: Populate CPUClass.mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 22/33] target/riscv: Rename riscv_cpu_mmu_index to riscv_env_mmu_index Richard Henderson
2024-01-30 0:40 ` Alistair Francis
2024-01-29 23:30 ` [PATCH 23/33] target/riscv: Replace cpu_mmu_index with riscv_env_mmu_index Richard Henderson
2024-01-30 0:41 ` Alistair Francis
2024-01-29 23:30 ` [PATCH 24/33] target/riscv: Populate CPUClass.mmu_index Richard Henderson
2024-01-30 0:41 ` Alistair Francis
2024-01-29 23:30 ` [PATCH 25/33] target/rx: " Richard Henderson
2024-01-29 23:30 ` [PATCH 26/33] target/s390x: Split out s390x_env_mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 27/33] target/s390x: Populate CPUClass.mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 28/33] target/sh4: " Richard Henderson
2024-01-29 23:30 ` [PATCH 29/33] target/sparc: " Richard Henderson
2024-01-29 23:30 ` [PATCH 30/33] target/tricore: " Richard Henderson
2024-02-03 6:29 ` Bastian Koppelmann
2024-01-29 23:30 ` [PATCH 31/33] target/xtensa: " Richard Henderson
2024-01-29 23:30 ` [PATCH 32/33] include/exec: Implement cpu_mmu_index generically Richard Henderson
2024-01-30 8:23 ` Philippe Mathieu-Daudé
2024-01-29 23:30 ` [PATCH 33/33] include/exec: Change cpu_mmu_index argument to CPUState Richard Henderson
2024-01-30 8:26 ` Philippe Mathieu-Daudé
2024-01-30 11:05 ` Richard Henderson
2024-01-30 11:29 ` Philippe Mathieu-Daudé
2024-01-30 8:26 ` [PATCH 00/33] hw/core: Introduce CPUClass hook for mmu_index Philippe Mathieu-Daudé
2024-01-30 13:11 ` Anton Johansson via
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