From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: philmd@linaro.org, anjo@rev.ng
Subject: [PATCH 23/33] target/riscv: Replace cpu_mmu_index with riscv_env_mmu_index
Date: Tue, 30 Jan 2024 09:30:33 +1000 [thread overview]
Message-ID: <20240129233043.34558-24-richard.henderson@linaro.org> (raw)
In-Reply-To: <20240129233043.34558-1-richard.henderson@linaro.org>
Use the target-specific function name in preference
to the generic name.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/riscv/cpu_helper.c | 4 ++--
target/riscv/op_helper.c | 4 ++--
target/riscv/vector_helper.c | 9 +++++----
3 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index 15f87ecdb0..b6b23b7d03 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -106,7 +106,7 @@ void cpu_get_tb_cpu_state(CPURISCVState *env, vaddr *pc,
#else
flags = FIELD_DP32(flags, TB_FLAGS, PRIV, env->priv);
- flags |= cpu_mmu_index(env, 0);
+ flags |= riscv_env_mmu_index(env, 0);
fs = get_field(env->mstatus, MSTATUS_FS);
vs = get_field(env->mstatus, MSTATUS_VS);
@@ -1200,7 +1200,7 @@ hwaddr riscv_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
CPURISCVState *env = &cpu->env;
hwaddr phys_addr;
int prot;
- int mmu_idx = cpu_mmu_index(&cpu->env, false);
+ int mmu_idx = riscv_env_mmu_index(&cpu->env, false);
if (get_physical_address(env, &phys_addr, &prot, addr, NULL, 0, mmu_idx,
true, env->virt_enabled, true)) {
diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c
index 5355225d56..f414aaebdb 100644
--- a/target/riscv/op_helper.c
+++ b/target/riscv/op_helper.c
@@ -157,7 +157,7 @@ void helper_cbo_zero(CPURISCVState *env, target_ulong address)
{
RISCVCPU *cpu = env_archcpu(env);
uint16_t cbozlen = cpu->cfg.cboz_blocksize;
- int mmu_idx = cpu_mmu_index(env, false);
+ int mmu_idx = riscv_env_mmu_index(env, false);
uintptr_t ra = GETPC();
void *mem;
@@ -205,7 +205,7 @@ static void check_zicbom_access(CPURISCVState *env,
uintptr_t ra)
{
RISCVCPU *cpu = env_archcpu(env);
- int mmu_idx = cpu_mmu_index(env, false);
+ int mmu_idx = riscv_env_mmu_index(env, false);
uint16_t cbomlen = cpu->cfg.cbom_blocksize;
void *phost;
int ret;
diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
index c1c3a4d1ea..fe0d5d053c 100644
--- a/target/riscv/vector_helper.c
+++ b/target/riscv/vector_helper.c
@@ -113,14 +113,15 @@ static void probe_pages(CPURISCVState *env, target_ulong addr,
{
target_ulong pagelen = -(addr | TARGET_PAGE_MASK);
target_ulong curlen = MIN(pagelen, len);
+ int mmu_index = riscv_env_mmu_index(env, false);
probe_access(env, adjust_addr(env, addr), curlen, access_type,
- cpu_mmu_index(env, false), ra);
+ mmu_index, ra);
if (len > curlen) {
addr += curlen;
curlen = len - curlen;
probe_access(env, adjust_addr(env, addr), curlen, access_type,
- cpu_mmu_index(env, false), ra);
+ mmu_index, ra);
}
}
@@ -464,6 +465,7 @@ vext_ldff(void *vd, void *v0, target_ulong base,
uint32_t esz = 1 << log2_esz;
uint32_t vma = vext_vma(desc);
target_ulong addr, offset, remain;
+ int mmu_index = riscv_env_mmu_index(env, false);
/* probe every access */
for (i = env->vstart; i < env->vl; i++) {
@@ -478,8 +480,7 @@ vext_ldff(void *vd, void *v0, target_ulong base,
remain = nf << log2_esz;
while (remain > 0) {
offset = -(addr | TARGET_PAGE_MASK);
- host = tlb_vaddr_to_host(env, addr, MMU_DATA_LOAD,
- cpu_mmu_index(env, false));
+ host = tlb_vaddr_to_host(env, addr, MMU_DATA_LOAD, mmu_index);
if (host) {
#ifdef CONFIG_USER_ONLY
if (!page_check_range(addr, offset, PAGE_READ)) {
--
2.34.1
next prev parent reply other threads:[~2024-01-29 23:37 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-29 23:30 [PATCH 00/33] hw/core: Introduce CPUClass hook for mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 01/33] include/hw/core: Add mmu_index to CPUClass Richard Henderson
2024-01-30 7:46 ` Philippe Mathieu-Daudé
2024-01-30 7:51 ` Richard Henderson
2024-01-30 8:20 ` Philippe Mathieu-Daudé
2024-01-30 11:02 ` Richard Henderson
2024-01-30 11:26 ` Philippe Mathieu-Daudé
2024-01-29 23:30 ` [PATCH 02/33] target/alpha: Split out alpha_env_mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 03/33] target/alpha: Populate CPUClass.mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 04/33] target/arm: Split out arm_env_mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 05/33] target/arm: Populate CPUClass.mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 06/33] target/avr: " Richard Henderson
2024-01-29 23:30 ` [PATCH 07/33] target/cris: Cache mem_index in DisasContext Richard Henderson
2024-01-29 23:30 ` [PATCH 08/33] target/cris: Populate CPUClass.mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 09/33] target/hppa: " Richard Henderson
2024-01-30 7:39 ` Helge Deller
2024-01-29 23:30 ` [PATCH 10/33] target/i386: " Richard Henderson
2024-01-29 23:30 ` [PATCH 11/33] target/loongarch: " Richard Henderson
2024-01-29 23:30 ` [PATCH 12/33] target/loongarch: Rename MMU_IDX_* Richard Henderson
2024-01-29 23:30 ` [PATCH 13/33] target/m68k: Populate CPUClass.mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 14/33] target/microblaze: " Richard Henderson
2024-01-29 23:30 ` [PATCH 15/33] target/mips: Pass ptw_mmu_idx down from mips_cpu_tlb_fill Richard Henderson
2024-01-29 23:30 ` [PATCH 16/33] target/mips: Split out mips_env_mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 17/33] target/mips: Populate CPUClass.mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 18/33] target/nios2: " Richard Henderson
2024-01-29 23:30 ` [PATCH 19/33] target/openrisc: " Richard Henderson
2024-01-29 23:30 ` [PATCH 20/33] target/ppc: Split out ppc_env_mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 21/33] target/ppc: Populate CPUClass.mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 22/33] target/riscv: Rename riscv_cpu_mmu_index to riscv_env_mmu_index Richard Henderson
2024-01-30 0:40 ` Alistair Francis
2024-01-29 23:30 ` Richard Henderson [this message]
2024-01-30 0:41 ` [PATCH 23/33] target/riscv: Replace cpu_mmu_index with riscv_env_mmu_index Alistair Francis
2024-01-29 23:30 ` [PATCH 24/33] target/riscv: Populate CPUClass.mmu_index Richard Henderson
2024-01-30 0:41 ` Alistair Francis
2024-01-29 23:30 ` [PATCH 25/33] target/rx: " Richard Henderson
2024-01-29 23:30 ` [PATCH 26/33] target/s390x: Split out s390x_env_mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 27/33] target/s390x: Populate CPUClass.mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 28/33] target/sh4: " Richard Henderson
2024-01-29 23:30 ` [PATCH 29/33] target/sparc: " Richard Henderson
2024-01-29 23:30 ` [PATCH 30/33] target/tricore: " Richard Henderson
2024-02-03 6:29 ` Bastian Koppelmann
2024-01-29 23:30 ` [PATCH 31/33] target/xtensa: " Richard Henderson
2024-01-29 23:30 ` [PATCH 32/33] include/exec: Implement cpu_mmu_index generically Richard Henderson
2024-01-30 8:23 ` Philippe Mathieu-Daudé
2024-01-29 23:30 ` [PATCH 33/33] include/exec: Change cpu_mmu_index argument to CPUState Richard Henderson
2024-01-30 8:26 ` Philippe Mathieu-Daudé
2024-01-30 11:05 ` Richard Henderson
2024-01-30 11:29 ` Philippe Mathieu-Daudé
2024-01-30 8:26 ` [PATCH 00/33] hw/core: Introduce CPUClass hook for mmu_index Philippe Mathieu-Daudé
2024-01-30 13:11 ` Anton Johansson via
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20240129233043.34558-24-richard.henderson@linaro.org \
--to=richard.henderson@linaro.org \
--cc=anjo@rev.ng \
--cc=philmd@linaro.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).