From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: philmd@linaro.org, anjo@rev.ng
Subject: [PATCH 07/33] target/cris: Cache mem_index in DisasContext
Date: Tue, 30 Jan 2024 09:30:17 +1000 [thread overview]
Message-ID: <20240129233043.34558-8-richard.henderson@linaro.org> (raw)
In-Reply-To: <20240129233043.34558-1-richard.henderson@linaro.org>
Compute this value once for each translation.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/cris/translate.c | 14 +++++---------
target/cris/translate_v10.c.inc | 6 ++----
2 files changed, 7 insertions(+), 13 deletions(-)
diff --git a/target/cris/translate.c b/target/cris/translate.c
index ee1402a9a3..7acea29a01 100644
--- a/target/cris/translate.c
+++ b/target/cris/translate.c
@@ -94,6 +94,7 @@ typedef struct DisasContext {
CRISCPU *cpu;
target_ulong pc, ppc;
+ int mem_index;
/* Decoder. */
unsigned int (*decoder)(CPUCRISState *env, struct DisasContext *dc);
@@ -1008,37 +1009,31 @@ static inline void cris_prepare_jmp (DisasContext *dc, unsigned int type)
static void gen_load64(DisasContext *dc, TCGv_i64 dst, TCGv addr)
{
- int mem_index = cpu_mmu_index(&dc->cpu->env, false);
-
/* If we get a fault on a delayslot we must keep the jmp state in
the cpu-state to be able to re-execute the jmp. */
if (dc->delayed_branch == 1) {
cris_store_direct_jmp(dc);
}
- tcg_gen_qemu_ld_i64(dst, addr, mem_index, MO_TEUQ);
+ tcg_gen_qemu_ld_i64(dst, addr, dc->mem_index, MO_TEUQ);
}
static void gen_load(DisasContext *dc, TCGv dst, TCGv addr,
unsigned int size, int sign)
{
- int mem_index = cpu_mmu_index(&dc->cpu->env, false);
-
/* If we get a fault on a delayslot we must keep the jmp state in
the cpu-state to be able to re-execute the jmp. */
if (dc->delayed_branch == 1) {
cris_store_direct_jmp(dc);
}
- tcg_gen_qemu_ld_tl(dst, addr, mem_index,
+ tcg_gen_qemu_ld_tl(dst, addr, dc->mem_index,
MO_TE + ctz32(size) + (sign ? MO_SIGN : 0));
}
static void gen_store (DisasContext *dc, TCGv addr, TCGv val,
unsigned int size)
{
- int mem_index = cpu_mmu_index(&dc->cpu->env, false);
-
/* If we get a fault on a delayslot we must keep the jmp state in
the cpu-state to be able to re-execute the jmp. */
if (dc->delayed_branch == 1) {
@@ -1055,7 +1050,7 @@ static void gen_store (DisasContext *dc, TCGv addr, TCGv val,
return;
}
- tcg_gen_qemu_st_tl(val, addr, mem_index, MO_TE + ctz32(size));
+ tcg_gen_qemu_st_tl(val, addr, dc->mem_index, MO_TE + ctz32(size));
if (dc->flags_x) {
cris_evaluate_flags(dc);
@@ -2971,6 +2966,7 @@ static void cris_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs)
dc->cpu = env_archcpu(env);
dc->ppc = pc_start;
dc->pc = pc_start;
+ dc->mem_index = cpu_mmu_index(env, false);
dc->flags_uptodate = 1;
dc->flags_x = tb_flags & X_FLAG;
dc->cc_x_uptodate = 0;
diff --git a/target/cris/translate_v10.c.inc b/target/cris/translate_v10.c.inc
index 6df599fdce..73fc27c15d 100644
--- a/target/cris/translate_v10.c.inc
+++ b/target/cris/translate_v10.c.inc
@@ -91,8 +91,6 @@ static void gen_store_v10_conditional(DisasContext *dc, TCGv addr, TCGv val,
static void gen_store_v10(DisasContext *dc, TCGv addr, TCGv val,
unsigned int size)
{
- int mem_index = cpu_mmu_index(&dc->cpu->env, false);
-
/* If we get a fault on a delayslot we must keep the jmp state in
the cpu-state to be able to re-execute the jmp. */
if (dc->delayed_branch == 1) {
@@ -101,11 +99,11 @@ static void gen_store_v10(DisasContext *dc, TCGv addr, TCGv val,
/* Conditional writes. */
if (dc->flags_x) {
- gen_store_v10_conditional(dc, addr, val, size, mem_index);
+ gen_store_v10_conditional(dc, addr, val, size, dc->mem_index);
return;
}
- tcg_gen_qemu_st_tl(val, addr, mem_index, ctz32(size) | MO_TE);
+ tcg_gen_qemu_st_tl(val, addr, dc->mem_index, ctz32(size) | MO_TE);
}
--
2.34.1
next prev parent reply other threads:[~2024-01-29 23:31 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-29 23:30 [PATCH 00/33] hw/core: Introduce CPUClass hook for mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 01/33] include/hw/core: Add mmu_index to CPUClass Richard Henderson
2024-01-30 7:46 ` Philippe Mathieu-Daudé
2024-01-30 7:51 ` Richard Henderson
2024-01-30 8:20 ` Philippe Mathieu-Daudé
2024-01-30 11:02 ` Richard Henderson
2024-01-30 11:26 ` Philippe Mathieu-Daudé
2024-01-29 23:30 ` [PATCH 02/33] target/alpha: Split out alpha_env_mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 03/33] target/alpha: Populate CPUClass.mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 04/33] target/arm: Split out arm_env_mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 05/33] target/arm: Populate CPUClass.mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 06/33] target/avr: " Richard Henderson
2024-01-29 23:30 ` Richard Henderson [this message]
2024-01-29 23:30 ` [PATCH 08/33] target/cris: " Richard Henderson
2024-01-29 23:30 ` [PATCH 09/33] target/hppa: " Richard Henderson
2024-01-30 7:39 ` Helge Deller
2024-01-29 23:30 ` [PATCH 10/33] target/i386: " Richard Henderson
2024-01-29 23:30 ` [PATCH 11/33] target/loongarch: " Richard Henderson
2024-01-29 23:30 ` [PATCH 12/33] target/loongarch: Rename MMU_IDX_* Richard Henderson
2024-01-29 23:30 ` [PATCH 13/33] target/m68k: Populate CPUClass.mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 14/33] target/microblaze: " Richard Henderson
2024-01-29 23:30 ` [PATCH 15/33] target/mips: Pass ptw_mmu_idx down from mips_cpu_tlb_fill Richard Henderson
2024-01-29 23:30 ` [PATCH 16/33] target/mips: Split out mips_env_mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 17/33] target/mips: Populate CPUClass.mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 18/33] target/nios2: " Richard Henderson
2024-01-29 23:30 ` [PATCH 19/33] target/openrisc: " Richard Henderson
2024-01-29 23:30 ` [PATCH 20/33] target/ppc: Split out ppc_env_mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 21/33] target/ppc: Populate CPUClass.mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 22/33] target/riscv: Rename riscv_cpu_mmu_index to riscv_env_mmu_index Richard Henderson
2024-01-30 0:40 ` Alistair Francis
2024-01-29 23:30 ` [PATCH 23/33] target/riscv: Replace cpu_mmu_index with riscv_env_mmu_index Richard Henderson
2024-01-30 0:41 ` Alistair Francis
2024-01-29 23:30 ` [PATCH 24/33] target/riscv: Populate CPUClass.mmu_index Richard Henderson
2024-01-30 0:41 ` Alistair Francis
2024-01-29 23:30 ` [PATCH 25/33] target/rx: " Richard Henderson
2024-01-29 23:30 ` [PATCH 26/33] target/s390x: Split out s390x_env_mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 27/33] target/s390x: Populate CPUClass.mmu_index Richard Henderson
2024-01-29 23:30 ` [PATCH 28/33] target/sh4: " Richard Henderson
2024-01-29 23:30 ` [PATCH 29/33] target/sparc: " Richard Henderson
2024-01-29 23:30 ` [PATCH 30/33] target/tricore: " Richard Henderson
2024-02-03 6:29 ` Bastian Koppelmann
2024-01-29 23:30 ` [PATCH 31/33] target/xtensa: " Richard Henderson
2024-01-29 23:30 ` [PATCH 32/33] include/exec: Implement cpu_mmu_index generically Richard Henderson
2024-01-30 8:23 ` Philippe Mathieu-Daudé
2024-01-29 23:30 ` [PATCH 33/33] include/exec: Change cpu_mmu_index argument to CPUState Richard Henderson
2024-01-30 8:26 ` Philippe Mathieu-Daudé
2024-01-30 11:05 ` Richard Henderson
2024-01-30 11:29 ` Philippe Mathieu-Daudé
2024-01-30 8:26 ` [PATCH 00/33] hw/core: Introduce CPUClass hook for mmu_index Philippe Mathieu-Daudé
2024-01-30 13:11 ` Anton Johansson via
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20240129233043.34558-8-richard.henderson@linaro.org \
--to=richard.henderson@linaro.org \
--cc=anjo@rev.ng \
--cc=philmd@linaro.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).