From: Igor Mammedov <imammedo@redhat.com>
To: Tao Su <tao1.su@linux.intel.com>
Cc: qemu-devel@nongnu.org, pbonzini@redhat.com, xiaoyao.li@intel.com,
lei4.wang@intel.com, qian.wen@intel.com
Subject: Re: [PATCH v2 6/6] target/i386: Add new CPU model GraniteRapids
Date: Wed, 31 Jan 2024 13:34:31 +0100 [thread overview]
Message-ID: <20240131133431.11e3c3f8@imammedo.users.ipa.redhat.com> (raw)
In-Reply-To: <Zbj67L0dbtJSF3xm@linux.bj.intel.com>
On Tue, 30 Jan 2024 21:34:36 +0800
Tao Su <tao1.su@linux.intel.com> wrote:
> On Tue, Jan 30, 2024 at 11:14:59AM +0100, Igor Mammedov wrote:
> > On Thu, 6 Jul 2023 13:49:49 +0800
> > Tao Su <tao1.su@linux.intel.com> wrote:
> >
> > > The GraniteRapids CPU model mainly adds the following new features
> > > based on SapphireRapids:
> > > - PREFETCHITI CPUID.(EAX=7,ECX=1):EDX[bit 14]
> > > - AMX-FP16 CPUID.(EAX=7,ECX=1):EAX[bit 21]
> >
> > it seems the list/definition is not complete, see
> > https://lore.kernel.org/kvm/20221125125845.1182922-1-jiaxi.chen@linux.intel.com/
> > and those feature bits were merged into QEMU earlier (a9ce107fd0f..d1a11115143)
> >
> > were they omited intentionaly?
> >
>
> No, Jiaxi’s patch series includes new feature bits of both Granite Rapids(GNR)
> and Sierra Forest(SRF).
>
> GNR contains:
> PREFETCHITI CPUID.(EAX=7,ECX=1):EDX[bit 14]
> AMX-FP16 CPUID.(EAX=7,ECX=1):EAX[bit 21]
>
> SRF contains:
> CMPccXADD CPUID.(EAX=7,ECX=1):EAX[bit 7]
> AVX-IFMA CPUID.(EAX=7,ECX=1):EAX[bit 23]
> AVX-VNNI-INT8 CPUID.(EAX=7,ECX=1):EDX[bit 4]
> AVX-NE-CONVERT CPUID.(EAX=7,ECX=1):EDX[bit 5]
> What new platforms support the new features can be found in Table 1-2 of ISE[1].
> And the SRF CPU model we submitted[2] contains the four feature bits supported above.
Thanks,
for future patches:
this kind of info should be part of commit message incl.
spec/doc title/revision it's coming from with a specific
chapter/table also mentioned. This way whoever reads it
later won't have to ask or spend time for searching where
it comes from.
And maybe also have a comment close to new code,
aka like we do for ACPI patches.
> [1] https://cdrdv2.intel.com/v1/dl/getContent/671368
> [2] https://lore.kernel.org/all/20231206131923.1192066-1-tao1.su@linux.intel.com/
>
> Thanks,
> Tao
>
next prev parent reply other threads:[~2024-01-31 12:35 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-06 5:49 [PATCH v2 0/6] Add new CPU model GraniteRapids Tao Su
2023-07-06 5:49 ` [PATCH v2 1/6] target/i386: Add FEAT_7_1_EDX to adjust feature level Tao Su
2023-07-06 5:49 ` [PATCH v2 2/6] target/i386: Add support for MCDT_NO in CPUID enumeration Tao Su
2023-07-06 5:49 ` [PATCH v2 3/6] target/i386: Allow MCDT_NO if host supports Tao Su
2023-07-06 5:49 ` [PATCH v2 4/6] target/i386: Add new bit definitions of MSR_IA32_ARCH_CAPABILITIES Tao Su
2023-07-06 5:49 ` [PATCH v2 5/6] target/i386: Add few security fix bits in ARCH_CAPABILITIES into SapphireRapids CPU model Tao Su
2023-07-06 5:49 ` [PATCH v2 6/6] target/i386: Add new CPU model GraniteRapids Tao Su
2024-01-30 10:14 ` Igor Mammedov
2024-01-30 13:34 ` Tao Su
2024-01-31 12:34 ` Igor Mammedov [this message]
2024-01-31 13:01 ` Tao Su
2023-07-07 10:52 ` [PATCH v2 0/6] " Paolo Bonzini
2023-07-07 12:37 ` Tao Su
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