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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PULL 24/39] tcg/i386: Move tcg_cond_to_jcc[] into tcg_out_cmp
Date: Mon,  5 Feb 2024 07:40:37 +1000	[thread overview]
Message-ID: <20240204214052.5639-25-richard.henderson@linaro.org> (raw)
In-Reply-To: <20240204214052.5639-1-richard.henderson@linaro.org>

Return the x86 condition codes to use after the compare.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/i386/tcg-target.c.inc | 24 +++++++++++++-----------
 1 file changed, 13 insertions(+), 11 deletions(-)

diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc
index 2d6100a8f4..02718a02d8 100644
--- a/tcg/i386/tcg-target.c.inc
+++ b/tcg/i386/tcg-target.c.inc
@@ -1449,8 +1449,8 @@ static void tcg_out_jxx(TCGContext *s, int opc, TCGLabel *l, bool small)
     }
 }
 
-static void tcg_out_cmp(TCGContext *s, TCGArg arg1, TCGArg arg2,
-                        int const_arg2, int rexw)
+static int tcg_out_cmp(TCGContext *s, TCGCond cond, TCGArg arg1,
+                       TCGArg arg2, int const_arg2, int rexw)
 {
     if (const_arg2) {
         if (arg2 == 0) {
@@ -1462,14 +1462,15 @@ static void tcg_out_cmp(TCGContext *s, TCGArg arg1, TCGArg arg2,
     } else {
         tgen_arithr(s, ARITH_CMP + rexw, arg1, arg2);
     }
+    return tcg_cond_to_jcc[cond];
 }
 
 static void tcg_out_brcond(TCGContext *s, int rexw, TCGCond cond,
                            TCGArg arg1, TCGArg arg2, int const_arg2,
                            TCGLabel *label, bool small)
 {
-    tcg_out_cmp(s, arg1, arg2, const_arg2, rexw);
-    tcg_out_jxx(s, tcg_cond_to_jcc[cond], label, small);
+    int jcc = tcg_out_cmp(s, cond, arg1, arg2, const_arg2, rexw);
+    tcg_out_jxx(s, jcc, label, small);
 }
 
 #if TCG_TARGET_REG_BITS == 32
@@ -1561,6 +1562,7 @@ static void tcg_out_setcond(TCGContext *s, int rexw, TCGCond cond,
 {
     bool inv = false;
     bool cleared;
+    int jcc;
 
     switch (cond) {
     case TCG_COND_NE:
@@ -1597,7 +1599,7 @@ static void tcg_out_setcond(TCGContext *s, int rexw, TCGCond cond,
          * We can then use NEG or INC to produce the desired result.
          * This is always smaller than the SETCC expansion.
          */
-        tcg_out_cmp(s, arg1, arg2, const_arg2, rexw);
+        tcg_out_cmp(s, TCG_COND_LTU, arg1, arg2, const_arg2, rexw);
 
         /* X - X - C = -C = (C ? -1 : 0) */
         tgen_arithr(s, ARITH_SBB + (neg ? rexw : 0), dest, dest);
@@ -1644,8 +1646,8 @@ static void tcg_out_setcond(TCGContext *s, int rexw, TCGCond cond,
         cleared = true;
     }
 
-    tcg_out_cmp(s, arg1, arg2, const_arg2, rexw);
-    tcg_out_modrm(s, OPC_SETCC | tcg_cond_to_jcc[cond], 0, dest);
+    jcc = tcg_out_cmp(s, cond, arg1, arg2, const_arg2, rexw);
+    tcg_out_modrm(s, OPC_SETCC | jcc, 0, dest);
 
     if (!cleared) {
         tcg_out_ext8u(s, dest, dest);
@@ -1716,8 +1718,8 @@ static void tcg_out_movcond(TCGContext *s, int rexw, TCGCond cond,
                             TCGReg dest, TCGReg c1, TCGArg c2, int const_c2,
                             TCGReg v1)
 {
-    tcg_out_cmp(s, c1, c2, const_c2, rexw);
-    tcg_out_cmov(s, tcg_cond_to_jcc[cond], rexw, dest, v1);
+    int jcc = tcg_out_cmp(s, cond, c1, c2, const_c2, rexw);
+    tcg_out_cmov(s, jcc, rexw, dest, v1);
 }
 
 static void tcg_out_ctz(TCGContext *s, int rexw, TCGReg dest, TCGReg arg1,
@@ -1759,8 +1761,8 @@ static void tcg_out_clz(TCGContext *s, int rexw, TCGReg dest, TCGReg arg1,
         tgen_arithi(s, ARITH_XOR + rexw, dest, rexw ? 63 : 31, 0);
 
         /* Since we have destroyed the flags from BSR, we have to re-test.  */
-        tcg_out_cmp(s, arg1, 0, 1, rexw);
-        tcg_out_cmov(s, JCC_JE, rexw, dest, arg2);
+        int jcc = tcg_out_cmp(s, TCG_COND_EQ, arg1, 0, 1, rexw);
+        tcg_out_cmov(s, jcc, rexw, dest, arg2);
     }
 }
 
-- 
2.34.1



  parent reply	other threads:[~2024-02-04 21:43 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-04 21:40 [PULL 00/39] tcg patch queue Richard Henderson
2024-02-04 21:40 ` [PULL 01/39] tcg: Introduce TCG_COND_TST{EQ,NE} Richard Henderson
2024-02-04 21:40 ` [PULL 02/39] tcg: Introduce TCG_TARGET_HAS_tst Richard Henderson
2024-02-04 21:40 ` [PULL 03/39] tcg/optimize: Split out arg_is_const_val Richard Henderson
2024-02-04 21:40 ` [PULL 04/39] tcg/optimize: Split out do_constant_folding_cond1 Richard Henderson
2024-02-04 21:40 ` [PULL 05/39] tcg/optimize: Do swap_commutative2 in do_constant_folding_cond2 Richard Henderson
2024-02-04 21:40 ` [PULL 06/39] tcg/optimize: Handle TCG_COND_TST{EQ,NE} Richard Henderson
2024-02-04 21:40 ` [PULL 07/39] tcg/optimize: Lower TCG_COND_TST{EQ,NE} if unsupported Richard Henderson
2024-02-04 21:40 ` [PULL 08/39] target/alpha: Pass immediate value to gen_bcond_internal() Richard Henderson
2024-02-04 21:40 ` [PULL 09/39] target/alpha: Use TCG_COND_TST{EQ,NE} for BLB{C,S} Richard Henderson
2024-02-04 21:40 ` [PULL 10/39] target/alpha: Use TCG_COND_TST{EQ,NE} for CMOVLB{C,S} Richard Henderson
2024-02-04 21:40 ` [PULL 11/39] target/alpha: Use TCG_COND_TSTNE for gen_fold_mzero Richard Henderson
2024-02-04 21:40 ` [PULL 12/39] target/m68k: Use TCG_COND_TST{EQ,NE} in gen_fcc_cond Richard Henderson
2024-02-04 21:40 ` [PULL 13/39] target/sparc: Use TCG_COND_TSTEQ in gen_op_mulscc Richard Henderson
2024-02-04 21:40 ` [PULL 14/39] target/s390x: Use TCG_COND_TSTNE for CC_OP_{TM,ICM} Richard Henderson
2024-02-04 21:40 ` [PULL 15/39] target/s390x: Improve general case of disas_jcc Richard Henderson
2024-02-04 21:40 ` [PULL 16/39] tcg: Add TCGConst argument to tcg_target_const_match Richard Henderson
2024-02-04 21:40 ` [PULL 17/39] tcg/aarch64: Support TCG_COND_TST{EQ,NE} Richard Henderson
2024-02-04 21:40 ` [PULL 18/39] tcg/aarch64: Massage tcg_out_brcond() Richard Henderson
2024-02-04 21:40 ` [PULL 19/39] tcg/aarch64: Generate TBZ, TBNZ Richard Henderson
2024-02-04 21:40 ` [PULL 20/39] tcg/aarch64: Generate CBNZ for TSTNE of UINT32_MAX Richard Henderson
2024-02-04 21:40 ` [PULL 21/39] tcg/arm: Split out tcg_out_cmp() Richard Henderson
2024-02-04 21:40 ` [PULL 22/39] tcg/arm: Support TCG_COND_TST{EQ,NE} Richard Henderson
2024-02-04 21:40 ` [PULL 23/39] tcg/i386: Pass x86 condition codes to tcg_out_cmov Richard Henderson
2024-02-04 21:40 ` Richard Henderson [this message]
2024-02-04 21:40 ` [PULL 25/39] tcg/i386: Support TCG_COND_TST{EQ,NE} Richard Henderson
2024-02-04 21:40 ` [PULL 26/39] tcg/i386: Improve TSTNE/TESTEQ vs powers of two Richard Henderson
2024-02-04 21:40 ` [PULL 27/39] tcg/i386: Use TEST r,r to test 8/16/32 bits Richard Henderson
2024-02-04 21:40 ` [PULL 28/39] tcg/sparc64: Hoist read of tcg_cond_to_rcond Richard Henderson
2024-02-04 21:40 ` [PULL 29/39] tcg/sparc64: Pass TCGCond to tcg_out_cmp Richard Henderson
2024-02-04 21:40 ` [PULL 30/39] tcg/sparc64: Support TCG_COND_TST{EQ,NE} Richard Henderson
2024-02-04 21:40 ` [PULL 31/39] tcg/ppc: Sink tcg_to_bc usage into tcg_out_bc Richard Henderson
2024-02-04 21:40 ` [PULL 32/39] tcg/ppc: Use cr0 in tcg_to_bc and tcg_to_isel Richard Henderson
2024-02-04 21:40 ` [PULL 33/39] tcg/ppc: Tidy up tcg_target_const_match Richard Henderson
2024-02-04 21:40 ` [PULL 34/39] tcg/ppc: Add TCG_CT_CONST_CMP Richard Henderson
2024-02-04 21:40 ` [PULL 35/39] tcg/ppc: Support TCG_COND_TST{EQ,NE} Richard Henderson
2024-02-04 21:40 ` [PULL 36/39] tcg/s390x: Split constraint A into J+U Richard Henderson
2024-02-04 21:40 ` [PULL 37/39] tcg/s390x: Add TCG_CT_CONST_CMP Richard Henderson
2024-02-04 21:40 ` [PULL 38/39] tcg/s390x: Support TCG_COND_TST{EQ,NE} Richard Henderson
2024-02-04 21:40 ` [PULL 39/39] tcg/tci: " Richard Henderson
2024-02-05 12:59 ` [PULL 00/39] tcg patch queue Peter Maydell

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