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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PULL 29/39] tcg/sparc64: Pass TCGCond to tcg_out_cmp
Date: Mon,  5 Feb 2024 07:40:42 +1000	[thread overview]
Message-ID: <20240204214052.5639-30-richard.henderson@linaro.org> (raw)
In-Reply-To: <20240204214052.5639-1-richard.henderson@linaro.org>

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/sparc64/tcg-target.c.inc | 21 +++++++++++----------
 1 file changed, 11 insertions(+), 10 deletions(-)

diff --git a/tcg/sparc64/tcg-target.c.inc b/tcg/sparc64/tcg-target.c.inc
index e16b25e309..10fb8a1a0d 100644
--- a/tcg/sparc64/tcg-target.c.inc
+++ b/tcg/sparc64/tcg-target.c.inc
@@ -646,7 +646,8 @@ static void tcg_out_bpcc(TCGContext *s, int scond, int flags, TCGLabel *l)
     tcg_out_bpcc0(s, scond, flags, off19);
 }
 
-static void tcg_out_cmp(TCGContext *s, TCGReg c1, int32_t c2, int c2const)
+static void tcg_out_cmp(TCGContext *s, TCGCond cond,
+                        TCGReg c1, int32_t c2, int c2const)
 {
     tcg_out_arithc(s, TCG_REG_G0, c1, c2, c2const, ARITH_SUBCC);
 }
@@ -654,7 +655,7 @@ static void tcg_out_cmp(TCGContext *s, TCGReg c1, int32_t c2, int c2const)
 static void tcg_out_brcond_i32(TCGContext *s, TCGCond cond, TCGReg arg1,
                                int32_t arg2, int const_arg2, TCGLabel *l)
 {
-    tcg_out_cmp(s, arg1, arg2, const_arg2);
+    tcg_out_cmp(s, cond, arg1, arg2, const_arg2);
     tcg_out_bpcc(s, tcg_cond_to_bcond[cond], BPCC_ICC | BPCC_PT, l);
     tcg_out_nop(s);
 }
@@ -671,7 +672,7 @@ static void tcg_out_movcond_i32(TCGContext *s, TCGCond cond, TCGReg ret,
                                 TCGReg c1, int32_t c2, int c2const,
                                 int32_t v1, int v1const)
 {
-    tcg_out_cmp(s, c1, c2, c2const);
+    tcg_out_cmp(s, cond, c1, c2, c2const);
     tcg_out_movcc(s, cond, MOVCC_ICC, ret, v1, v1const);
 }
 
@@ -691,7 +692,7 @@ static void tcg_out_brcond_i64(TCGContext *s, TCGCond cond, TCGReg arg1,
         tcg_out32(s, INSN_OP(0) | INSN_OP2(3) | BPR_PT | INSN_RS1(arg1)
                   | INSN_COND(rcond) | off16);
     } else {
-        tcg_out_cmp(s, arg1, arg2, const_arg2);
+        tcg_out_cmp(s, cond, arg1, arg2, const_arg2);
         tcg_out_bpcc(s, tcg_cond_to_bcond[cond], BPCC_XCC | BPCC_PT, l);
     }
     tcg_out_nop(s);
@@ -715,7 +716,7 @@ static void tcg_out_movcond_i64(TCGContext *s, TCGCond cond, TCGReg ret,
     if (c2 == 0 && rcond && (!v1const || check_fit_i32(v1, 10))) {
         tcg_out_movr(s, rcond, ret, c1, v1, v1const);
     } else {
-        tcg_out_cmp(s, c1, c2, c2const);
+        tcg_out_cmp(s, cond, c1, c2, c2const);
         tcg_out_movcc(s, cond, MOVCC_XCC, ret, v1, v1const);
     }
 }
@@ -759,13 +760,13 @@ static void tcg_out_setcond_i32(TCGContext *s, TCGCond cond, TCGReg ret,
         /* FALLTHRU */
 
     default:
-        tcg_out_cmp(s, c1, c2, c2const);
+        tcg_out_cmp(s, cond, c1, c2, c2const);
         tcg_out_movi_s13(s, ret, 0);
         tcg_out_movcc(s, cond, MOVCC_ICC, ret, neg ? -1 : 1, 1);
         return;
     }
 
-    tcg_out_cmp(s, c1, c2, c2const);
+    tcg_out_cmp(s, cond, c1, c2, c2const);
     if (cond == TCG_COND_LTU) {
         if (neg) {
             /* 0 - 0 - C = -C = (C ? -1 : 0) */
@@ -799,7 +800,7 @@ static void tcg_out_setcond_i64(TCGContext *s, TCGCond cond, TCGReg ret,
             c2 = c1, c2const = 0, c1 = TCG_REG_G0;
             /* FALLTHRU */
         case TCG_COND_LTU:
-            tcg_out_cmp(s, c1, c2, c2const);
+            tcg_out_cmp(s, cond, c1, c2, c2const);
             tcg_out_arith(s, ret, TCG_REG_G0, TCG_REG_G0, ARITH_ADDXC);
             return;
         default:
@@ -814,7 +815,7 @@ static void tcg_out_setcond_i64(TCGContext *s, TCGCond cond, TCGReg ret,
         tcg_out_movi_s13(s, ret, 0);
         tcg_out_movr(s, rcond, ret, c1, neg ? -1 : 1, 1);
     } else {
-        tcg_out_cmp(s, c1, c2, c2const);
+        tcg_out_cmp(s, cond, c1, c2, c2const);
         tcg_out_movi_s13(s, ret, 0);
         tcg_out_movcc(s, cond, MOVCC_XCC, ret, neg ? -1 : 1, 1);
     }
@@ -1102,7 +1103,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
         tcg_out_movi_s32(s, TCG_REG_T3, compare_mask);
         tcg_out_arith(s, TCG_REG_T3, addr_reg, TCG_REG_T3, ARITH_AND);
     }
-    tcg_out_cmp(s, TCG_REG_T2, TCG_REG_T3, 0);
+    tcg_out_cmp(s, TCG_COND_NE, TCG_REG_T2, TCG_REG_T3, 0);
 
     ldst = new_ldst_label(s);
     ldst->is_ld = is_ld;
-- 
2.34.1



  parent reply	other threads:[~2024-02-04 21:44 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-04 21:40 [PULL 00/39] tcg patch queue Richard Henderson
2024-02-04 21:40 ` [PULL 01/39] tcg: Introduce TCG_COND_TST{EQ,NE} Richard Henderson
2024-02-04 21:40 ` [PULL 02/39] tcg: Introduce TCG_TARGET_HAS_tst Richard Henderson
2024-02-04 21:40 ` [PULL 03/39] tcg/optimize: Split out arg_is_const_val Richard Henderson
2024-02-04 21:40 ` [PULL 04/39] tcg/optimize: Split out do_constant_folding_cond1 Richard Henderson
2024-02-04 21:40 ` [PULL 05/39] tcg/optimize: Do swap_commutative2 in do_constant_folding_cond2 Richard Henderson
2024-02-04 21:40 ` [PULL 06/39] tcg/optimize: Handle TCG_COND_TST{EQ,NE} Richard Henderson
2024-02-04 21:40 ` [PULL 07/39] tcg/optimize: Lower TCG_COND_TST{EQ,NE} if unsupported Richard Henderson
2024-02-04 21:40 ` [PULL 08/39] target/alpha: Pass immediate value to gen_bcond_internal() Richard Henderson
2024-02-04 21:40 ` [PULL 09/39] target/alpha: Use TCG_COND_TST{EQ,NE} for BLB{C,S} Richard Henderson
2024-02-04 21:40 ` [PULL 10/39] target/alpha: Use TCG_COND_TST{EQ,NE} for CMOVLB{C,S} Richard Henderson
2024-02-04 21:40 ` [PULL 11/39] target/alpha: Use TCG_COND_TSTNE for gen_fold_mzero Richard Henderson
2024-02-04 21:40 ` [PULL 12/39] target/m68k: Use TCG_COND_TST{EQ,NE} in gen_fcc_cond Richard Henderson
2024-02-04 21:40 ` [PULL 13/39] target/sparc: Use TCG_COND_TSTEQ in gen_op_mulscc Richard Henderson
2024-02-04 21:40 ` [PULL 14/39] target/s390x: Use TCG_COND_TSTNE for CC_OP_{TM,ICM} Richard Henderson
2024-02-04 21:40 ` [PULL 15/39] target/s390x: Improve general case of disas_jcc Richard Henderson
2024-02-04 21:40 ` [PULL 16/39] tcg: Add TCGConst argument to tcg_target_const_match Richard Henderson
2024-02-04 21:40 ` [PULL 17/39] tcg/aarch64: Support TCG_COND_TST{EQ,NE} Richard Henderson
2024-02-04 21:40 ` [PULL 18/39] tcg/aarch64: Massage tcg_out_brcond() Richard Henderson
2024-02-04 21:40 ` [PULL 19/39] tcg/aarch64: Generate TBZ, TBNZ Richard Henderson
2024-02-04 21:40 ` [PULL 20/39] tcg/aarch64: Generate CBNZ for TSTNE of UINT32_MAX Richard Henderson
2024-02-04 21:40 ` [PULL 21/39] tcg/arm: Split out tcg_out_cmp() Richard Henderson
2024-02-04 21:40 ` [PULL 22/39] tcg/arm: Support TCG_COND_TST{EQ,NE} Richard Henderson
2024-02-04 21:40 ` [PULL 23/39] tcg/i386: Pass x86 condition codes to tcg_out_cmov Richard Henderson
2024-02-04 21:40 ` [PULL 24/39] tcg/i386: Move tcg_cond_to_jcc[] into tcg_out_cmp Richard Henderson
2024-02-04 21:40 ` [PULL 25/39] tcg/i386: Support TCG_COND_TST{EQ,NE} Richard Henderson
2024-02-04 21:40 ` [PULL 26/39] tcg/i386: Improve TSTNE/TESTEQ vs powers of two Richard Henderson
2024-02-04 21:40 ` [PULL 27/39] tcg/i386: Use TEST r,r to test 8/16/32 bits Richard Henderson
2024-02-04 21:40 ` [PULL 28/39] tcg/sparc64: Hoist read of tcg_cond_to_rcond Richard Henderson
2024-02-04 21:40 ` Richard Henderson [this message]
2024-02-04 21:40 ` [PULL 30/39] tcg/sparc64: Support TCG_COND_TST{EQ,NE} Richard Henderson
2024-02-04 21:40 ` [PULL 31/39] tcg/ppc: Sink tcg_to_bc usage into tcg_out_bc Richard Henderson
2024-02-04 21:40 ` [PULL 32/39] tcg/ppc: Use cr0 in tcg_to_bc and tcg_to_isel Richard Henderson
2024-02-04 21:40 ` [PULL 33/39] tcg/ppc: Tidy up tcg_target_const_match Richard Henderson
2024-02-04 21:40 ` [PULL 34/39] tcg/ppc: Add TCG_CT_CONST_CMP Richard Henderson
2024-02-04 21:40 ` [PULL 35/39] tcg/ppc: Support TCG_COND_TST{EQ,NE} Richard Henderson
2024-02-04 21:40 ` [PULL 36/39] tcg/s390x: Split constraint A into J+U Richard Henderson
2024-02-04 21:40 ` [PULL 37/39] tcg/s390x: Add TCG_CT_CONST_CMP Richard Henderson
2024-02-04 21:40 ` [PULL 38/39] tcg/s390x: Support TCG_COND_TST{EQ,NE} Richard Henderson
2024-02-04 21:40 ` [PULL 39/39] tcg/tci: " Richard Henderson
2024-02-05 12:59 ` [PULL 00/39] tcg patch queue Peter Maydell

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