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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, gustavo.romero@linaro.org, qemu-stable@nongnu.org
Subject: [PATCH v2 2/6] target/arm: Fix nregs computation in do_ld_zpa
Date: Tue,  6 Feb 2024 13:05:23 +1000	[thread overview]
Message-ID: <20240206030527.169147-3-richard.henderson@linaro.org> (raw)
In-Reply-To: <20240206030527.169147-1-richard.henderson@linaro.org>

The field is encoded as [0-3], which is convenient for
indexing our array of function pointers, but the true
value is [1-4].  Adjust before calling do_mem_zpa.

Add an assert, and move the comment re passing ZT to
the helper back next to the relevant code.

Cc: qemu-stable@nongnu.org
Fixes: 206adacfb8d ("target/arm: Add mte helpers for sve scalar + int loads")
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/tcg/translate-sve.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/target/arm/tcg/translate-sve.c b/target/arm/tcg/translate-sve.c
index 296e7d1ce2..f50a426c98 100644
--- a/target/arm/tcg/translate-sve.c
+++ b/target/arm/tcg/translate-sve.c
@@ -4445,11 +4445,7 @@ static void do_mem_zpa(DisasContext *s, int zt, int pg, TCGv_i64 addr,
     TCGv_ptr t_pg;
     int desc = 0;
 
-    /*
-     * For e.g. LD4, there are not enough arguments to pass all 4
-     * registers as pointers, so encode the regno into the data field.
-     * For consistency, do this even for LD1.
-     */
+    assert(mte_n >= 1 && mte_n <= 4);
     if (s->mte_active[0]) {
         int msz = dtype_msz(dtype);
 
@@ -4463,6 +4459,11 @@ static void do_mem_zpa(DisasContext *s, int zt, int pg, TCGv_i64 addr,
         addr = clean_data_tbi(s, addr);
     }
 
+    /*
+     * For e.g. LD4, there are not enough arguments to pass all 4
+     * registers as pointers, so encode the regno into the data field.
+     * For consistency, do this even for LD1.
+     */
     desc = simd_desc(vsz, vsz, zt | desc);
     t_pg = tcg_temp_new_ptr();
 
@@ -4600,7 +4601,7 @@ static void do_ld_zpa(DisasContext *s, int zt, int pg,
      * accessible via the instruction encoding.
      */
     assert(fn != NULL);
-    do_mem_zpa(s, zt, pg, addr, dtype, nreg, false, fn);
+    do_mem_zpa(s, zt, pg, addr, dtype, nreg + 1, false, fn);
 }
 
 static bool trans_LD_zprr(DisasContext *s, arg_rprr_load *a)
-- 
2.34.1



  parent reply	other threads:[~2024-02-06  3:08 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-06  3:05 [PATCH v2 0/6] target/arm: assorted mte fixes Richard Henderson
2024-02-06  3:05 ` [PATCH v2 1/6] linux-user/aarch64: Extend PR_SET_TAGGED_ADDR_CTRL for FEAT_MTE3 Richard Henderson
2024-02-06 14:23   ` Peter Maydell
2024-02-07  0:31     ` Richard Henderson
2024-02-07  2:10     ` Richard Henderson
2024-02-06 15:18   ` Gustavo Romero
2024-02-06  3:05 ` Richard Henderson [this message]
2024-02-06 14:46   ` [PATCH v2 2/6] target/arm: Fix nregs computation in do_ld_zpa Peter Maydell
2024-02-07  0:42     ` Richard Henderson
2024-02-06  3:05 ` [PATCH v2 3/6] target/arm: Adjust and validate mtedesc sizem1 Richard Henderson
2024-02-06 14:49   ` Peter Maydell
2024-02-06  3:05 ` [PATCH v2 4/6] target/arm: Split out make_svemte_desc Richard Henderson
2024-02-06 14:52   ` Peter Maydell
2024-02-06  3:05 ` [PATCH v2 5/6] target/arm: Handle mte in do_ldrq, do_ldro Richard Henderson
2024-02-06 14:53   ` Peter Maydell
2024-02-06  3:05 ` [PATCH v2 6/6] target/arm: Fix SVE/SME gross MTE suppression checks Richard Henderson
2024-02-06 14:54   ` Peter Maydell
2024-02-06 14:54 ` [PATCH v2 0/6] target/arm: assorted mte fixes Peter Maydell
2024-02-06 20:10   ` Richard Henderson
2024-02-06 15:17 ` Gustavo Romero

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