From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, gustavo.romero@linaro.org
Subject: [PATCH v2 5/6] target/arm: Handle mte in do_ldrq, do_ldro
Date: Tue, 6 Feb 2024 13:05:26 +1000 [thread overview]
Message-ID: <20240206030527.169147-6-richard.henderson@linaro.org> (raw)
In-Reply-To: <20240206030527.169147-1-richard.henderson@linaro.org>
These functions "use the standard load helpers", but
fail to clean_data_tbi or populate mtedesc.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/tcg/translate-sve.c | 15 +++++++++++++--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/target/arm/tcg/translate-sve.c b/target/arm/tcg/translate-sve.c
index 8868aae5ac..fb3bcb47f6 100644
--- a/target/arm/tcg/translate-sve.c
+++ b/target/arm/tcg/translate-sve.c
@@ -4861,8 +4861,13 @@ static void do_ldrq(DisasContext *s, int zt, int pg, TCGv_i64 addr, int dtype)
unsigned vsz = vec_full_reg_size(s);
TCGv_ptr t_pg;
int poff;
+ uint32_t desc;
/* Load the first quadword using the normal predicated load helpers. */
+ if (!s->mte_active[0]) {
+ addr = clean_data_tbi(s, addr);
+ }
+
poff = pred_full_reg_offset(s, pg);
if (vsz > 16) {
/*
@@ -4886,7 +4891,8 @@ static void do_ldrq(DisasContext *s, int zt, int pg, TCGv_i64 addr, int dtype)
gen_helper_gvec_mem *fn
= ldr_fns[s->mte_active[0]][s->be_data == MO_BE][dtype][0];
- fn(tcg_env, t_pg, addr, tcg_constant_i32(simd_desc(16, 16, zt)));
+ desc = make_svemte_desc(s, 16, 1, dtype_msz(dtype), false, zt);
+ fn(tcg_env, t_pg, addr, tcg_constant_i32(desc));
/* Replicate that first quadword. */
if (vsz > 16) {
@@ -4929,6 +4935,7 @@ static void do_ldro(DisasContext *s, int zt, int pg, TCGv_i64 addr, int dtype)
unsigned vsz_r32;
TCGv_ptr t_pg;
int poff, doff;
+ uint32_t desc;
if (vsz < 32) {
/*
@@ -4941,6 +4948,9 @@ static void do_ldro(DisasContext *s, int zt, int pg, TCGv_i64 addr, int dtype)
}
/* Load the first octaword using the normal predicated load helpers. */
+ if (!s->mte_active[0]) {
+ addr = clean_data_tbi(s, addr);
+ }
poff = pred_full_reg_offset(s, pg);
if (vsz > 32) {
@@ -4965,7 +4975,8 @@ static void do_ldro(DisasContext *s, int zt, int pg, TCGv_i64 addr, int dtype)
gen_helper_gvec_mem *fn
= ldr_fns[s->mte_active[0]][s->be_data == MO_BE][dtype][0];
- fn(tcg_env, t_pg, addr, tcg_constant_i32(simd_desc(32, 32, zt)));
+ desc = make_svemte_desc(s, 32, 1, dtype_msz(dtype), false, zt);
+ fn(tcg_env, t_pg, addr, tcg_constant_i32(desc));
/*
* Replicate that first octaword.
--
2.34.1
next prev parent reply other threads:[~2024-02-06 3:07 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-06 3:05 [PATCH v2 0/6] target/arm: assorted mte fixes Richard Henderson
2024-02-06 3:05 ` [PATCH v2 1/6] linux-user/aarch64: Extend PR_SET_TAGGED_ADDR_CTRL for FEAT_MTE3 Richard Henderson
2024-02-06 14:23 ` Peter Maydell
2024-02-07 0:31 ` Richard Henderson
2024-02-07 2:10 ` Richard Henderson
2024-02-06 15:18 ` Gustavo Romero
2024-02-06 3:05 ` [PATCH v2 2/6] target/arm: Fix nregs computation in do_ld_zpa Richard Henderson
2024-02-06 14:46 ` Peter Maydell
2024-02-07 0:42 ` Richard Henderson
2024-02-06 3:05 ` [PATCH v2 3/6] target/arm: Adjust and validate mtedesc sizem1 Richard Henderson
2024-02-06 14:49 ` Peter Maydell
2024-02-06 3:05 ` [PATCH v2 4/6] target/arm: Split out make_svemte_desc Richard Henderson
2024-02-06 14:52 ` Peter Maydell
2024-02-06 3:05 ` Richard Henderson [this message]
2024-02-06 14:53 ` [PATCH v2 5/6] target/arm: Handle mte in do_ldrq, do_ldro Peter Maydell
2024-02-06 3:05 ` [PATCH v2 6/6] target/arm: Fix SVE/SME gross MTE suppression checks Richard Henderson
2024-02-06 14:54 ` Peter Maydell
2024-02-06 14:54 ` [PATCH v2 0/6] target/arm: assorted mte fixes Peter Maydell
2024-02-06 20:10 ` Richard Henderson
2024-02-06 15:17 ` Gustavo Romero
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