From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Thomas Huth" <thuth@redhat.com>,
"Aurelien Jarno" <aurelien@aurel32.net>,
"Laurent Vivier" <lvivier@redhat.com>,
"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Huacai Chen" <chenhuacai@kernel.org>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>
Subject: [RFC PATCH 01/11] target/mips: Remove helpers accessing SAAR registers
Date: Fri, 9 Feb 2024 10:05:02 +0100 [thread overview]
Message-ID: <20240209090513.9401-2-philmd@linaro.org> (raw)
In-Reply-To: <20240209090513.9401-1-philmd@linaro.org>
DisasContext::saar boolean is never set, so this code
is not reachable. Remove it.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/mips/tcg/sysemu_helper.h.inc | 5 ---
target/mips/tcg/sysemu/cp0_helper.c | 55 -----------------------------
target/mips/tcg/translate.c | 42 ----------------------
3 files changed, 102 deletions(-)
diff --git a/target/mips/tcg/sysemu_helper.h.inc b/target/mips/tcg/sysemu_helper.h.inc
index f163af1eac..78f7272208 100644
--- a/target/mips/tcg/sysemu_helper.h.inc
+++ b/target/mips/tcg/sysemu_helper.h.inc
@@ -31,8 +31,6 @@ DEF_HELPER_1(mftc0_tcschedule, tl, env)
DEF_HELPER_1(mfc0_tcschefback, tl, env)
DEF_HELPER_1(mftc0_tcschefback, tl, env)
DEF_HELPER_1(mfc0_count, tl, env)
-DEF_HELPER_1(mfc0_saar, tl, env)
-DEF_HELPER_1(mfhc0_saar, tl, env)
DEF_HELPER_1(mftc0_entryhi, tl, env)
DEF_HELPER_1(mftc0_status, tl, env)
DEF_HELPER_1(mftc0_cause, tl, env)
@@ -57,7 +55,6 @@ DEF_HELPER_1(dmfc0_lladdr, tl, env)
DEF_HELPER_1(dmfc0_maar, tl, env)
DEF_HELPER_2(dmfc0_watchlo, tl, env, i32)
DEF_HELPER_2(dmfc0_watchhi, tl, env, i32)
-DEF_HELPER_1(dmfc0_saar, tl, env)
#endif /* TARGET_MIPS64 */
DEF_HELPER_2(mtc0_index, void, env, tl)
@@ -104,8 +101,6 @@ DEF_HELPER_2(mtc0_hwrena, void, env, tl)
DEF_HELPER_2(mtc0_pwctl, void, env, tl)
DEF_HELPER_2(mtc0_count, void, env, tl)
DEF_HELPER_2(mtc0_saari, void, env, tl)
-DEF_HELPER_2(mtc0_saar, void, env, tl)
-DEF_HELPER_2(mthc0_saar, void, env, tl)
DEF_HELPER_2(mtc0_entryhi, void, env, tl)
DEF_HELPER_2(mttc0_entryhi, void, env, tl)
DEF_HELPER_2(mtc0_compare, void, env, tl)
diff --git a/target/mips/tcg/sysemu/cp0_helper.c b/target/mips/tcg/sysemu/cp0_helper.c
index 62f6fb4bf6..f8883a3515 100644
--- a/target/mips/tcg/sysemu/cp0_helper.c
+++ b/target/mips/tcg/sysemu/cp0_helper.c
@@ -371,22 +371,6 @@ target_ulong helper_mfc0_count(CPUMIPSState *env)
return (int32_t)cpu_mips_get_count(env);
}
-target_ulong helper_mfc0_saar(CPUMIPSState *env)
-{
- if ((env->CP0_SAARI & 0x3f) < 2) {
- return (int32_t) env->CP0_SAAR[env->CP0_SAARI & 0x3f];
- }
- return 0;
-}
-
-target_ulong helper_mfhc0_saar(CPUMIPSState *env)
-{
- if ((env->CP0_SAARI & 0x3f) < 2) {
- return env->CP0_SAAR[env->CP0_SAARI & 0x3f] >> 32;
- }
- return 0;
-}
-
target_ulong helper_mftc0_entryhi(CPUMIPSState *env)
{
int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
@@ -514,13 +498,6 @@ target_ulong helper_dmfc0_watchhi(CPUMIPSState *env, uint32_t sel)
return env->CP0_WatchHi[sel];
}
-target_ulong helper_dmfc0_saar(CPUMIPSState *env)
-{
- if ((env->CP0_SAARI & 0x3f) < 2) {
- return env->CP0_SAAR[env->CP0_SAARI & 0x3f];
- }
- return 0;
-}
#endif /* TARGET_MIPS64 */
void helper_mtc0_index(CPUMIPSState *env, target_ulong arg1)
@@ -1108,38 +1085,6 @@ void helper_mtc0_saari(CPUMIPSState *env, target_ulong arg1)
}
}
-void helper_mtc0_saar(CPUMIPSState *env, target_ulong arg1)
-{
- uint32_t target = env->CP0_SAARI & 0x3f;
- if (target < 2) {
- env->CP0_SAAR[target] = arg1 & 0x00000ffffffff03fULL;
- switch (target) {
- case 0:
- if (env->itu) {
- itc_reconfigure(env->itu);
- }
- break;
- }
- }
-}
-
-void helper_mthc0_saar(CPUMIPSState *env, target_ulong arg1)
-{
- uint32_t target = env->CP0_SAARI & 0x3f;
- if (target < 2) {
- env->CP0_SAAR[target] =
- (((uint64_t) arg1 << 32) & 0x00000fff00000000ULL) |
- (env->CP0_SAAR[target] & 0x00000000ffffffffULL);
- switch (target) {
- case 0:
- if (env->itu) {
- itc_reconfigure(env->itu);
- }
- break;
- }
- }
-}
-
void helper_mtc0_entryhi(CPUMIPSState *env, target_ulong arg1)
{
target_ulong old, val, mask;
diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
index 12094cc1e7..173b19a090 100644
--- a/target/mips/tcg/translate.c
+++ b/target/mips/tcg/translate.c
@@ -5151,17 +5151,6 @@ static void gen_mfhc0(DisasContext *ctx, TCGv arg, int reg, int sel)
goto cp0_unimplemented;
}
break;
- case CP0_REGISTER_09:
- switch (sel) {
- case CP0_REG09__SAAR:
- CP0_CHECK(ctx->saar);
- gen_helper_mfhc0_saar(arg, tcg_env);
- register_name = "SAAR";
- break;
- default:
- goto cp0_unimplemented;
- }
- break;
case CP0_REGISTER_17:
switch (sel) {
case CP0_REG17__LLADDR:
@@ -5252,17 +5241,6 @@ static void gen_mthc0(DisasContext *ctx, TCGv arg, int reg, int sel)
goto cp0_unimplemented;
}
break;
- case CP0_REGISTER_09:
- switch (sel) {
- case CP0_REG09__SAAR:
- CP0_CHECK(ctx->saar);
- gen_helper_mthc0_saar(tcg_env, arg);
- register_name = "SAAR";
- break;
- default:
- goto cp0_unimplemented;
- }
- break;
case CP0_REGISTER_17:
switch (sel) {
case CP0_REG17__LLADDR:
@@ -5680,11 +5658,6 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SAARI));
register_name = "SAARI";
break;
- case CP0_REG09__SAAR:
- CP0_CHECK(ctx->saar);
- gen_helper_mfc0_saar(arg, tcg_env);
- register_name = "SAAR";
- break;
default:
goto cp0_unimplemented;
}
@@ -6406,11 +6379,6 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
gen_helper_mtc0_saari(tcg_env, arg);
register_name = "SAARI";
break;
- case CP0_REG09__SAAR:
- CP0_CHECK(ctx->saar);
- gen_helper_mtc0_saar(tcg_env, arg);
- register_name = "SAAR";
- break;
default:
goto cp0_unimplemented;
}
@@ -7180,11 +7148,6 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SAARI));
register_name = "SAARI";
break;
- case CP0_REG09__SAAR:
- CP0_CHECK(ctx->saar);
- gen_helper_dmfc0_saar(arg, tcg_env);
- register_name = "SAAR";
- break;
default:
goto cp0_unimplemented;
}
@@ -7892,11 +7855,6 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
gen_helper_mtc0_saari(tcg_env, arg);
register_name = "SAARI";
break;
- case CP0_REG09__SAAR:
- CP0_CHECK(ctx->saar);
- gen_helper_mtc0_saar(tcg_env, arg);
- register_name = "SAAR";
- break;
default:
goto cp0_unimplemented;
}
--
2.41.0
next prev parent reply other threads:[~2024-02-09 9:06 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-09 9:05 [RFC PATCH 00/11] target/mips: Remove I6500 CPU definition Philippe Mathieu-Daudé
2024-02-09 9:05 ` Philippe Mathieu-Daudé [this message]
2024-02-09 9:05 ` [RFC PATCH 02/11] hw/misc/mips: Reduce itc_reconfigure() scope Philippe Mathieu-Daudé
2024-02-09 9:05 ` [RFC PATCH 03/11] target/mips: Remove MIPSITUState::itu field Philippe Mathieu-Daudé
2024-02-09 9:05 ` [RFC PATCH 04/11] target/mips: Remove CPUMIPSState::saarp field Philippe Mathieu-Daudé
2024-02-09 9:05 ` [RFC PATCH 05/11] hw/misc/mips_itu: Remove MIPSITUState::cpu0 field Philippe Mathieu-Daudé
2024-02-09 9:05 ` [RFC PATCH 06/11] hw/misc/mips_itu: Remove MIPSITUState::saar field Philippe Mathieu-Daudé
2024-02-09 9:05 ` [RFC PATCH 07/11] target/mips: Remove CPUMIPSState::CP0_SAAR[2] field Philippe Mathieu-Daudé
2024-02-09 9:05 ` [RFC PATCH 08/11] target/mips: Remove helpers accessing SAARI register Philippe Mathieu-Daudé
2024-02-09 9:05 ` [RFC PATCH 09/11] target/mips: Remove CPUMIPSState::CP0_SAARI field Philippe Mathieu-Daudé
2024-02-09 9:05 ` [RFC PATCH 10/11] target/mips: Remove the unused DisasContext::saar field Philippe Mathieu-Daudé
2024-02-09 9:05 ` [RFC PATCH 11/11] target/mips: Remove I6500 CPU definition Philippe Mathieu-Daudé
2024-02-09 10:59 ` [RFC PATCH 00/11] " Jiaxun Yang
2024-02-11 0:29 ` Richard Henderson
2024-02-13 16:32 ` Philippe Mathieu-Daudé
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