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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Thomas Huth" <thuth@redhat.com>,
	"Aurelien Jarno" <aurelien@aurel32.net>,
	"Laurent Vivier" <lvivier@redhat.com>,
	"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Huacai Chen" <chenhuacai@kernel.org>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>
Subject: [RFC PATCH 03/11] target/mips: Remove MIPSITUState::itu field
Date: Fri,  9 Feb 2024 10:05:04 +0100	[thread overview]
Message-ID: <20240209090513.9401-4-philmd@linaro.org> (raw)
In-Reply-To: <20240209090513.9401-1-philmd@linaro.org>

Previous commits removed the MT*C0(SAAR) helpers which
were using CPUMIPSState::itu, we can now remove it too.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/mips/cpu.h | 1 -
 hw/mips/cps.c     | 1 -
 2 files changed, 2 deletions(-)

diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index ef26fe03c7..6ec2ff4b97 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -1184,7 +1184,6 @@ typedef struct CPUArchState {
 #if !defined(CONFIG_USER_ONLY)
     CPUMIPSTLBContext *tlb;
     void *irq[8];
-    struct MIPSITUState *itu;
     MemoryRegion *itc_tag; /* ITC Configuration Tags */
 
     /* Loongson IOCSR memory */
diff --git a/hw/mips/cps.c b/hw/mips/cps.c
index 4f12e23ab5..988ceaa0b9 100644
--- a/hw/mips/cps.c
+++ b/hw/mips/cps.c
@@ -96,7 +96,6 @@ static void mips_cps_realize(DeviceState *dev, Error **errp)
             itu_present = true;
             /* Attach ITC Tag to the VP */
             env->itc_tag = mips_itu_get_tag_region(&s->itu);
-            env->itu = &s->itu;
         }
         qemu_register_reset(main_cpu_reset, cpu);
     }
-- 
2.41.0



  parent reply	other threads:[~2024-02-09  9:06 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-09  9:05 [RFC PATCH 00/11] target/mips: Remove I6500 CPU definition Philippe Mathieu-Daudé
2024-02-09  9:05 ` [RFC PATCH 01/11] target/mips: Remove helpers accessing SAAR registers Philippe Mathieu-Daudé
2024-02-09  9:05 ` [RFC PATCH 02/11] hw/misc/mips: Reduce itc_reconfigure() scope Philippe Mathieu-Daudé
2024-02-09  9:05 ` Philippe Mathieu-Daudé [this message]
2024-02-09  9:05 ` [RFC PATCH 04/11] target/mips: Remove CPUMIPSState::saarp field Philippe Mathieu-Daudé
2024-02-09  9:05 ` [RFC PATCH 05/11] hw/misc/mips_itu: Remove MIPSITUState::cpu0 field Philippe Mathieu-Daudé
2024-02-09  9:05 ` [RFC PATCH 06/11] hw/misc/mips_itu: Remove MIPSITUState::saar field Philippe Mathieu-Daudé
2024-02-09  9:05 ` [RFC PATCH 07/11] target/mips: Remove CPUMIPSState::CP0_SAAR[2] field Philippe Mathieu-Daudé
2024-02-09  9:05 ` [RFC PATCH 08/11] target/mips: Remove helpers accessing SAARI register Philippe Mathieu-Daudé
2024-02-09  9:05 ` [RFC PATCH 09/11] target/mips: Remove CPUMIPSState::CP0_SAARI field Philippe Mathieu-Daudé
2024-02-09  9:05 ` [RFC PATCH 10/11] target/mips: Remove the unused DisasContext::saar field Philippe Mathieu-Daudé
2024-02-09  9:05 ` [RFC PATCH 11/11] target/mips: Remove I6500 CPU definition Philippe Mathieu-Daudé
2024-02-09 10:59 ` [RFC PATCH 00/11] " Jiaxun Yang
2024-02-11  0:29 ` Richard Henderson
2024-02-13 16:32 ` Philippe Mathieu-Daudé

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