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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Thomas Huth" <thuth@redhat.com>,
	"Aurelien Jarno" <aurelien@aurel32.net>,
	"Laurent Vivier" <lvivier@redhat.com>,
	"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Huacai Chen" <chenhuacai@kernel.org>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>
Subject: [RFC PATCH 04/11] target/mips: Remove CPUMIPSState::saarp field
Date: Fri,  9 Feb 2024 10:05:05 +0100	[thread overview]
Message-ID: <20240209090513.9401-5-philmd@linaro.org> (raw)
In-Reply-To: <20240209090513.9401-1-philmd@linaro.org>

This field is never set, so remove the unreachable code.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/mips/cpu.h  | 1 -
 hw/misc/mips_itu.c | 6 ------
 2 files changed, 7 deletions(-)

diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 6ec2ff4b97..3b93591f7e 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -1174,7 +1174,6 @@ typedef struct CPUArchState {
     uint32_t CP0_Status_rw_bitmask; /* Read/write bits in CP0_Status */
     uint32_t CP0_TCStatus_rw_bitmask; /* Read/write bits in CP0_TCStatus */
     uint64_t insn_flags; /* Supported instruction set */
-    int saarp;
 
     /* Fields up to this point are cleared by a CPU reset */
     struct {} end_reset_fields;
diff --git a/hw/misc/mips_itu.c b/hw/misc/mips_itu.c
index db1220f8e0..d259a88d22 100644
--- a/hw/misc/mips_itu.c
+++ b/hw/misc/mips_itu.c
@@ -516,7 +516,6 @@ static void mips_itu_init(Object *obj)
 static void mips_itu_realize(DeviceState *dev, Error **errp)
 {
     MIPSITUState *s = MIPS_ITU(dev);
-    CPUMIPSState *env;
 
     if (s->num_fifo > ITC_FIFO_NUM_MAX) {
         error_setg(errp, "Exceed maximum number of FIFO cells: %d",
@@ -533,11 +532,6 @@ static void mips_itu_realize(DeviceState *dev, Error **errp)
         return;
     }
 
-    env = &MIPS_CPU(s->cpu0)->env;
-    if (env->saarp) {
-        s->saar = env->CP0_SAAR;
-    }
-
     s->cell = g_new(ITCStorageCell, get_num_cells(s));
 }
 
-- 
2.41.0



  parent reply	other threads:[~2024-02-09  9:06 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-09  9:05 [RFC PATCH 00/11] target/mips: Remove I6500 CPU definition Philippe Mathieu-Daudé
2024-02-09  9:05 ` [RFC PATCH 01/11] target/mips: Remove helpers accessing SAAR registers Philippe Mathieu-Daudé
2024-02-09  9:05 ` [RFC PATCH 02/11] hw/misc/mips: Reduce itc_reconfigure() scope Philippe Mathieu-Daudé
2024-02-09  9:05 ` [RFC PATCH 03/11] target/mips: Remove MIPSITUState::itu field Philippe Mathieu-Daudé
2024-02-09  9:05 ` Philippe Mathieu-Daudé [this message]
2024-02-09  9:05 ` [RFC PATCH 05/11] hw/misc/mips_itu: Remove MIPSITUState::cpu0 field Philippe Mathieu-Daudé
2024-02-09  9:05 ` [RFC PATCH 06/11] hw/misc/mips_itu: Remove MIPSITUState::saar field Philippe Mathieu-Daudé
2024-02-09  9:05 ` [RFC PATCH 07/11] target/mips: Remove CPUMIPSState::CP0_SAAR[2] field Philippe Mathieu-Daudé
2024-02-09  9:05 ` [RFC PATCH 08/11] target/mips: Remove helpers accessing SAARI register Philippe Mathieu-Daudé
2024-02-09  9:05 ` [RFC PATCH 09/11] target/mips: Remove CPUMIPSState::CP0_SAARI field Philippe Mathieu-Daudé
2024-02-09  9:05 ` [RFC PATCH 10/11] target/mips: Remove the unused DisasContext::saar field Philippe Mathieu-Daudé
2024-02-09  9:05 ` [RFC PATCH 11/11] target/mips: Remove I6500 CPU definition Philippe Mathieu-Daudé
2024-02-09 10:59 ` [RFC PATCH 00/11] " Jiaxun Yang
2024-02-11  0:29 ` Richard Henderson
2024-02-13 16:32 ` Philippe Mathieu-Daudé

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