From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Thomas Huth" <thuth@redhat.com>,
"Aurelien Jarno" <aurelien@aurel32.net>,
"Laurent Vivier" <lvivier@redhat.com>,
"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Huacai Chen" <chenhuacai@kernel.org>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>
Subject: [RFC PATCH 05/11] hw/misc/mips_itu: Remove MIPSITUState::cpu0 field
Date: Fri, 9 Feb 2024 10:05:06 +0100 [thread overview]
Message-ID: <20240209090513.9401-6-philmd@linaro.org> (raw)
In-Reply-To: <20240209090513.9401-1-philmd@linaro.org>
Since previous commit the MIPSITUState::cpu0 field is not
used anymore. Remove it.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/misc/mips_itu.h | 1 -
hw/mips/cps.c | 2 --
hw/misc/mips_itu.c | 5 -----
3 files changed, 8 deletions(-)
diff --git a/include/hw/misc/mips_itu.h b/include/hw/misc/mips_itu.h
index 3a7330ac07..de7400c1fe 100644
--- a/include/hw/misc/mips_itu.h
+++ b/include/hw/misc/mips_itu.h
@@ -73,7 +73,6 @@ struct MIPSITUState {
/* SAAR */
uint64_t *saar;
- ArchCPU *cpu0;
};
/* Get ITC Configuration Tag memory region. */
diff --git a/hw/mips/cps.c b/hw/mips/cps.c
index 988ceaa0b9..07b73b0a1f 100644
--- a/hw/mips/cps.c
+++ b/hw/mips/cps.c
@@ -103,8 +103,6 @@ static void mips_cps_realize(DeviceState *dev, Error **errp)
/* Inter-Thread Communication Unit */
if (itu_present) {
object_initialize_child(OBJECT(dev), "itu", &s->itu, TYPE_MIPS_ITU);
- object_property_set_link(OBJECT(&s->itu), "cpu[0]",
- OBJECT(first_cpu), &error_abort);
object_property_set_uint(OBJECT(&s->itu), "num-fifo", 16,
&error_abort);
object_property_set_uint(OBJECT(&s->itu), "num-semaphores", 16,
diff --git a/hw/misc/mips_itu.c b/hw/misc/mips_itu.c
index d259a88d22..9705efeafe 100644
--- a/hw/misc/mips_itu.c
+++ b/hw/misc/mips_itu.c
@@ -527,10 +527,6 @@ static void mips_itu_realize(DeviceState *dev, Error **errp)
s->num_semaphores);
return;
}
- if (!s->cpu0) {
- error_setg(errp, "Missing 'cpu[0]' property");
- return;
- }
s->cell = g_new(ITCStorageCell, get_num_cells(s));
}
@@ -558,7 +554,6 @@ static Property mips_itu_properties[] = {
ITC_FIFO_NUM_MAX),
DEFINE_PROP_UINT32("num-semaphores", MIPSITUState, num_semaphores,
ITC_SEMAPH_NUM_MAX),
- DEFINE_PROP_LINK("cpu[0]", MIPSITUState, cpu0, TYPE_MIPS_CPU, ArchCPU *),
DEFINE_PROP_END_OF_LIST(),
};
--
2.41.0
next prev parent reply other threads:[~2024-02-09 9:07 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-09 9:05 [RFC PATCH 00/11] target/mips: Remove I6500 CPU definition Philippe Mathieu-Daudé
2024-02-09 9:05 ` [RFC PATCH 01/11] target/mips: Remove helpers accessing SAAR registers Philippe Mathieu-Daudé
2024-02-09 9:05 ` [RFC PATCH 02/11] hw/misc/mips: Reduce itc_reconfigure() scope Philippe Mathieu-Daudé
2024-02-09 9:05 ` [RFC PATCH 03/11] target/mips: Remove MIPSITUState::itu field Philippe Mathieu-Daudé
2024-02-09 9:05 ` [RFC PATCH 04/11] target/mips: Remove CPUMIPSState::saarp field Philippe Mathieu-Daudé
2024-02-09 9:05 ` Philippe Mathieu-Daudé [this message]
2024-02-09 9:05 ` [RFC PATCH 06/11] hw/misc/mips_itu: Remove MIPSITUState::saar field Philippe Mathieu-Daudé
2024-02-09 9:05 ` [RFC PATCH 07/11] target/mips: Remove CPUMIPSState::CP0_SAAR[2] field Philippe Mathieu-Daudé
2024-02-09 9:05 ` [RFC PATCH 08/11] target/mips: Remove helpers accessing SAARI register Philippe Mathieu-Daudé
2024-02-09 9:05 ` [RFC PATCH 09/11] target/mips: Remove CPUMIPSState::CP0_SAARI field Philippe Mathieu-Daudé
2024-02-09 9:05 ` [RFC PATCH 10/11] target/mips: Remove the unused DisasContext::saar field Philippe Mathieu-Daudé
2024-02-09 9:05 ` [RFC PATCH 11/11] target/mips: Remove I6500 CPU definition Philippe Mathieu-Daudé
2024-02-09 10:59 ` [RFC PATCH 00/11] " Jiaxun Yang
2024-02-11 0:29 ` Richard Henderson
2024-02-13 16:32 ` Philippe Mathieu-Daudé
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