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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Thomas Huth" <thuth@redhat.com>,
	"Aurelien Jarno" <aurelien@aurel32.net>,
	"Laurent Vivier" <lvivier@redhat.com>,
	"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Huacai Chen" <chenhuacai@kernel.org>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>
Subject: [RFC PATCH 07/11] target/mips: Remove CPUMIPSState::CP0_SAAR[2] field
Date: Fri,  9 Feb 2024 10:05:08 +0100	[thread overview]
Message-ID: <20240209090513.9401-8-philmd@linaro.org> (raw)
In-Reply-To: <20240209090513.9401-1-philmd@linaro.org>

Remove the unused CP0_SAAR[2] registers.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/mips/cpu.h            | 1 -
 target/mips/sysemu/machine.c | 2 +-
 2 files changed, 1 insertion(+), 2 deletions(-)

diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 3b93591f7e..e621196ae1 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -749,7 +749,6 @@ typedef struct CPUArchState {
     int32_t CP0_Count;
     uint32_t CP0_SAARI;
 #define CP0SAARI_TARGET 0    /*  5..0  */
-    uint64_t CP0_SAAR[2];
 #define CP0SAAR_BASE    12   /* 43..12 */
 #define CP0SAAR_SIZE    1    /*  5..1  */
 #define CP0SAAR_EN      0
diff --git a/target/mips/sysemu/machine.c b/target/mips/sysemu/machine.c
index 218f4c3a67..6d1299a89e 100644
--- a/target/mips/sysemu/machine.c
+++ b/target/mips/sysemu/machine.c
@@ -282,7 +282,7 @@ const VMStateDescription vmstate_mips_cpu = {
         VMSTATE_UINT32(env.CP0_BadInstrX, MIPSCPU),
         VMSTATE_INT32(env.CP0_Count, MIPSCPU),
         VMSTATE_UINT32(env.CP0_SAARI, MIPSCPU),
-        VMSTATE_UINT64_ARRAY(env.CP0_SAAR, MIPSCPU, 2),
+        VMSTATE_UNUSED(2 * sizeof(uint64_t)), /* was CP0_SAAR[2] */
         VMSTATE_UINTTL(env.CP0_EntryHi, MIPSCPU),
         VMSTATE_INT32(env.CP0_Compare, MIPSCPU),
         VMSTATE_INT32(env.CP0_Status, MIPSCPU),
-- 
2.41.0



  parent reply	other threads:[~2024-02-09  9:07 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-09  9:05 [RFC PATCH 00/11] target/mips: Remove I6500 CPU definition Philippe Mathieu-Daudé
2024-02-09  9:05 ` [RFC PATCH 01/11] target/mips: Remove helpers accessing SAAR registers Philippe Mathieu-Daudé
2024-02-09  9:05 ` [RFC PATCH 02/11] hw/misc/mips: Reduce itc_reconfigure() scope Philippe Mathieu-Daudé
2024-02-09  9:05 ` [RFC PATCH 03/11] target/mips: Remove MIPSITUState::itu field Philippe Mathieu-Daudé
2024-02-09  9:05 ` [RFC PATCH 04/11] target/mips: Remove CPUMIPSState::saarp field Philippe Mathieu-Daudé
2024-02-09  9:05 ` [RFC PATCH 05/11] hw/misc/mips_itu: Remove MIPSITUState::cpu0 field Philippe Mathieu-Daudé
2024-02-09  9:05 ` [RFC PATCH 06/11] hw/misc/mips_itu: Remove MIPSITUState::saar field Philippe Mathieu-Daudé
2024-02-09  9:05 ` Philippe Mathieu-Daudé [this message]
2024-02-09  9:05 ` [RFC PATCH 08/11] target/mips: Remove helpers accessing SAARI register Philippe Mathieu-Daudé
2024-02-09  9:05 ` [RFC PATCH 09/11] target/mips: Remove CPUMIPSState::CP0_SAARI field Philippe Mathieu-Daudé
2024-02-09  9:05 ` [RFC PATCH 10/11] target/mips: Remove the unused DisasContext::saar field Philippe Mathieu-Daudé
2024-02-09  9:05 ` [RFC PATCH 11/11] target/mips: Remove I6500 CPU definition Philippe Mathieu-Daudé
2024-02-09 10:59 ` [RFC PATCH 00/11] " Jiaxun Yang
2024-02-11  0:29 ` Richard Henderson
2024-02-13 16:32 ` Philippe Mathieu-Daudé

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