From: Jamin Lin via <qemu-devel@nongnu.org>
To: "open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: <troy_lee@aspeedtech.com>, <jamin_lin@aspeedtech.com>
Subject: [PATCH v3 0/2] UART0 device name and fix hardcode boot address 0
Date: Thu, 15 Feb 2024 15:33:28 +0800 [thread overview]
Message-ID: <20240215073330.2401960-1-jamin_lin@aspeedtech.com> (raw)
v1:
1. support uart controller both 0 and 1 base
2. fix hardcode boot address 0
v2:
1. introduce a new UART0 device name
2. remove ASPEED_SOC_SPI_BOOT_ADDR marco
v3:
1. add uart helper functions to get the index, start and last.
2. add more description in commit log
Jamin Lin (2):
aspeed: introduce a new UART0 device name
aspeed: fix hardcode boot address 0
hw/arm/aspeed.c | 17 +++++++++++------
hw/arm/aspeed_ast10x0.c | 1 +
hw/arm/aspeed_ast2400.c | 6 ++++--
hw/arm/aspeed_ast2600.c | 3 ++-
hw/arm/aspeed_soc_common.c | 10 ++++++----
include/hw/arm/aspeed_soc.h | 19 +++++++++++++++++--
6 files changed, 41 insertions(+), 15 deletions(-)
--
2.25.1
next reply other threads:[~2024-02-15 7:34 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-15 7:33 Jamin Lin via [this message]
2024-02-15 7:33 ` [PATCH v3 2/2] aspeed: fix hardcode boot address 0 Jamin Lin via
-- strict thread matches above, loose matches on Subject: below --
2024-02-15 7:59 [PATCH v3 0/2] UART0 device name and " Jamin Lin via
2024-02-15 7:53 Jamin Lin via
2024-02-15 7:20 Jamin Lin via
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