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From: Nicholas Piggin <npiggin@gmail.com>
To: qemu-devel@nongnu.org
Cc: "Nicholas Piggin" <npiggin@gmail.com>,
	qemu-ppc@nongnu.org,
	"Daniel Henrique Barboza" <danielhb413@gmail.com>,
	"Cédric Le Goater" <clg@kaod.org>,
	"Harsh Prateek Bora" <harshpb@linux.ibm.com>,
	"Glenn Miles" <milesg@linux.vnet.ibm.com>
Subject: [PULL 26/49] ppc/pnv: Add pca9552 to powernv10-rainier for PCIe hotplug power control
Date: Mon, 19 Feb 2024 18:29:15 +1000	[thread overview]
Message-ID: <20240219082938.238302-27-npiggin@gmail.com> (raw)
In-Reply-To: <20240219082938.238302-1-npiggin@gmail.com>

From: Glenn Miles <milesg@linux.vnet.ibm.com>

The Power Hypervisor code expects to see a pca9552 device connected
to the 3rd PNV I2C engine on port 1 at I2C address 0x63 (or left-
justified address of 0xC6).  This is used by hypervisor code to
control PCIe slot power during hotplug events.

Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
 hw/ppc/Kconfig       |  1 +
 hw/ppc/pnv.c         | 25 +++++++++++++++++++++++++
 include/hw/ppc/pnv.h |  1 +
 3 files changed, 27 insertions(+)

diff --git a/hw/ppc/Kconfig b/hw/ppc/Kconfig
index 44263a58c4..8e592e4307 100644
--- a/hw/ppc/Kconfig
+++ b/hw/ppc/Kconfig
@@ -32,6 +32,7 @@ config POWERNV
     select XIVE
     select FDT_PPC
     select PCI_POWERNV
+    select PCA9552
 
 config PPC405
     bool
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 33b905f854..78f5c6262a 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -790,6 +790,7 @@ static void pnv_init(MachineState *machine)
     const char *bios_name = machine->firmware ?: FW_FILE_NAME;
     PnvMachineState *pnv = PNV_MACHINE(machine);
     MachineClass *mc = MACHINE_GET_CLASS(machine);
+    PnvMachineClass *pmc = PNV_MACHINE_GET_CLASS(machine);
     char *fw_filename;
     long fw_size;
     uint64_t chip_ram_start = 0;
@@ -979,6 +980,13 @@ static void pnv_init(MachineState *machine)
      */
     pnv->powerdown_notifier.notify = pnv_powerdown_notify;
     qemu_register_powerdown_notifier(&pnv->powerdown_notifier);
+
+    /*
+     * Create/Connect any machine-specific I2C devices
+     */
+    if (pmc->i2c_init) {
+        pmc->i2c_init(pnv);
+    }
 }
 
 /*
@@ -1879,6 +1887,21 @@ static void pnv_chip_power10_realize(DeviceState *dev, Error **errp)
                               qdev_get_gpio_in(DEVICE(&chip10->psi),
                                                PSIHB9_IRQ_SBE_I2C));
     }
+
+}
+
+static void pnv_rainier_i2c_init(PnvMachineState *pnv)
+{
+    int i;
+    for (i = 0; i < pnv->num_chips; i++) {
+        Pnv10Chip *chip10 = PNV10_CHIP(pnv->chips[i]);
+
+        /*
+         * Add a PCA9552 I2C device for PCIe hotplug control
+         * to engine 2, bus 1, address 0x63
+         */
+        i2c_slave_create_simple(chip10->i2c[2].busses[1], "pca9552", 0x63);
+    }
 }
 
 static uint32_t pnv_chip_power10_xscom_pcba(PnvChip *chip, uint64_t addr)
@@ -2286,9 +2309,11 @@ static void pnv_machine_power10_class_init(ObjectClass *oc, void *data)
 static void pnv_machine_p10_rainier_class_init(ObjectClass *oc, void *data)
 {
     MachineClass *mc = MACHINE_CLASS(oc);
+    PnvMachineClass *pmc = PNV_MACHINE_CLASS(oc);
 
     pnv_machine_p10_common_class_init(oc, data);
     mc->desc = "IBM PowerNV (Non-Virtualized) POWER10 Rainier";
+    pmc->i2c_init = pnv_rainier_i2c_init;
 }
 
 static bool pnv_machine_get_hb(Object *obj, Error **errp)
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
index 7e5fef7c43..110ac9aace 100644
--- a/include/hw/ppc/pnv.h
+++ b/include/hw/ppc/pnv.h
@@ -76,6 +76,7 @@ struct PnvMachineClass {
     int compat_size;
 
     void (*dt_power_mgt)(PnvMachineState *pnv, void *fdt);
+    void (*i2c_init)(PnvMachineState *pnv);
 };
 
 struct PnvMachineState {
-- 
2.42.0



  parent reply	other threads:[~2024-02-19  8:33 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-19  8:28 [PULL 00/49] ppc-for-9.0 queue Nicholas Piggin
2024-02-19  8:28 ` [PULL 01/49] target/ppc: Fix lxv/stxv MSR facility check Nicholas Piggin
2024-02-19  8:28 ` [PULL 02/49] target/ppc: Fix crash on machine check caused by ifetch Nicholas Piggin
2024-02-19  8:28 ` [PULL 03/49] tests/avocado: mark boot_linux.py long runtime instead of flaky Nicholas Piggin
2024-02-19  8:28 ` [PULL 04/49] tests/avocado: improve flaky ppc/pnv boot_linux_console.py test Nicholas Piggin
2024-02-19  8:28 ` [PULL 05/49] tests/avocado: ppc add powernv10 boot_linux_console test Nicholas Piggin
2024-02-19  8:28 ` [PULL 06/49] tests/avocado: Add ppc pseries and powernv hash MMU tests Nicholas Piggin
2024-02-19  8:28 ` [PULL 07/49] tests/avocado: Add pseries KVM boot_linux test Nicholas Piggin
2024-02-19  8:28 ` [PULL 08/49] tests/avocado: ppc add hypervisor tests Nicholas Piggin
2024-02-19  8:28 ` [PULL 09/49] tests/avocado: Add FreeBSD distro boot tests for ppc Nicholas Piggin
2024-02-19 14:49   ` BALATON Zoltan
2024-02-20  1:16     ` Nicholas Piggin
2024-02-19  8:28 ` [PULL 10/49] tests/avocado: Use default CPU for pseries machine Nicholas Piggin
2024-02-19  8:29 ` [PULL 11/49] ppc/pnv: Update skiboot to v7.1 Nicholas Piggin
2024-02-19  8:29 ` [PULL 12/49] target/ppc: Rename registers to match ISA Nicholas Piggin
2024-02-19  8:29 ` [PULL 13/49] hw/ppc/spapr: Add missing license Nicholas Piggin
2024-02-19  8:29 ` [PULL 14/49] hw/ppc/spapr_hcall: Allow elision of softmmu_resize_hpt_prep Nicholas Piggin
2024-02-19  8:29 ` [PULL 15/49] hw/ppc/spapr_hcall: Rename {softmmu -> vhyp_mmu}_resize_hpt_pr Nicholas Piggin
2024-02-19  8:29 ` [PULL 16/49] hw/ppc/spapr: Rename 'softmmu' -> 'vhyp_mmu' Nicholas Piggin
2024-02-19  8:29 ` [PULL 17/49] ppc/spapr: Introduce SPAPR_IRQ_NR_IPIS to refer IRQ range for CPU IPIs Nicholas Piggin
2024-02-19  8:29 ` [PULL 18/49] ppc/spapr: Initialize max_cpus limit to SPAPR_IRQ_NR_IPIS Nicholas Piggin
2024-02-19  8:29 ` [PULL 19/49] ppc/spapr: change pseries machine default to POWER10 CPU Nicholas Piggin
2024-02-19  8:29 ` [PULL 20/49] spapr: Tag pseries-2.1 - 2.11 machines as deprecated Nicholas Piggin
2024-09-16 13:14   ` Cédric Le Goater
2024-09-17  4:37     ` Harsh Prateek Bora
2024-02-19  8:29 ` [PULL 21/49] ppc/pnv: Change powernv default to powernv10 Nicholas Piggin
2024-02-19  8:29 ` [PULL 22/49] hw/pci-host/raven.c: Mark raven_io_ops as implementing unaligned accesses Nicholas Piggin
2024-02-19 14:49   ` BALATON Zoltan
2024-02-19 14:53     ` Cédric Le Goater
2024-02-19 14:55       ` Peter Maydell
2024-02-19 15:09         ` Cédric Le Goater
2024-02-19  8:29 ` [PULL 23/49] misc/pca9552: Fix inverted input status Nicholas Piggin
2024-02-19  8:29 ` [PULL 24/49] misc/pca9552: Let external devices set pca9552 inputs Nicholas Piggin
2024-02-19  8:29 ` [PULL 25/49] ppc/pnv: New powernv10-rainier machine type Nicholas Piggin
2024-02-19  8:29 ` Nicholas Piggin [this message]
2024-02-19  8:29 ` [PULL 27/49] ppc/pnv: Wire up pca9552 GPIO pins for PCIe hotplug power control Nicholas Piggin
2024-02-19  8:29 ` [PULL 28/49] ppc/pnv: Use resettable interface to reset child I2C buses Nicholas Piggin
2024-02-19  8:29 ` [PULL 29/49] misc: Add a pca9554 GPIO device model Nicholas Piggin
2024-02-19  8:29 ` [PULL 30/49] ppc/pnv: Add a pca9554 I2C device to powernv10-rainier Nicholas Piggin
2024-02-19  8:29 ` [PULL 31/49] ppc/pnv: Test pnv i2c master and connected devices Nicholas Piggin
2024-02-19  8:29 ` [PULL 32/49] hw/ppc: Add pnv nest pervasive common chiplet model Nicholas Piggin
2024-02-19  8:29 ` [PULL 33/49] hw/ppc: Add N1 " Nicholas Piggin
2024-02-19  8:29 ` [PULL 34/49] hw/ppc: N1 chiplet wiring Nicholas Piggin
2024-02-19  8:29 ` [PULL 35/49] target/ppc: Update gdbstub to read SPR's CFAR, DEC, HDEC, TB-L/U Nicholas Piggin
2024-02-19  8:29 ` [PULL 36/49] target/ppc: Rename TBL to TB on 64-bit Nicholas Piggin
2024-02-19  8:29 ` [PULL 37/49] target/ppc: Improve timebase register defines naming Nicholas Piggin
2024-02-19  8:29 ` [PULL 38/49] target/ppc: Fix move-to timebase SPR access permissions Nicholas Piggin
2024-02-19  8:29 ` [PULL 39/49] ppc/pnv: Add POWER9/10 chiptod model Nicholas Piggin
2024-02-19  8:29 ` [PULL 40/49] ppc/pnv: Wire ChipTOD model to powernv9 and powernv10 machines Nicholas Piggin
2024-02-19  8:29 ` [PULL 41/49] ppc/pnv: Implement the ChipTOD to Core transfer Nicholas Piggin
2024-02-19  8:29 ` [PULL 42/49] target/ppc: Implement core timebase state machine and TFMR Nicholas Piggin
2024-02-19  8:29 ` [PULL 43/49] target/ppc: Add SMT support to time facilities Nicholas Piggin
2024-02-19  8:29 ` [PULL 44/49] target/ppc: Fix 440 tlbwe TLB invalidation gaps Nicholas Piggin
2024-02-19  8:29 ` [PULL 45/49] target/ppc: Factor out 4xx ppcemb_tlb_t flushing Nicholas Piggin
2024-02-19  8:29 ` [PULL 46/49] target/ppc: 4xx don't flush TLB for a newly written software TLB entry Nicholas Piggin
2024-02-19  8:29 ` [PULL 47/49] target/ppc: 4xx optimise tlbwe_lo TLB flushing Nicholas Piggin
2024-02-19  8:29 ` [PULL 48/49] target/ppc: 440 optimise tlbwe " Nicholas Piggin
2024-02-19  8:29 ` [PULL 49/49] target/ppc: optimise ppcemb_tlb_t flushing Nicholas Piggin
2024-02-19 17:06 ` [PULL 00/49] ppc-for-9.0 queue Peter Maydell
2024-02-20  1:15   ` Nicholas Piggin

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