qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org, Bernhard Beschow <shentey@gmail.com>
Cc: "Michael S. Tsirkin" <mst@redhat.com>,
	"Ani Sinha" <anisinha@redhat.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Igor Mammedov" <imammedo@redhat.com>,
	"Mark Cave-Ayland" <mark.cave-ayland@ilande.co.uk>,
	"Laurent Vivier" <lvivier@redhat.com>,
	"Thomas Huth" <thuth@redhat.com>,
	"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
	"Eduardo Habkost" <eduardo@habkost.net>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"BALATON Zoltan" <balaton@eik.bme.hu>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH 03/14] hw/acpi/ich9: Restrict definitions from 'hw/southbridge/ich9.h'
Date: Mon, 19 Feb 2024 17:38:43 +0100	[thread overview]
Message-ID: <20240219163855.87326-4-philmd@linaro.org> (raw)
In-Reply-To: <20240219163855.87326-1-philmd@linaro.org>

Restrict ACPI definitions from "hw/southbridge/ich9.h"
to the ACPI files where they are used.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 include/hw/acpi/ich9.h        | 15 +++++++++++++++
 include/hw/southbridge/ich9.h | 18 ------------------
 hw/acpi/ich9.c                |  4 ++++
 3 files changed, 19 insertions(+), 18 deletions(-)

diff --git a/include/hw/acpi/ich9.h b/include/hw/acpi/ich9.h
index 215de3c91f..3587a35c9f 100644
--- a/include/hw/acpi/ich9.h
+++ b/include/hw/acpi/ich9.h
@@ -91,4 +91,19 @@ void ich9_pm_device_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
 bool ich9_pm_is_hotpluggable_bus(HotplugHandler *hotplug_dev, BusState *bus);
 
 void ich9_pm_ospm_status(AcpiDeviceIf *adev, ACPIOSTInfoList ***list);
+
+#define ICH9_PMIO_PM1_STS                       0x00
+#define ICH9_PMIO_PM1_EN                        0x02
+#define ICH9_PMIO_PM1_CNT                       0x04
+#define ICH9_PMIO_PM1_TMR                       0x08
+#define ICH9_PMIO_GPE0_STS                      0x20
+#define ICH9_PMIO_GPE0_EN                       0x28
+#define ICH9_PMIO_GPE0_LEN                      16
+#define ICH9_PMIO_SMI_EN                        0x30
+#define ICH9_PMIO_SMI_EN_APMC_EN                (1 << 5)
+#define ICH9_PMIO_SMI_EN_TCO_EN                 (1 << 13)
+#define ICH9_PMIO_SMI_STS                       0x34
+#define ICH9_PMIO_TCO_RLD                       0x60
+#define ICH9_PMIO_TCO_LEN                       32
+
 #endif /* HW_ACPI_ICH9_H */
diff --git a/include/hw/southbridge/ich9.h b/include/hw/southbridge/ich9.h
index fd01649d04..1ac4238f7e 100644
--- a/include/hw/southbridge/ich9.h
+++ b/include/hw/southbridge/ich9.h
@@ -183,24 +183,6 @@ struct ICH9LPCState {
 /* D31:F0 power management I/O registers
    offset from the address ICH9_LPC_PMBASE */
 
-/* ICH9 LPC PM I/O registers are 128 ports and 128-aligned */
-#define ICH9_PMIO_SIZE                          128
-#define ICH9_PMIO_MASK                          (ICH9_PMIO_SIZE - 1)
-
-#define ICH9_PMIO_PM1_STS                       0x00
-#define ICH9_PMIO_PM1_EN                        0x02
-#define ICH9_PMIO_PM1_CNT                       0x04
-#define ICH9_PMIO_PM1_TMR                       0x08
-#define ICH9_PMIO_GPE0_STS                      0x20
-#define ICH9_PMIO_GPE0_EN                       0x28
-#define ICH9_PMIO_GPE0_LEN                      16
-#define ICH9_PMIO_SMI_EN                        0x30
-#define ICH9_PMIO_SMI_EN_APMC_EN                (1 << 5)
-#define ICH9_PMIO_SMI_EN_TCO_EN                 (1 << 13)
-#define ICH9_PMIO_SMI_STS                       0x34
-#define ICH9_PMIO_TCO_RLD                       0x60
-#define ICH9_PMIO_TCO_LEN                       32
-
 /* FADT ACPI_ENABLE/ACPI_DISABLE */
 #define ICH9_APM_ACPI_ENABLE                    0x2
 #define ICH9_APM_ACPI_DISABLE                   0x3
diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c
index be375a8b9d..228ebc9a1e 100644
--- a/hw/acpi/ich9.c
+++ b/hw/acpi/ich9.c
@@ -49,6 +49,10 @@ do { printf("%s "fmt, __func__, ## __VA_ARGS__); } while (0)
 #define ICH9_DEBUG(fmt, ...)    do { } while (0)
 #endif
 
+/* ICH9 LPC PM I/O registers are 128 ports and 128-aligned */
+#define ICH9_PMIO_SIZE                          128
+#define ICH9_PMIO_MASK                          (ICH9_PMIO_SIZE - 1)
+
 static void ich9_pm_update_sci_fn(ACPIREGS *regs)
 {
     ICH9LPCPMRegs *pm = container_of(regs, ICH9LPCPMRegs, acpi_regs);
-- 
2.41.0



  parent reply	other threads:[~2024-02-19 16:40 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-19 16:38 [PATCH 00/14] hw/southbridge: Extract ICH9 QOM container model Philippe Mathieu-Daudé
2024-02-19 16:38 ` [PATCH 01/14] MAINTAINERS: Add 'ICH9 South Bridge' section Philippe Mathieu-Daudé
2024-02-19 16:38 ` [PATCH 02/14] hw/i386/q35: Add local 'lpc_obj' variable Philippe Mathieu-Daudé
2024-02-19 16:38 ` Philippe Mathieu-Daudé [this message]
2024-02-19 16:38 ` [PATCH 04/14] hw/acpi/ich9_tco: Include 'ich9' in names Philippe Mathieu-Daudé
2024-02-19 16:38 ` [PATCH 05/14] hw/acpi/ich9_tco: Restrict ich9_generate_smi() declaration Philippe Mathieu-Daudé
2024-02-20  6:32   ` Philippe Mathieu-Daudé
2024-02-26  9:53     ` Philippe Mathieu-Daudé
2024-02-19 16:38 ` [PATCH 06/14] hw/pci-bridge: Extract QOM ICH definitions to 'ich_dmi_pci.h' Philippe Mathieu-Daudé
2024-02-19 18:15   ` BALATON Zoltan
2024-02-19 18:24     ` BALATON Zoltan
2024-02-20  6:09       ` Philippe Mathieu-Daudé
2024-02-20 12:20         ` BALATON Zoltan
2024-02-20 12:55           ` Thomas Huth
2024-02-26 13:46             ` Philippe Mathieu-Daudé
2024-02-26 13:56               ` BALATON Zoltan
2024-02-20 19:25   ` Bernhard Beschow
2024-02-21  8:54     ` Philippe Mathieu-Daudé
2024-02-19 16:38 ` [PATCH 07/14] hw/southbridge/ich9: Introduce TYPE_ICH9_SOUTHBRIDGE stub Philippe Mathieu-Daudé
2024-02-19 16:38 ` [PATCH 08/14] hw/southbridge/ich9: Add the DMI-to-PCI bridge Philippe Mathieu-Daudé
2024-02-19 16:38 ` [PATCH 09/14] hw/southbridge/ich9: Add a AHCI function Philippe Mathieu-Daudé
2024-02-19 18:31   ` BALATON Zoltan
2024-02-20  6:01     ` Philippe Mathieu-Daudé
2024-02-19 16:38 ` [PATCH 10/14] hw/i2c/smbus: Extract QOM ICH9 definitions to 'smbus_ich9.h' Philippe Mathieu-Daudé
2024-02-19 16:38 ` [PATCH 11/14] hw/southbridge/ich9: Add the SMBus function Philippe Mathieu-Daudé
2024-02-19 16:38 ` [PATCH 12/14] hw/southbridge/ich9: Add the USB EHCI/UHCI functions Philippe Mathieu-Daudé
2024-02-19 16:38 ` [PATCH 13/14] hw/southbridge/ich9: Extract LPC definitions to 'hw/isa/ich9_lpc.h' Philippe Mathieu-Daudé
2024-02-19 16:38 ` [PATCH 14/14] hw/southbridge/ich9: Add the LPC / ISA bridge function Philippe Mathieu-Daudé

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20240219163855.87326-4-philmd@linaro.org \
    --to=philmd@linaro.org \
    --cc=anisinha@redhat.com \
    --cc=balaton@eik.bme.hu \
    --cc=eduardo@habkost.net \
    --cc=imammedo@redhat.com \
    --cc=lvivier@redhat.com \
    --cc=marcel.apfelbaum@gmail.com \
    --cc=mark.cave-ayland@ilande.co.uk \
    --cc=mst@redhat.com \
    --cc=pbonzini@redhat.com \
    --cc=qemu-devel@nongnu.org \
    --cc=richard.henderson@linaro.org \
    --cc=shentey@gmail.com \
    --cc=thuth@redhat.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).