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[176.184.23.7]) by smtp.gmail.com with ESMTPSA id v16-20020a05600c471000b004126f8c68eesm2925856wmo.3.2024.02.20.11.26.26 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 20 Feb 2024 11:26:28 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Eduardo Habkost , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Mark Cave-Ayland , Bernhard Beschow , Richard Henderson , Markus Armbruster , Alexander Graf , Anton Johansson , Paolo Bonzini , Thomas Huth , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [RFC PATCH 0/2] hw: Replace cpu_interrupt() calls by qemu_irq(QDev GPIO) Date: Tue, 20 Feb 2024 20:26:23 +0100 Message-ID: <20240220192625.17944-1-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::231; envelope-from=philmd@linaro.org; helo=mail-lj1-x231.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi, cpu_interrupt() doesn't scale well with heterogenous machines because its mask is target specific (defined in target/ARCH/cpu.h). While it is (often...) used by target-specific hw to notify cpu, there is no restriction to use such target-specific hw in a heterogeneous setup, where it'd still target the same kind of target cpus. The Alpha Typhoon HW is unlikely to be used heterogeneously, but it is the simplest case I found to illustrate how I plan to remove cpu_interrupt() calls from hw/: use the QDev GPIO API. Does that sound good enough? Thanks, Phil. Philippe Mathieu-Daudé (2): target/alpha: Expose TMR and SMP IRQ lines via QDev hw/alpha/typhoon: Set CPU IRQs using QDev API hw/alpha/typhoon.c | 15 +++++++++------ target/alpha/cpu.c | 30 ++++++++++++++++++++++++++++++ 2 files changed, 39 insertions(+), 6 deletions(-) -- 2.41.0