From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Thomas Huth" <thuth@redhat.com>,
"Edgar E . Iglesias" <edgar.iglesias@gmail.com>,
"Anton Johansson" <anjo@rev.ng>,
"Mark Cave-Ayland" <mark.cave-ayland@ilande.co.uk>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Zhao Liu" <zhao1.liu@intel.com>,
"Eduardo Habkost" <eduardo@habkost.net>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Igor Mammedov" <imammedo@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Ani Sinha" <anisinha@redhat.com>,
"Bernhard Beschow" <shentey@gmail.com>,
"Alex Bennée" <alex.bennee@linaro.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Laszlo Ersek" <lersek@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [RFC PATCH 0/5] hw/i386/q35: Decouple virtual SMI# lines and wire them to ICH9 chipset
Date: Mon, 26 Feb 2024 17:49:07 +0100 [thread overview]
Message-ID: <20240226164913.94077-1-philmd@linaro.org> (raw)
Hi,
This is an experimental series to reduce calls to the
cpu_interrupt() API from generic HW/. I'm trying to use
the ICH9 chipset from a non-x86 machine. Without this
experiment, we can not because cpu_interrupt() is target
specific. Here the interrupt is decoupled using the QDev
GPIO API. Even if the SMI# line is left unconnected, the
device is still usable by a guest.
Based-on: <20240226111416.39217-1-philmd@linaro.org>
Philippe Mathieu-Daudé (5):
target/i386/cpu: Expose SMI# IRQ line via QDev
hw/i386/piix: Set CPU SMI# interrupt using QDev GPIO API
hw/ahci/ich9_tco: Set CPU SMI# interrupt using QDev GPIO API
hw/i386/q35: Wire virtual SMI# lines to ICH9 chipset
hw/isa: Build ich9_lpc.c once
include/hw/acpi/ich9.h | 1 +
include/hw/acpi/ich9_tco.h | 4 ++--
include/hw/i386/pc.h | 2 --
include/hw/isa/ich9_lpc.h | 12 ++++++++++++
include/hw/southbridge/ich9.h | 1 +
target/i386/cpu-internal.h | 1 +
hw/acpi/ich9.c | 3 ++-
hw/acpi/ich9_tco.c | 13 ++++++++++---
hw/i386/pc.c | 9 ---------
hw/i386/pc_piix.c | 4 ++--
hw/i386/pc_q35.c | 26 ++++++++++++++++++++++++++
hw/isa/ich9_lpc.c | 15 ++++-----------
hw/southbridge/ich9.c | 1 +
target/i386/cpu-sysemu.c | 11 +++++++++++
target/i386/cpu.c | 2 ++
hw/isa/meson.build | 3 +--
16 files changed, 76 insertions(+), 32 deletions(-)
--
2.41.0
next reply other threads:[~2024-02-26 16:49 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-26 16:49 Philippe Mathieu-Daudé [this message]
2024-02-26 16:49 ` [PATCH 1/5] target/i386/cpu: Expose SMI# IRQ line via QDev Philippe Mathieu-Daudé
2024-02-26 16:49 ` [PATCH 2/5] hw/i386/piix: Set CPU SMI# interrupt using QDev GPIO API Philippe Mathieu-Daudé
2024-02-26 16:49 ` [RFC PATCH 3/5] hw/ahci/ich9_tco: " Philippe Mathieu-Daudé
2024-02-26 16:49 ` [RFC PATCH 4/5] hw/i386/q35: Wire virtual SMI# lines to ICH9 chipset Philippe Mathieu-Daudé
2024-02-28 16:43 ` Zhao Liu
2024-03-07 19:43 ` Thomas Huth
2024-03-08 8:08 ` Philippe Mathieu-Daudé
2024-03-08 8:10 ` Laszlo Ersek
2024-03-08 8:53 ` Bernhard Beschow
2024-03-08 16:06 ` Thomas Huth
2024-03-08 16:12 ` Peter Maydell
2024-03-08 16:41 ` Philippe Mathieu-Daudé
2024-02-26 16:49 ` [RFC PATCH 5/5] hw/isa: Build ich9_lpc.c once Philippe Mathieu-Daudé
2024-02-28 3:06 ` [RFC PATCH 0/5] hw/i386/q35: Decouple virtual SMI# lines and wire them to ICH9 chipset Laszlo Ersek
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