[RFC PATCH 3/5] hw/ahci/ich9_tco: Set CPU SMI# interrupt using QDev GPIO API

["Philippe Mathieu-Daudé" <philmd@linaro.org>]

Use the CPU "SMI" IRQ, removing a call to cpu_interrupt()
from hw/. Keep a reference to the IRQ in the TCOIORegs
structure, which while being names with the Regs suffix
doesn't contain only registers. Remove ich9_generate_smi().

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
I suppose ideally ICH9 TCO would be a QOM object...
---
 include/hw/acpi/ich9.h     |  1 +
 include/hw/acpi/ich9_tco.h |  4 ++--
 hw/acpi/ich9.c             |  3 ++-
 hw/acpi/ich9_tco.c         | 13 ++++++++++---
 hw/isa/ich9_lpc.c          |  5 -----
 5 files changed, 15 insertions(+), 11 deletions(-)

diff --git a/include/hw/acpi/ich9.h b/include/hw/acpi/ich9.h
index 3587a35c9f..84e1557257 100644
--- a/include/hw/acpi/ich9.h
+++ b/include/hw/acpi/ich9.h
@@ -49,6 +49,7 @@ typedef struct ICH9LPCPMRegs {
     uint32_t smi_sts;
 
     qemu_irq irq;      /* SCI */
+    qemu_irq smi;      /* SMI */
 
     uint32_t pm_io_base;
     Notifier powerdown_notifier;
diff --git a/include/hw/acpi/ich9_tco.h b/include/hw/acpi/ich9_tco.h
index 68ee64942f..31730b8e14 100644
--- a/include/hw/acpi/ich9_tco.h
+++ b/include/hw/acpi/ich9_tco.h
@@ -73,10 +73,10 @@ typedef struct TCOIORegs {
     uint8_t timeouts_no;
 
     MemoryRegion io;
+    qemu_irq smi;
 } TCOIORegs;
 
-void ich9_acpi_pm_tco_init(TCOIORegs *tr, MemoryRegion *parent);
-void ich9_generate_smi(void);
+void ich9_acpi_pm_tco_init(TCOIORegs *tr, MemoryRegion *parent, qemu_irq smi);
 
 extern const VMStateDescription vmstate_ich9_sm_tco;
 
diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c
index 1f41ab49c4..e0b3838365 100644
--- a/hw/acpi/ich9.c
+++ b/hw/acpi/ich9.c
@@ -318,7 +318,8 @@ void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm, qemu_irq sci_irq)
     memory_region_add_subregion(&pm->io, ICH9_PMIO_SMI_EN, &pm->io_smi);
 
     if (pm->enable_tco) {
-        ich9_acpi_pm_tco_init(&pm->tco_regs, &pm->io);
+        pm->smi = qdev_get_gpio_in_named(DEVICE(first_cpu), "SMI", 0);
+        ich9_acpi_pm_tco_init(&pm->tco_regs, &pm->io, pm->smi);
     }
 
     if (pm->acpi_pci_hotplug.use_acpi_hotplug_bridge) {
diff --git a/hw/acpi/ich9_tco.c b/hw/acpi/ich9_tco.c
index 7499ec17db..1061b18b7e 100644
--- a/hw/acpi/ich9_tco.c
+++ b/hw/acpi/ich9_tco.c
@@ -14,6 +14,7 @@
 
 #include "hw/acpi/ich9_tco.h"
 #include "hw/isa/ich9_lpc.h"
+#include "hw/irq.h"
 #include "trace.h"
 
 enum {
@@ -31,6 +32,11 @@ enum {
     SW_IRQ_GEN_DEFAULT      = 0x03,
 };
 
+static void ich9_generate_smi(TCOIORegs *tr)
+{
+    qemu_irq_raise(tr->smi);
+}
+
 static inline void tco_timer_reload(TCOIORegs *tr)
 {
     int ticks = tr->tco.tmr & TCO_TMR_MASK;
@@ -72,7 +78,7 @@ static void tco_timer_expired(void *opaque)
     }
 
     if (pm->smi_en & ICH9_PMIO_SMI_EN_TCO_EN) {
-        ich9_generate_smi();
+        ich9_generate_smi(tr);
     }
     tr->tco.rld = tr->tco.tmr;
     tco_timer_reload(tr);
@@ -154,7 +160,7 @@ static void tco_ioport_writew(TCOIORegs *tr, uint32_t addr, uint32_t val)
     case TCO_DAT_IN:
         tr->tco.din = val;
         tr->tco.sts1 |= SW_TCO_SMI;
-        ich9_generate_smi();
+        ich9_generate_smi(tr);
         break;
     case TCO_DAT_OUT:
         tr->tco.dout = val;
@@ -225,7 +231,7 @@ static const MemoryRegionOps tco_io_ops = {
     .endianness = DEVICE_LITTLE_ENDIAN,
 };
 
-void ich9_acpi_pm_tco_init(TCOIORegs *tr, MemoryRegion *parent)
+void ich9_acpi_pm_tco_init(TCOIORegs *tr, MemoryRegion *parent, qemu_irq smi)
 {
     *tr = (TCOIORegs) {
         .tco = {
@@ -245,6 +251,7 @@ void ich9_acpi_pm_tco_init(TCOIORegs *tr, MemoryRegion *parent)
         .tco_timer     = timer_new_ns(QEMU_CLOCK_VIRTUAL, tco_timer_expired, tr),
         .expire_time   = -1,
         .timeouts_no   = 0,
+        .smi = smi,
     };
     memory_region_init_io(&tr->io, memory_region_owner(parent),
                           &tco_io_ops, tr, "sm-tco", ICH9_PMIO_TCO_LEN);
diff --git a/hw/isa/ich9_lpc.c b/hw/isa/ich9_lpc.c
index 2339f66e0f..b1f41158c5 100644
--- a/hw/isa/ich9_lpc.c
+++ b/hw/isa/ich9_lpc.c
@@ -353,11 +353,6 @@ static PCIINTxRoute ich9_route_intx_pin_to_irq(void *opaque, int pirq_pin)
     return route;
 }
 
-void ich9_generate_smi(void)
-{
-    cpu_interrupt(first_cpu, CPU_INTERRUPT_SMI);
-}
-
 /* Returns -1 on error, IRQ number on success */
 static int ich9_lpc_sci_irq(ICH9LPCState *lpc)
 {
-- 
2.41.0