From: Sven Schnelle <svens@stackframe.org>
To: Richard Henderson <richard.henderson@linaro.org>,
Helge Deller <deller@gmx.de>
Cc: qemu-devel@nongnu.org, Sven Schnelle <svens@stackframe.org>
Subject: [PATCH 2/3] target/hppa: add 64 bit support to gdbstub
Date: Wed, 28 Feb 2024 21:14:32 +0100 [thread overview]
Message-ID: <20240228201434.1515893-3-svens@stackframe.org> (raw)
In-Reply-To: <20240228201434.1515893-1-svens@stackframe.org>
Signed-off-by: Sven Schnelle <svens@stackframe.org>
---
target/hppa/gdbstub.c | 48 +++++++++++++++++++++++++++++--------------
1 file changed, 33 insertions(+), 15 deletions(-)
diff --git a/target/hppa/gdbstub.c b/target/hppa/gdbstub.c
index 48a514384f..a5b2c80c07 100644
--- a/target/hppa/gdbstub.c
+++ b/target/hppa/gdbstub.c
@@ -21,11 +21,25 @@
#include "cpu.h"
#include "gdbstub/helpers.h"
+static int hppa_num_regs(CPUHPPAState *env)
+{
+ return hppa_is_pa20(env) ? 96 : 128;
+}
+
+static int hppa_reg_size(CPUHPPAState *env)
+{
+ return hppa_is_pa20(env) ? 8 : 4;
+}
+
int hppa_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
HPPACPU *cpu = HPPA_CPU(cs);
CPUHPPAState *env = &cpu->env;
- target_ureg val;
+ target_ulong val;
+
+ if (n >= hppa_num_regs(env)) {
+ return 0;
+ }
switch (n) {
case 0:
@@ -128,18 +142,18 @@ int hppa_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
val = env->cr[30];
break;
case 64 ... 127:
- val = extract64(env->fr[(n - 64) / 2], (n & 1 ? 0 : 32), 32);
- break;
- default:
- if (n < 128) {
- val = 0;
+ if (hppa_is_pa20(env)) {
+ val = env->fr[n - 64];
} else {
- return 0;
+ val = extract64(env->fr[(n - 64) / 2], (n & 1 ? 0 : 32), 32);
}
break;
+ default:
+ val = 0;
+ break;
}
- if (TARGET_REGISTER_BITS == 64) {
+ if (hppa_is_pa20(env)) {
return gdb_get_reg64(mem_buf, val);
} else {
return gdb_get_reg32(mem_buf, val);
@@ -150,9 +164,13 @@ int hppa_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
{
HPPACPU *cpu = HPPA_CPU(cs);
CPUHPPAState *env = &cpu->env;
- target_ureg val;
+ target_ulong val;
+
+ if (n >= hppa_num_regs(env)) {
+ return 0;
+ }
- if (TARGET_REGISTER_BITS == 64) {
+ if (hppa_is_pa20(env)) {
val = ldq_p(mem_buf);
} else {
val = ldl_p(mem_buf);
@@ -267,16 +285,16 @@ int hppa_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
cpu_hppa_loaded_fr0(env);
break;
case 65 ... 127:
- {
+ if (hppa_is_pa20(env)) {
+ env->fr[n - 64] = val;
+ } else {
uint64_t *fr = &env->fr[(n - 64) / 2];
*fr = deposit64(*fr, (n & 1 ? 0 : 32), 32, val);
}
break;
default:
- if (n >= 128) {
- return 0;
- }
break;
}
- return sizeof(target_ureg);
+
+ return hppa_reg_size(env);
}
--
2.43.2
next prev parent reply other threads:[~2024-02-28 20:16 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-28 20:14 [PATCH 0/3] 64 Bit support for hppa gdbstub Sven Schnelle
2024-02-28 20:14 ` [PATCH 1/3] Revert "target/hppa: Drop attempted gdbstub support for hppa64" Sven Schnelle
2024-02-28 20:14 ` Sven Schnelle [this message]
2024-02-28 20:14 ` [PATCH 3/3] target/hppa: mask CR_SAR register writes to 5/6 bit in gdbstub Sven Schnelle
2024-02-29 18:36 ` Richard Henderson
2024-03-18 6:32 ` [PATCH 0/3] 64 Bit support for hppa gdbstub Sven Schnelle
2024-03-18 17:09 ` Richard Henderson
2024-03-18 17:24 ` Sven Schnelle
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