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From: Song Gao <gaosong@loongson.cn>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, Song Gao <gaosong@loongson.cn>
Subject: [PULL 03/17] hw/loongarch: Add slave cpu boot_code
Date: Thu,  7 Mar 2024 22:51:53 +0800	[thread overview]
Message-ID: <20240307145207.247913-4-gaosong@loongson.cn> (raw)
In-Reply-To: <20240307145207.247913-1-gaosong@loongson.cn>

Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240301093839.663947-4-gaosong@loongson.cn>
---
 hw/loongarch/boot.c | 70 ++++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 69 insertions(+), 1 deletion(-)

diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c
index 3075c276d4..2f398260af 100644
--- a/hw/loongarch/boot.c
+++ b/hw/loongarch/boot.c
@@ -14,6 +14,54 @@
 #include "qemu/error-report.h"
 #include "sysemu/reset.h"
 
+static const unsigned int slave_boot_code[] = {
+                  /* Configure reset ebase.         */
+    0x0400302c,   /* csrwr      $r12,0xc            */
+
+                  /* Disable interrupt.             */
+    0x0380100c,   /* ori        $r12,$r0,0x4        */
+    0x04000180,   /* csrxchg    $r0,$r12,0x0        */
+
+                  /* Clear mailbox.                 */
+    0x1400002d,   /* lu12i.w    $r13,1(0x1)         */
+    0x038081ad,   /* ori        $r13,$r13,0x20      */
+    0x06481da0,   /* iocsrwr.d  $r0,$r13            */
+
+                  /* Enable IPI interrupt.          */
+    0x1400002c,   /* lu12i.w    $r12,1(0x1)         */
+    0x0400118c,   /* csrxchg    $r12,$r12,0x4       */
+    0x02fffc0c,   /* addi.d     $r12,$r0,-1(0xfff)  */
+    0x1400002d,   /* lu12i.w    $r13,1(0x1)         */
+    0x038011ad,   /* ori        $r13,$r13,0x4       */
+    0x064819ac,   /* iocsrwr.w  $r12,$r13           */
+    0x1400002d,   /* lu12i.w    $r13,1(0x1)         */
+    0x038081ad,   /* ori        $r13,$r13,0x20      */
+
+                  /* Wait for wakeup  <.L11>:       */
+    0x06488000,   /* idle       0x0                 */
+    0x03400000,   /* andi       $r0,$r0,0x0         */
+    0x064809ac,   /* iocsrrd.w  $r12,$r13           */
+    0x43fff59f,   /* beqz       $r12,-12(0x7ffff4) # 48 <.L11> */
+
+                  /* Read and clear IPI interrupt.  */
+    0x1400002d,   /* lu12i.w    $r13,1(0x1)         */
+    0x064809ac,   /* iocsrrd.w  $r12,$r13           */
+    0x1400002d,   /* lu12i.w    $r13,1(0x1)         */
+    0x038031ad,   /* ori        $r13,$r13,0xc       */
+    0x064819ac,   /* iocsrwr.w  $r12,$r13           */
+
+                  /* Disable  IPI interrupt.        */
+    0x1400002c,   /* lu12i.w    $r12,1(0x1)         */
+    0x04001180,   /* csrxchg    $r0,$r12,0x4        */
+
+                  /* Read mail buf and jump to specified entry */
+    0x1400002d,   /* lu12i.w    $r13,1(0x1)         */
+    0x038081ad,   /* ori        $r13,$r13,0x20      */
+    0x06480dac,   /* iocsrrd.d  $r12,$r13           */
+    0x00150181,   /* move       $r1,$r12            */
+    0x4c000020,   /* jirl       $r0,$r1,0           */
+};
+
 static uint64_t cpu_loongarch_virt_to_phys(void *opaque, uint64_t addr)
 {
     return addr & MAKE_64BIT_MASK(0, TARGET_PHYS_ADDR_SPACE_BITS);
@@ -110,8 +158,15 @@ static void loongarch_firmware_boot(LoongArchMachineState *lams,
     fw_cfg_add_kernel_info(info, lams->fw_cfg);
 }
 
+static void init_boot_rom(struct loongarch_boot_info *info, void *p)
+{
+    memcpy(p, &slave_boot_code, sizeof(slave_boot_code));
+    p += sizeof(slave_boot_code);
+}
+
 static void loongarch_direct_kernel_boot(struct loongarch_boot_info *info)
 {
+    void  *p, *bp;
     int64_t kernel_addr = 0;
     LoongArchCPU *lacpu;
     CPUState *cs;
@@ -123,11 +178,24 @@ static void loongarch_direct_kernel_boot(struct loongarch_boot_info *info)
         exit(1);
     }
 
+    /* Load 'boot_rom' at [0 - 1MiB] */
+    p = g_malloc0(1 * MiB);
+    bp = p;
+    init_boot_rom(info, p);
+    rom_add_blob_fixed("boot_rom", bp, 1 * MiB, 0);
+
     CPU_FOREACH(cs) {
         lacpu = LOONGARCH_CPU(cs);
         lacpu->env.load_elf = true;
-        lacpu->env.elf_address = kernel_addr;
+        if (cs == first_cpu) {
+            lacpu->env.elf_address = kernel_addr;
+        } else {
+            lacpu->env.elf_address = 0;
+        }
+        lacpu->env.boot_info = info;
     }
+
+    g_free(bp);
 }
 
 void loongarch_load_kernel(MachineState *ms, struct loongarch_boot_info *info)
-- 
2.34.1



  parent reply	other threads:[~2024-03-07 14:53 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-07 14:51 [PULL 00/17] loongarch-to-apply queue Song Gao
2024-03-07 14:51 ` [PULL 01/17] hw/loongarch: Move boot fucntions to boot.c Song Gao
2024-03-07 14:51 ` [PULL 02/17] hw/loongarch: Add load initrd Song Gao
2024-03-07 14:51 ` Song Gao [this message]
2024-03-07 14:51 ` [PULL 04/17] hw/loongarch: Add init_cmdline Song Gao
2024-03-07 14:51 ` [PULL 05/17] hw/loongarch: Init efi_system_table Song Gao
2024-03-07 14:51 ` [PULL 06/17] hw/loongarch: Init efi_boot_memmap table Song Gao
2024-03-07 14:51 ` [PULL 07/17] hw/loongarch: Init efi_initrd table Song Gao
2024-03-07 14:51 ` [PULL 08/17] hw/loongarch: Init efi_fdt table Song Gao
2024-03-07 14:51 ` [PULL 09/17] hw/loongarch: Fix fdt memory node wrong 'reg' Song Gao
2024-03-07 14:52 ` [PULL 10/17] hw/loongarch: fdt adds cpu interrupt controller node Song Gao
2024-03-07 14:52 ` [PULL 11/17] hw/loongarch: fdt adds Extend I/O Interrupt Controller Song Gao
2024-03-07 14:52 ` [PULL 12/17] hw/loongarch: fdt adds pch_pic Controller Song Gao
2024-03-07 14:52 ` [PULL 13/17] hw/loongarch: fdt adds pch_msi Controller Song Gao
2024-03-07 14:52 ` [PULL 14/17] hw/loongarch: fdt adds pcie irq_map node Song Gao
2024-03-07 14:52 ` [PULL 15/17] hw/loongarch: fdt remove unused irqchip node Song Gao
2024-03-07 15:22 ` [PULL 00/17] loongarch-to-apply queue gaosong
2024-03-07 15:23 ` Peter Maydell
2024-03-07 15:25   ` Peter Maydell
  -- strict thread matches above, loose matches on Subject: below --
2024-04-28  8:51 Song Gao
2024-04-28  8:51 ` [PULL 03/17] hw/loongarch: Add slave cpu boot_code Song Gao

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