From: Nicholas Piggin <npiggin@gmail.com>
To: qemu-ppc@nongnu.org
Cc: Nicholas Piggin <npiggin@gmail.com>,
qemu-devel@nongnu.org,
Daniel Henrique Barboza <danielhb413@gmail.com>,
David Gibson <david@gibson.dropbear.id.au>,
Harsh Prateek Bora <harshpb@linux.ibm.com>
Subject: [PATCH 12/13] target/ppc: improve checkstop logging
Date: Tue, 12 Mar 2024 04:51:54 +1000 [thread overview]
Message-ID: <20240311185200.2185753-13-npiggin@gmail.com> (raw)
In-Reply-To: <20240311185200.2185753-1-npiggin@gmail.com>
Change the logging not to print to stderr as well, because a
checkstop is a guest error (or perhaps a simulated machine error)
rather than a QEMU error, so send it to the log.
Update the checkstop message, and log CPU registers too.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
target/ppc/excp_helper.c | 14 ++++++++------
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 9aca4a1489..ad78d027e9 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -429,6 +429,7 @@ static void powerpc_set_excp_state(PowerPCCPU *cpu, target_ulong vector,
static void powerpc_mcheck_checkstop(CPUPPCState *env)
{
CPUState *cs = env_cpu(env);
+ FILE *f;
if (FIELD_EX64(env->msr, MSR, ME)) {
return;
@@ -440,12 +441,13 @@ static void powerpc_mcheck_checkstop(CPUPPCState *env)
* it is often a guest error).
*/
- /* Machine check exception is not enabled. Enter checkstop state. */
- fprintf(stderr, "Machine check while not allowed. "
- "Entering checkstop state\n");
- if (qemu_log_separate()) {
- qemu_log("Machine check while not allowed. "
- "Entering checkstop state\n");
+ f = qemu_log_trylock();
+ if (f) {
+ fprintf(f, "Entering checkstop state: "
+ "machine check with MSR[ME]=0\n");
+ cpu_dump_state(cs, f, CPU_DUMP_FPU | CPU_DUMP_CCOP);
+ qemu_log_unlock(f);
+ }
qemu_system_guest_panicked(NULL);
--
2.42.0
next prev parent reply other threads:[~2024-03-11 18:54 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-11 18:51 [PATCH 00/13] misc ppc patches Nicholas Piggin
2024-03-11 18:51 ` [PATCH 01/13] ppc: Drop support for POWER9 and POWER10 DD1 chips Nicholas Piggin
2024-03-12 4:50 ` Harsh Prateek Bora
2024-03-12 4:55 ` Harsh Prateek Bora
2024-03-12 8:59 ` Nicholas Piggin
2024-03-12 9:06 ` Harsh Prateek Bora
2024-03-11 18:51 ` [PATCH 02/13] target/ppc: POWER10 does not have transactional memory Nicholas Piggin
2024-03-12 8:10 ` Harsh Prateek Bora
2024-03-12 8:55 ` Nicholas Piggin
2024-03-11 18:51 ` [PATCH 03/13] ppc/spapr|pnv: Remove SAO from pa-features Nicholas Piggin
2024-03-12 8:40 ` Harsh Prateek Bora
2024-03-11 18:51 ` [PATCH 04/13] ppc/spapr: Remove copy-paste " Nicholas Piggin
2024-03-12 8:49 ` Harsh Prateek Bora
2024-03-11 18:51 ` [PATCH 05/13] ppc/spapr: Adjust ibm,pa-features for POWER9 Nicholas Piggin
2024-03-12 9:13 ` Harsh Prateek Bora
2024-03-11 18:51 ` [PATCH 06/13] ppc/spapr: Add pa-features for POWER10 machines Nicholas Piggin
2024-03-11 20:05 ` Philippe Mathieu-Daudé
2024-03-11 21:07 ` BALATON Zoltan
2024-03-12 4:50 ` Nicholas Piggin
2024-03-12 9:59 ` BALATON Zoltan
2024-03-12 10:33 ` Nicholas Piggin
2024-03-12 4:45 ` Nicholas Piggin
2024-03-12 9:34 ` Harsh Prateek Bora
2024-03-12 10:34 ` Nicholas Piggin
2024-03-11 18:51 ` [PATCH 07/13] ppc/pnv: Permit ibm, pa-features set per machine variant Nicholas Piggin
2024-03-12 8:02 ` [PATCH 07/13] ppc/pnv: Permit ibm,pa-features " Cédric Le Goater
2024-03-11 18:51 ` [PATCH 08/13] ppc/pnv: Set POWER9, POWER10 ibm,pa-features bits Nicholas Piggin
2024-03-12 8:06 ` Cédric Le Goater
2024-03-12 8:54 ` Nicholas Piggin
2024-03-12 9:14 ` Cédric Le Goater
2024-03-11 18:51 ` [PATCH 09/13] target/ppc: Prevent supervisor from modifying MSR[ME] Nicholas Piggin
2024-03-12 10:27 ` Harsh Prateek Bora
2024-03-12 10:33 ` Nicholas Piggin
2024-03-11 18:51 ` [PATCH 10/13] spapr: set MSR[ME] and MSR[FP] on client entry Nicholas Piggin
2024-03-12 10:03 ` Harsh Prateek Bora
2024-03-12 10:34 ` Nicholas Piggin
2024-03-11 18:51 ` [PATCH 11/13] target/ppc: Make checkstop actually stop the system Nicholas Piggin
2024-03-11 18:51 ` Nicholas Piggin [this message]
2024-03-11 18:51 ` [PATCH 13/13] target/ppc: Implement attn instruction on BookS 64-bit processors Nicholas Piggin
2024-03-11 20:06 ` [PATCH 00/13] misc ppc patches Philippe Mathieu-Daudé
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20240311185200.2185753-13-npiggin@gmail.com \
--to=npiggin@gmail.com \
--cc=danielhb413@gmail.com \
--cc=david@gibson.dropbear.id.au \
--cc=harshpb@linux.ibm.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).