From: "Michael S. Tsirkin" <mst@redhat.com>
To: "Philippe Mathieu-Daudé" <philmd@linaro.org>
Cc: qemu-devel@nongnu.org, Bernhard Beschow <shentey@gmail.com>,
Laurent Vivier <lvivier@redhat.com>,
Thomas Huth <thuth@redhat.com>,
BALATON Zoltan <balaton@eik.bme.hu>,
Ani Sinha <anisinha@redhat.com>,
qemu-block@nongnu.org,
Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
Eduardo Habkost <eduardo@habkost.net>,
John Snow <jsnow@redhat.com>, Paolo Bonzini <pbonzini@redhat.com>,
Igor Mammedov <imammedo@redhat.com>,
Richard Henderson <richard.henderson@linaro.org>,
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Subject: Re: [PATCH v2 00/15] hw/southbridge: Extract ICH9 QOM container model
Date: Tue, 12 Mar 2024 12:49:26 -0400 [thread overview]
Message-ID: <20240312124845-mutt-send-email-mst@kernel.org> (raw)
In-Reply-To: <20240226111416.39217-1-philmd@linaro.org>
On Mon, Feb 26, 2024 at 12:13:59PM +0100, Philippe Mathieu-Daudé wrote:
> Since v1 [1]:
> - Rebased on top of Bernhard patches
> - Rename files with 'ich9_' prefix (Bernhard)
>
> Hi,
>
> I have a long standing southbridge QOM rework branches. Since
> Bernhard is actively working on the PIIX, I'll try to refresh
> and post. This is also motivated by the Dynamic Machine work
> where we are trying to figure the ideal DSL for QEMU, so having
> complex models well designed help.
>
> Here we introduce the ICH9 'southbridge' as a QOM container.
> Since the chipset comes as a whole, we shouldn't instantiate
> its components separately. However in order to maintain old
> code we expose some properties to configure the container and
> not introduce any change for the Q35 machine. There is no
> migration change, only QOM objects moved around.
>
> More work remain in the LPC function (more code to remove from
> Q35). Maybe worth doing in parallel with the PIIX to clean both
> PC machines.
Bernhard had some comments so I hope you'll address them so
I can merge - after the release presumably.
> Also we'd need to decouple the cpu_interrupt() calls between hw/
> and target/.
>
> Note that GSI is currently broken [2]. Once the LPC/ISA part is
> done, it might be easier to fix it.
>
> [1] https://lore.kernel.org/qemu-devel/20240219163855.87326-1-philmd@linaro.org/
> [2] https://lore.kernel.org/qemu-devel/cd0e13c6-c03d-411f-83a5-1d4d28ea4345@linaro.org/
>
> Philippe Mathieu-Daudé (15):
> MAINTAINERS: Add 'ICH9 South Bridge' section
> hw/i386/q35: Add local 'lpc_obj' variable
> hw/acpi/ich9: Restrict definitions from 'hw/southbridge/ich9.h'
> hw/acpi/ich9_tco: Include 'ich9' in names
> hw/acpi/ich9_tco: Restrict ich9_generate_smi() declaration
> hw/ide: Rename ich.c -> ich9_ahci.c
> hw/i2c/smbus: Extract QOM ICH9 definitions to 'ich9_smbus.h'
> hw/pci-bridge: Extract QOM ICH definitions to 'ich9_dmi.h'
> hw/southbridge/ich9: Introduce TYPE_ICH9_SOUTHBRIDGE stub
> hw/southbridge/ich9: Add the DMI-to-PCI bridge
> hw/southbridge/ich9: Add a AHCI function
> hw/southbridge/ich9: Add the SMBus function
> hw/southbridge/ich9: Add the USB EHCI/UHCI functions
> hw/southbridge/ich9: Extract LPC definitions to 'hw/isa/ich9_lpc.h'
> hw/southbridge/ich9: Add the LPC / ISA bridge function
>
> MAINTAINERS | 21 +-
> include/hw/acpi/ich9.h | 15 ++
> include/hw/acpi/ich9_tco.h | 6 +-
> include/hw/i2c/ich9_smbus.h | 25 +++
> include/hw/isa/ich9_lpc.h | 166 +++++++++++++++
> include/hw/pci-bridge/ich9_dmi.h | 20 ++
> include/hw/southbridge/ich9.h | 235 +---------------------
> hw/acpi/ich9.c | 9 +-
> hw/acpi/ich9_tco.c | 5 +-
> hw/i2c/{smbus_ich9.c => ich9_smbus.c} | 36 +++-
> hw/i386/acpi-build.c | 1 +
> hw/i386/pc_q35.c | 126 +++---------
> hw/ide/{ich.c => ich9_ahci.c} | 0
> hw/isa/{lpc_ich9.c => ich9_lpc.c} | 37 +++-
> hw/pci-bridge/{i82801b11.c => ich9_dmi.c} | 11 +-
> hw/southbridge/ich9.c | 213 ++++++++++++++++++++
> tests/qtest/tco-test.c | 2 +-
> hw/Kconfig | 1 +
> hw/i2c/meson.build | 2 +-
> hw/i386/Kconfig | 3 +-
> hw/ide/meson.build | 2 +-
> hw/isa/meson.build | 2 +-
> hw/meson.build | 1 +
> hw/pci-bridge/meson.build | 2 +-
> hw/southbridge/Kconfig | 11 +
> hw/southbridge/meson.build | 3 +
> 26 files changed, 587 insertions(+), 368 deletions(-)
> create mode 100644 include/hw/i2c/ich9_smbus.h
> create mode 100644 include/hw/isa/ich9_lpc.h
> create mode 100644 include/hw/pci-bridge/ich9_dmi.h
> rename hw/i2c/{smbus_ich9.c => ich9_smbus.c} (77%)
> rename hw/ide/{ich.c => ich9_ahci.c} (100%)
> rename hw/isa/{lpc_ich9.c => ich9_lpc.c} (95%)
> rename hw/pci-bridge/{i82801b11.c => ich9_dmi.c} (95%)
> create mode 100644 hw/southbridge/ich9.c
> create mode 100644 hw/southbridge/Kconfig
> create mode 100644 hw/southbridge/meson.build
>
> --
> 2.41.0
prev parent reply other threads:[~2024-03-12 16:50 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-26 11:13 [PATCH v2 00/15] hw/southbridge: Extract ICH9 QOM container model Philippe Mathieu-Daudé
2024-02-26 11:14 ` [PATCH v2 01/15] MAINTAINERS: Add 'ICH9 South Bridge' section Philippe Mathieu-Daudé
2024-02-26 11:14 ` [PATCH v2 02/15] hw/i386/q35: Add local 'lpc_obj' variable Philippe Mathieu-Daudé
2024-02-26 11:14 ` [PATCH v2 03/15] hw/acpi/ich9: Restrict definitions from 'hw/southbridge/ich9.h' Philippe Mathieu-Daudé
2024-02-26 11:14 ` [PATCH v2 04/15] hw/acpi/ich9_tco: Include 'ich9' in names Philippe Mathieu-Daudé
2024-02-26 11:14 ` [PATCH v2 05/15] hw/acpi/ich9_tco: Restrict ich9_generate_smi() declaration Philippe Mathieu-Daudé
2024-02-26 11:14 ` [PATCH v2 06/15] hw/ide: Rename ich.c -> ich9_ahci.c Philippe Mathieu-Daudé
2024-02-26 12:52 ` BALATON Zoltan
2024-02-26 13:13 ` Philippe Mathieu-Daudé
2024-02-26 13:27 ` BALATON Zoltan
2024-02-26 11:14 ` [PATCH v2 07/15] hw/i2c/smbus: Extract QOM ICH9 definitions to 'ich9_smbus.h' Philippe Mathieu-Daudé
2024-02-26 11:14 ` [PATCH v2 08/15] hw/pci-bridge: Extract QOM ICH definitions to 'ich9_dmi.h' Philippe Mathieu-Daudé
2024-02-26 13:01 ` BALATON Zoltan
2024-02-26 13:11 ` Philippe Mathieu-Daudé
2024-02-26 13:23 ` BALATON Zoltan
2024-02-26 13:39 ` Philippe Mathieu-Daudé
2024-02-26 11:14 ` [PATCH v2 09/15] hw/southbridge/ich9: Introduce TYPE_ICH9_SOUTHBRIDGE stub Philippe Mathieu-Daudé
2024-02-26 11:14 ` [PATCH v2 10/15] hw/southbridge/ich9: Add the DMI-to-PCI bridge Philippe Mathieu-Daudé
2024-02-26 22:52 ` Bernhard Beschow
2024-02-26 11:14 ` [PATCH v2 11/15] hw/southbridge/ich9: Add a AHCI function Philippe Mathieu-Daudé
2024-04-15 8:05 ` Bernhard Beschow
2024-02-26 11:14 ` [PATCH v2 12/15] hw/southbridge/ich9: Add the SMBus function Philippe Mathieu-Daudé
2024-02-26 11:14 ` [PATCH v2 13/15] hw/southbridge/ich9: Add the USB EHCI/UHCI functions Philippe Mathieu-Daudé
2024-02-26 11:14 ` [PATCH v2 14/15] hw/southbridge/ich9: Extract LPC definitions to 'hw/isa/ich9_lpc.h' Philippe Mathieu-Daudé
2024-02-26 11:14 ` [PATCH v2 15/15] hw/southbridge/ich9: Add the LPC / ISA bridge function Philippe Mathieu-Daudé
2024-02-26 13:07 ` [PATCH v2 00/15] hw/southbridge: Extract ICH9 QOM container model Philippe Mathieu-Daudé
2024-02-26 22:44 ` Bernhard Beschow
2024-03-12 16:49 ` Michael S. Tsirkin [this message]
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